| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | IRTranslator.h | 205 MachineIRBuilder &MIRBuilder);
213 MachineIRBuilder &MIRBuilder);
221 MachineIRBuilder &MIRBuilder);
225 MachineIRBuilder &MIRBuilder);
229 bool translateBitCast(const User &U, MachineIRBuilder &MIRBuilder);
232 bool translateLoad(const User &U, MachineIRBuilder &MIRBuilder);
235 bool translateStore(const User &U, MachineIRBuilder &MIRBuilder);
238 bool translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder,
242 bool translateTrap(const CallInst &U, MachineIRBuilder &MIRBuilder,
249 MachineIRBuilder &MIRBuilder);
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| H A D | CallLowering.h | 244 MachineIRBuilder &MIRBuilder; member
248 ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder, in ValueHandler()
250 : MIRBuilder(MIRBuilder), MRI(MRI), in ValueHandler()
333 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingValueHandler()
334 : ValueHandler(/*IsIncoming*/ true, MIRBuilder, MRI) {} in IncomingValueHandler()
349 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in OutgoingValueHandler()
350 : ValueHandler(/*IsIncoming*/ false, MIRBuilder, MRI) {} in OutgoingValueHandler()
416 MachineIRBuilder &MIRBuilder,
426 MachineIRBuilder &MIRBuilder,
466 void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVGlobalRegistry.cpp | 120 const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, in assignTypeToVReg() argument
123 getOrCreateSPIRVType(Type, MIRBuilder, AccessQual, EmitIR); in assignTypeToVReg()
124 assignSPIRVTypeToVReg(SpirvType, VReg, MIRBuilder.getMF()); in assignTypeToVReg()
140 inline Register createTypeVReg(MachineIRBuilder &MIRBuilder) { in createTypeVReg() argument
141 return createTypeVReg(MIRBuilder.getMF().getRegInfo()); in createTypeVReg()
144 SPIRVType *SPIRVGlobalRegistry::getOpTypeBool(MachineIRBuilder &MIRBuilder) { in getOpTypeBool() argument
145 return createOpType(MIRBuilder, [&](MachineIRBuilder &MIRBuilder) { in getOpTypeBool() argument
146 return MIRBuilder.buildInstr(SPIRV::OpTypeBool) in getOpTypeBool()
147 .addDef(createTypeVReg(MIRBuilder)); in getOpTypeBool()
171 MachineIRBuilder &MIRBuilder, in getOpTypeInt() argument
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| H A D | SPIRVBuiltins.cpp | 442 buildBoolRegister(MachineIRBuilder &MIRBuilder, const SPIRVType *ResultType, in buildBoolRegister() argument
445 SPIRVType *BoolType = GR->getOrCreateSPIRVBoolType(MIRBuilder, true); in buildBoolRegister()
450 MIRBuilder, true); in buildBoolRegister()
459 MIRBuilder.getMRI()->createGenericVirtualRegister(Type); in buildBoolRegister()
460 MIRBuilder.getMRI()->setRegClass(ResultRegister, GR->getRegClass(ResultType)); in buildBoolRegister()
461 GR->assignSPIRVTypeToVReg(BoolType, ResultRegister, MIRBuilder.getMF()); in buildBoolRegister()
467 static bool buildSelectInst(MachineIRBuilder &MIRBuilder, in buildSelectInst() argument
477 GR->getOrCreateConsIntVector(AllOnes, MIRBuilder, ReturnType, true); in buildSelectInst()
478 FalseConst = GR->getOrCreateConsIntVector(0, MIRBuilder, ReturnType, true); in buildSelectInst()
480 TrueConst = GR->buildConstantInt(1, MIRBuilder, ReturnType, true); in buildSelectInst()
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| H A D | SPIRVCallLowering.cpp | 35 bool SPIRVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
40 if (MIRBuilder.getMF() in lowerReturn()
48 produceIndirectPtrTypes(MIRBuilder); in lowerReturn()
57 const auto &STI = MIRBuilder.getMF().getSubtarget(); in lowerReturn()
58 return MIRBuilder.buildInstr(SPIRV::OpReturnValue) in lowerReturn()
60 .constrainAllUses(MIRBuilder.getTII(), *STI.getRegisterInfo(), in lowerReturn()
63 MIRBuilder.buildInstr(SPIRV::OpReturn); in lowerReturn()
201 MachineIRBuilder &MIRBuilder, in getArgSPIRVType() argument
212 return GR->getOrCreateSPIRVType(OriginalArgType, MIRBuilder, ArgAccessQual, in getArgSPIRVType()
219 cast<TypedPointerType>(ArgType)->getElementType(), MIRBuilder, in getArgSPIRVType()
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| H A D | SPIRVGlobalRegistry.h | 92 SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
95 SPIRVType *findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder,
99 restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
107 SPIRVType *createOpType(MachineIRBuilder &MIRBuilder,
281 MachineIRBuilder &MIRBuilder,
305 MachineIRBuilder MIRBuilder(I); in getOrCreateSPIRVType()
306 return getOrCreateSPIRVType(Type, MIRBuilder, AQ, EmitIR); in getOrCreateSPIRVType()
310 MachineIRBuilder &MIRBuilder, in getOrCreateSPIRVType() argument
313 return getOrCreateSPIRVType(Type, MIRBuilder, AQ, false, EmitIR); in getOrCreateSPIRVType()
331 StringRef TypeStr, MachineIRBuilder &MIRBuilder, bool EmitIR,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 108 : MIRBuilder(Builder), Observer(Observer), MRI(MF.getRegInfo()), in LegalizerHelper()
115 : MIRBuilder(B), Observer(Observer), MRI(MF.getRegInfo()), LI(LI), in LegalizerHelper()
123 MIRBuilder.setInstrAndDebugLoc(MI); in legalizeInstrStep()
172 MIRBuilder.buildMergeLikeInstr(DstReg, PartRegs); in insertParts()
177 MIRBuilder.buildConcatVectors(DstReg, PartRegs); in insertParts()
179 MIRBuilder.buildBuildVector(DstReg, PartRegs); in insertParts()
204 MIRBuilder, MRI); in appendVectorElts()
221 MIRBuilder.buildMergeLikeInstr(DstReg, AllElts); in mergeMixedSubvectors()
245 auto Unmerge = MIRBuilder.buildUnmerge(GCDTy, SrcReg); in extractGCDType()
273 PadReg = MIRBuilder.buildConstant(GCDTy, 0).getReg(0); in buildLCMMergePieces()
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| H A D | IRTranslator.cpp | 309 MachineIRBuilder &MIRBuilder) { in translateBinaryOp() argument
326 MIRBuilder.buildInstr(Opcode, {Res}, {Op0, Op1}, Flags); in translateBinaryOp()
331 MachineIRBuilder &MIRBuilder) { in translateUnaryOp() argument
342 MIRBuilder.buildInstr(Opcode, {Res}, {Op0}, Flags); in translateUnaryOp()
346 bool IRTranslator::translateFNeg(const User &U, MachineIRBuilder &MIRBuilder) { in translateFNeg() argument
347 return translateUnaryOp(TargetOpcode::G_FNEG, U, MIRBuilder); in translateFNeg()
351 MachineIRBuilder &MIRBuilder) { in translateCompare() argument
362 MIRBuilder.buildICmp(Pred, Res, Op0, Op1, Flags); in translateCompare()
364 MIRBuilder.buildCopy( in translateCompare()
367 MIRBuilder.buildCopy( in translateCompare()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 31 M68kFormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in M68kFormalArgHandler()
32 : M68kIncomingValueHandler(MIRBuilder, MRI) {} in M68kFormalArgHandler()
36 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler()
38 : M68kIncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in CallReturnHandler()
53 M68kOutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in M68kOutgoingArgHandler()
55 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB), in M68kOutgoingArgHandler()
56 DL(MIRBuilder.getMF().getDataLayout()), in M68kOutgoingArgHandler()
57 STI(MIRBuilder.getMF().getSubtarget<M68kSubtarget>()) {} in M68kOutgoingArgHandler()
63 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
69 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
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| H A D | M68kCallLowering.h | 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
38 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
42 bool lowerCall(MachineIRBuilder &MIRBuilder,
48 M68kIncomingValueHandler(MachineIRBuilder &MIRBuilder, in M68kIncomingValueHandler()
50 : CallLowering::IncomingValueHandler(MIRBuilder, MRI) {} in M68kIncomingValueHandler()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 86 X86OutgoingValueHandler(MachineIRBuilder &MIRBuilder, in X86OutgoingValueHandler()
88 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB), in X86OutgoingValueHandler()
89 DL(MIRBuilder.getMF().getDataLayout()), in X86OutgoingValueHandler()
90 STI(MIRBuilder.getMF().getSubtarget<X86Subtarget>()) {} in X86OutgoingValueHandler()
98 MIRBuilder.buildCopy(p0, STI.getRegisterInfo()->getStackRegister()); in getStackAddress()
100 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress()
102 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
104 MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); in getStackAddress()
112 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
118 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
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| H A D | X86LegalizerInfo.cpp | 599 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
600 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
626 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeSITOFP() local
642 MIRBuilder.buildStore(Src, SlotPointer, *StoreMMO); in legalizeSITOFP()
646 MIRBuilder.buildInstr(X86::G_FILD) in legalizeSITOFP()
659 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeFPTOSI() local
669 MIRBuilder.buildInstr(X86::G_FIST) in legalizeFPTOSI()
674 MIRBuilder.buildLoad(Dst, SlotPointer, PtrInfo, Align(MemSize)); in legalizeFPTOSI()
682 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeBuildVector() local
686 MachineFunction &MF = MIRBuilder.getMF(); in legalizeBuildVector()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 338 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
339 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
368 MachineFunction &MF = MIRBuilder.getMF(); in legalizeCustom()
376 Val = MIRBuilder.buildAnyExt(s32, Val).getReg(0); in legalizeCustom()
378 Val = MIRBuilder.buildAnyExt(s64, Val).getReg(0); in legalizeCustom()
380 auto C_P2HalfMemSize = MIRBuilder.buildConstant(s32, P2HalfMemSize); in legalizeCustom()
381 auto Addr = MIRBuilder.buildPtrAdd(PtrTy, BaseAddr, C_P2HalfMemSize); in legalizeCustom()
384 MIRBuilder.buildStore(Val, BaseAddr, *P2HalfMemOp); in legalizeCustom()
385 auto C_P2Half_InBits = MIRBuilder.buildConstant(s32, P2HalfMemSize * 8); in legalizeCustom()
386 auto Shift = MIRBuilder.buildLShr(s32, Val, C_P2Half_InBits); in legalizeCustom()
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| H A D | MipsCallLowering.cpp | 89 MipsIncomingValueHandler(MachineIRBuilder &MIRBuilder, in MipsIncomingValueHandler() argument
91 : IncomingValueHandler(MIRBuilder, MRI), in MipsIncomingValueHandler()
92 STI(MIRBuilder.getMF().getSubtarget<MipsSubtarget>()) {} in MipsIncomingValueHandler()
110 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
111 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
117 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler() argument
119 : MipsIncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in CallReturnHandler()
143 MachineFunction &MF = MIRBuilder.getMF(); in getStackAddress()
148 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
150 return MIRBuilder.buildFrameIndex(LLT::pointer(0, 32), FI).getReg(0); in getStackAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 97 ARMOutgoingValueHandler(MachineIRBuilder &MIRBuilder, in ARMOutgoingValueHandler()
99 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in ARMOutgoingValueHandler()
109 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); in getStackAddress()
111 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress()
113 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
115 MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); in getStackAddress()
128 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
136 auto MMO = MIRBuilder.getMF().getMachineMemOperand( in assignValueToAddress()
138 MIRBuilder.buildStore(ExtReg, Addr, *MMO); in assignValueToAddress()
165 MIRBuilder.buildUnmerge(NewRegs, Arg.Regs[0]); in assignCustomValue()
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| H A D | ARMLegalizerInfo.cpp | 344 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
345 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
346 LLVMContext &Ctx = MIRBuilder.getMF().getFunction().getContext(); in legalizeCustom()
368 auto Status = createLibcall(MIRBuilder, Libcall, {RetRegs, RetTy, 0}, in legalizeCustom()
391 MIRBuilder.buildConstant(OriginalResult, in legalizeCustom()
404 auto Status = createLibcall(MIRBuilder, Libcall.LibcallID, in legalizeCustom()
425 MIRBuilder.buildTrunc(ProcessedResult, LibcallResult); in legalizeCustom()
429 auto Zero = MIRBuilder.buildConstant(LLT::scalar(32), 0); in legalizeCustom()
430 MIRBuilder.buildICmp(ResultPred, ProcessedResult, LibcallResult, Zero); in legalizeCustom()
437 MIRBuilder.buildOr(OriginalResult, Results[0], Results[1]); in legalizeCustom()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.cpp | 31 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler()
33 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in OutgoingArgHandler()
52 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
71 bool PPCCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
75 auto MIB = MIRBuilder.buildInstrNoInsert(PPC::BLR8); in lowerReturn()
77 MachineFunction &MF = MIRBuilder.getMF(); in lowerReturn()
95 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB); in lowerReturn()
99 MIRBuilder, F.getCallingConv(), in lowerReturn()
102 MIRBuilder.insertInstr(MIB); in lowerReturn()
106 bool PPCCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall() argument
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| H A D | PPCCallLowering.h | 28 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
31 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
34 bool lowerCall(MachineIRBuilder &MIRBuilder,
40 PPCIncomingValueHandler(MachineIRBuilder &MIRBuilder, in PPCIncomingValueHandler() argument
42 : CallLowering::IncomingValueHandler(MIRBuilder, MRI) {} in PPCIncomingValueHandler()
66 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler() argument
67 : PPCIncomingValueHandler(MIRBuilder, MRI) {} in FormalArgHandler()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 61 Subtarget(MIRBuilder.getMF().getSubtarget<RISCVSubtarget>()) {} in RISCVOutgoingValueHandler()
65 MachineFunction &MF = MIRBuilder.getMF(); in getStackAddress()
70 SPReg = MIRBuilder.buildCopy(p0, Register(RISCV::X2)).getReg(0); in getStackAddress()
72 auto OffsetReg = MIRBuilder.buildConstant(sXLen, Offset); in getStackAddress()
74 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
83 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
92 MIRBuilder.buildStore(ExtReg, Addr, *MMO); in assignValueToAddress()
98 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
111 auto Trunc = MIRBuilder.buildAnyExt(LLT(VA.getLocVT()), Arg.Regs[0]); in assignCustomValue()
112 MIRBuilder.buildCopy(PhysReg, Trunc); in assignCustomValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 141 IncomingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingArgHandler()
142 : IncomingValueHandler(MIRBuilder, MRI) {} in IncomingArgHandler()
147 auto &MFI = MIRBuilder.getMF().getFrameInfo(); in getStackAddress()
154 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
155 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); in getStackAddress()
177 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
198 MIRBuilder.buildLoadInstr(TargetOpcode::G_ZEXTLOAD, ValVReg, Addr, *MMO); in assignValueToAddress()
201 MIRBuilder.buildLoadInstr(TargetOpcode::G_SEXTLOAD, ValVReg, Addr, *MMO); in assignValueToAddress()
204 MIRBuilder.buildLoad(ValVReg, Addr, *MMO); in assignValueToAddress()
216 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
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| H A D | AArch64LegalizerInfo.cpp | 1410 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
1411 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
1418 return legalizeVaArg(MI, MRI, MIRBuilder); in legalizeCustom()
1421 return legalizeLoadStore(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1425 return legalizeShlAshrLshr(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1427 return legalizeSmallCMGlobalValue(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1433 return legalizeFunnelShift(MI, MRI, MIRBuilder, Observer, Helper); in legalizeCustom()
1456 return legalizeICMP(MI, MRI, MIRBuilder); in legalizeCustom()
1481 MachineIRBuilder &MIRBuilder, in legalizeFunnelShift() argument
1514 auto Cast64 = MIRBuilder.buildConstant(LLT::scalar(64), Amount.zext(64)); in legalizeFunnelShift()
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| H A D | AArch64CallLowering.h | 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
44 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
48 bool lowerCall(MachineIRBuilder &MIRBuilder,
53 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
69 void saveVarArgRegisters(MachineIRBuilder &MIRBuilder,
73 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
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| H A D | AArch64LegalizerInfo.h | 38 MachineIRBuilder &MIRBuilder) const;
40 MachineIRBuilder &MIRBuilder,
43 MachineIRBuilder &MIRBuilder,
47 MachineIRBuilder &MIRBuilder,
54 MachineIRBuilder &MIRBuilder) const;
56 MachineIRBuilder &MIRBuilder,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 38 return Handler.MIRBuilder.buildAnyExt(LLT::scalar(32), ValVReg).getReg(0); in extendRegisterMin32()
80 ExtReg = MIRBuilder.buildPtrToInt(S32, ExtReg).getReg(0); in assignValueToReg()
82 ExtReg = MIRBuilder.buildBitcast(S32, ExtReg).getReg(0); in assignValueToReg()
85 auto ToSGPR = MIRBuilder in assignValueToReg()
92 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
106 auto &MFI = MIRBuilder.getMF().getFrameInfo(); in getStackAddress()
112 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
113 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress()
126 auto Copy = MIRBuilder.buildCopy(LLT::scalar(32), PhysReg); in assignValueToReg()
132 MIRBuilder.buildTrunc(ValVReg, Extended); in assignValueToReg()
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