| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | IRTranslator.h | 210 MachineIRBuilder &MIRBuilder);
218 MachineIRBuilder &MIRBuilder);
226 MachineIRBuilder &MIRBuilder);
230 MachineIRBuilder &MIRBuilder);
234 bool translateBitCast(const User &U, MachineIRBuilder &MIRBuilder);
237 bool translateLoad(const User &U, MachineIRBuilder &MIRBuilder);
240 bool translateStore(const User &U, MachineIRBuilder &MIRBuilder);
243 bool translateMemFunc(const CallInst &CI, MachineIRBuilder &MIRBuilder,
247 bool translateTrap(const CallInst &U, MachineIRBuilder &MIRBuilder,
254 MachineIRBuilder &MIRBuilder);
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| H A D | CallLowering.h | 243 MachineIRBuilder &MIRBuilder; member
247 ValueHandler(bool IsIncoming, MachineIRBuilder &MIRBuilder, in ValueHandler()
249 : MIRBuilder(MIRBuilder), MRI(MRI), in ValueHandler()
332 IncomingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingValueHandler()
333 : ValueHandler(/*IsIncoming*/ true, MIRBuilder, MRI) {} in IncomingValueHandler()
348 OutgoingValueHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in OutgoingValueHandler()
349 : ValueHandler(/*IsIncoming*/ false, MIRBuilder, MRI) {} in OutgoingValueHandler()
414 SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder,
424 MachineIRBuilder &MIRBuilder,
464 void insertSRetLoads(MachineIRBuilder &MIRBuilder, Type *RetTy,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVGlobalRegistry.cpp | 61 const Type *Type, Register VReg, MachineIRBuilder &MIRBuilder, in assignTypeToVReg() argument
64 getOrCreateSPIRVType(Type, MIRBuilder, AccessQual, EmitIR); in assignTypeToVReg()
65 assignSPIRVTypeToVReg(SpirvType, VReg, MIRBuilder.getMF()); in assignTypeToVReg()
75 static Register createTypeVReg(MachineIRBuilder &MIRBuilder) { in createTypeVReg() argument
76 auto &MRI = MIRBuilder.getMF().getRegInfo(); in createTypeVReg()
88 SPIRVType *SPIRVGlobalRegistry::getOpTypeBool(MachineIRBuilder &MIRBuilder) { in getOpTypeBool() argument
89 return MIRBuilder.buildInstr(SPIRV::OpTypeBool) in getOpTypeBool()
90 .addDef(createTypeVReg(MIRBuilder)); in getOpTypeBool()
112 MachineIRBuilder &MIRBuilder, in getOpTypeInt() argument
116 cast<SPIRVSubtarget>(MIRBuilder.getMF().getSubtarget()); in getOpTypeInt()
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| H A D | SPIRVBuiltins.cpp | 393 buildBoolRegister(MachineIRBuilder &MIRBuilder, const SPIRVType *ResultType, in buildBoolRegister() argument
396 SPIRVType *BoolType = GR->getOrCreateSPIRVBoolType(MIRBuilder); in buildBoolRegister()
401 GR->getOrCreateSPIRVVectorType(BoolType, VectorElements, MIRBuilder); in buildBoolRegister()
410 MIRBuilder.getMRI()->createGenericVirtualRegister(Type); in buildBoolRegister()
411 MIRBuilder.getMRI()->setRegClass(ResultRegister, &SPIRV::IDRegClass); in buildBoolRegister()
412 GR->assignSPIRVTypeToVReg(BoolType, ResultRegister, MIRBuilder.getMF()); in buildBoolRegister()
418 static bool buildSelectInst(MachineIRBuilder &MIRBuilder, in buildSelectInst() argument
427 TrueConst = GR->getOrCreateConsIntVector(AllOnes, MIRBuilder, ReturnType); in buildSelectInst()
428 FalseConst = GR->getOrCreateConsIntVector(0, MIRBuilder, ReturnType); in buildSelectInst()
430 TrueConst = GR->buildConstantInt(1, MIRBuilder, ReturnType); in buildSelectInst()
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| H A D | SPIRVCallLowering.cpp | 35 bool SPIRVCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
41 produceIndirectPtrTypes(MIRBuilder); in lowerReturn()
50 const auto &STI = MIRBuilder.getMF().getSubtarget(); in lowerReturn()
51 return MIRBuilder.buildInstr(SPIRV::OpReturnValue) in lowerReturn()
53 .constrainAllUses(MIRBuilder.getTII(), *STI.getRegisterInfo(), in lowerReturn()
56 MIRBuilder.buildInstr(SPIRV::OpReturn); in lowerReturn()
191 MachineIRBuilder &MIRBuilder, in getArgSPIRVType() argument
202 return GR->getOrCreateSPIRVType(OriginalArgType, MIRBuilder, ArgAccessQual); in getArgSPIRVType()
208 cast<TypedPointerType>(ArgType)->getElementType(), MIRBuilder); in getArgSPIRVType()
210 ElementType, MIRBuilder, in getArgSPIRVType()
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| H A D | SPIRVGlobalRegistry.h | 62 MachineIRBuilder &MIRBuilder);
87 SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
91 SPIRVType *findSPIRVType(const Type *Ty, MachineIRBuilder &MIRBuilder,
96 restOfCreateSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
275 MachineIRBuilder &MIRBuilder,
298 MachineIRBuilder &MIRBuilder,
318 StringRef TypeStr, MachineIRBuilder &MIRBuilder,
394 SPIRVType *getOpTypeBool(MachineIRBuilder &MIRBuilder);
399 SPIRVType *getOpTypeInt(unsigned Width, MachineIRBuilder &MIRBuilder,
402 SPIRVType *getOpTypeFloat(uint32_t Width, MachineIRBuilder &MIRBuilder);
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 107 : MIRBuilder(Builder), Observer(Observer), MRI(MF.getRegInfo()), in LegalizerHelper()
114 : MIRBuilder(B), Observer(Observer), MRI(MF.getRegInfo()), LI(LI), in LegalizerHelper()
122 MIRBuilder.setInstrAndDebugLoc(MI); in legalizeInstrStep()
171 MIRBuilder.buildMergeLikeInstr(DstReg, PartRegs); in insertParts()
176 MIRBuilder.buildConcatVectors(DstReg, PartRegs); in insertParts()
178 MIRBuilder.buildBuildVector(DstReg, PartRegs); in insertParts()
204 MIRBuilder, MRI); in appendVectorElts()
221 MIRBuilder.buildMergeLikeInstr(DstReg, AllElts); in mergeMixedSubvectors()
245 auto Unmerge = MIRBuilder.buildUnmerge(GCDTy, SrcReg); in extractGCDType()
273 PadReg = MIRBuilder.buildConstant(GCDTy, 0).getReg(0); in buildLCMMergePieces()
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| H A D | IRTranslator.cpp | 301 MachineIRBuilder &MIRBuilder) { in translateBinaryOp() argument
315 MIRBuilder.buildInstr(Opcode, {Res}, {Op0, Op1}, Flags); in translateBinaryOp()
320 MachineIRBuilder &MIRBuilder) { in translateUnaryOp() argument
328 MIRBuilder.buildInstr(Opcode, {Res}, {Op0}, Flags); in translateUnaryOp()
332 bool IRTranslator::translateFNeg(const User &U, MachineIRBuilder &MIRBuilder) { in translateFNeg() argument
333 return translateUnaryOp(TargetOpcode::G_FNEG, U, MIRBuilder); in translateFNeg()
337 MachineIRBuilder &MIRBuilder) { in translateCompare() argument
344 MIRBuilder.buildICmp(Pred, Res, Op0, Op1); in translateCompare()
346 MIRBuilder.buildCopy( in translateCompare()
349 MIRBuilder.buildCopy( in translateCompare()
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| H A D | InlineAsmLowering.cpp | 81 MachineIRBuilder &MIRBuilder, in getRegistersForValue() argument
183 MachineIRBuilder &MIRBuilder) { in buildAnyextOrCopy() argument
185 MIRBuilder.getMF().getSubtarget().getRegisterInfo(); in buildAnyextOrCopy()
186 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in buildAnyextOrCopy()
208 Src = MIRBuilder.buildAnyExt(LLT::scalar(DstSize), Src).getReg(0); in buildAnyextOrCopy()
211 MIRBuilder.buildCopy(Dst, Src); in buildAnyextOrCopy()
216 MachineIRBuilder &MIRBuilder, const CallBase &Call, in lowerInlineAsm() argument
224 MachineFunction &MF = MIRBuilder.getMF(); in lowerInlineAsm()
229 MachineRegisterInfo *MRI = MIRBuilder.getMRI(); in lowerInlineAsm()
299 auto Inst = MIRBuilder.buildInstrNoInsert(TargetOpcode::INLINEASM) in lowerInlineAsm()
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| H A D | Legalizer.cpp | 180 MachineIRBuilder &MIRBuilder, in legalizeMachineFunction() argument
182 MIRBuilder.setMF(MF); in legalizeMachineFunction()
220 LegalizerHelper Helper(MF, LI, WrapperObserver, MIRBuilder, KB); in legalizeMachineFunction()
221 LegalizationArtifactCombiner ArtCombiner(MIRBuilder, MRI, LI, KB); in legalizeMachineFunction()
256 Helper.MIRBuilder.stopObservingChanges(); in legalizeMachineFunction()
271 Helper.MIRBuilder.stopObservingChanges(); in legalizeMachineFunction()
322 std::unique_ptr<MachineIRBuilder> MIRBuilder; in runOnMachineFunction() local
328 MIRBuilder = std::make_unique<CSEMIRBuilder>(); in runOnMachineFunction()
330 MIRBuilder->setCSEInfo(CSEInfo); in runOnMachineFunction()
332 MIRBuilder in runOnMachineFunction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 31 M68kFormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in M68kFormalArgHandler()
32 : M68kIncomingValueHandler(MIRBuilder, MRI) {} in M68kFormalArgHandler()
36 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler()
38 : M68kIncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in CallReturnHandler()
53 M68kOutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in M68kOutgoingArgHandler()
55 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB), in M68kOutgoingArgHandler()
56 DL(MIRBuilder.getMF().getDataLayout()), in M68kOutgoingArgHandler()
57 STI(MIRBuilder.getMF().getSubtarget<M68kSubtarget>()) {} in M68kOutgoingArgHandler()
63 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
69 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
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| H A D | M68kCallLowering.h | 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
38 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
42 bool lowerCall(MachineIRBuilder &MIRBuilder,
48 M68kIncomingValueHandler(MachineIRBuilder &MIRBuilder, in M68kIncomingValueHandler()
50 : CallLowering::IncomingValueHandler(MIRBuilder, MRI) {} in M68kIncomingValueHandler()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 87 X86OutgoingValueHandler(MachineIRBuilder &MIRBuilder, in X86OutgoingValueHandler()
89 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB), in X86OutgoingValueHandler()
90 DL(MIRBuilder.getMF().getDataLayout()), in X86OutgoingValueHandler()
91 STI(MIRBuilder.getMF().getSubtarget<X86Subtarget>()) {} in X86OutgoingValueHandler()
99 MIRBuilder.buildCopy(p0, STI.getRegisterInfo()->getStackRegister()); in getStackAddress()
101 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress()
103 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
105 MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); in getStackAddress()
113 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
119 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsLegalizerInfo.cpp | 338 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
339 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
368 MachineFunction &MF = MIRBuilder.getMF(); in legalizeCustom()
376 Val = MIRBuilder.buildAnyExt(s32, Val).getReg(0); in legalizeCustom()
378 Val = MIRBuilder.buildAnyExt(s64, Val).getReg(0); in legalizeCustom()
380 auto C_P2HalfMemSize = MIRBuilder.buildConstant(s32, P2HalfMemSize); in legalizeCustom()
381 auto Addr = MIRBuilder.buildPtrAdd(PtrTy, BaseAddr, C_P2HalfMemSize); in legalizeCustom()
384 MIRBuilder.buildStore(Val, BaseAddr, *P2HalfMemOp); in legalizeCustom()
385 auto C_P2Half_InBits = MIRBuilder.buildConstant(s32, P2HalfMemSize * 8); in legalizeCustom()
386 auto Shift = MIRBuilder.buildLShr(s32, Val, C_P2Half_InBits); in legalizeCustom()
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| H A D | MipsCallLowering.cpp | 89 MipsIncomingValueHandler(MachineIRBuilder &MIRBuilder, in MipsIncomingValueHandler() argument
91 : IncomingValueHandler(MIRBuilder, MRI), in MipsIncomingValueHandler()
92 STI(MIRBuilder.getMF().getSubtarget<MipsSubtarget>()) {} in MipsIncomingValueHandler()
110 MIRBuilder.getMRI()->addLiveIn(PhysReg); in markPhysRegUsed()
111 MIRBuilder.getMBB().addLiveIn(PhysReg); in markPhysRegUsed()
117 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler()
119 : MipsIncomingValueHandler(MIRBuilder, MRI), MIB(MIB) {}
143 MachineFunction &MF = MIRBuilder.getMF(); in getStackAddress()
148 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
150 return MIRBuilder in getStackAddress()
116 CallReturnHandler(MachineIRBuilder & MIRBuilder,MachineRegisterInfo & MRI,MachineInstrBuilder & MIB) CallReturnHandler() argument
196 MipsOutgoingValueHandler(MachineIRBuilder & MIRBuilder,MachineRegisterInfo & MRI,MachineInstrBuilder & MIB) MipsOutgoingValueHandler() argument
315 lowerReturn(MachineIRBuilder & MIRBuilder,const Value * Val,ArrayRef<Register> VRegs,FunctionLoweringInfo & FLI) const lowerReturn() argument
358 lowerFormalArguments(MachineIRBuilder & MIRBuilder,const Function & F,ArrayRef<ArrayRef<Register>> VRegs,FunctionLoweringInfo & FLI) const lowerFormalArguments() argument
445 lowerCall(MachineIRBuilder & MIRBuilder,CallLoweringInfo & Info) const lowerCall() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMCallLowering.cpp | 97 ARMOutgoingValueHandler(MachineIRBuilder &MIRBuilder, in ARMOutgoingValueHandler()
99 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in ARMOutgoingValueHandler()
109 auto SPReg = MIRBuilder.buildCopy(p0, Register(ARM::SP)); in getStackAddress()
111 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress()
113 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
115 MPO = MachinePointerInfo::getStack(MIRBuilder.getMF(), Offset); in getStackAddress()
128 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
136 auto MMO = MIRBuilder.getMF().getMachineMemOperand( in assignValueToAddress()
138 MIRBuilder.buildStore(ExtReg, Addr, *MMO); in assignValueToAddress()
165 MIRBuilder.buildUnmerge(NewRegs, Arg.Regs[0]); in assignCustomValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCCallLowering.cpp | 34 OutgoingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in OutgoingArgHandler()
36 : OutgoingValueHandler(MIRBuilder, MRI), MIB(MIB) {} in OutgoingArgHandler()
55 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
74 bool PPCCallLowering::lowerReturn(MachineIRBuilder &MIRBuilder, in lowerReturn() argument
78 auto MIB = MIRBuilder.buildInstrNoInsert(PPC::BLR8); in lowerReturn()
80 MachineFunction &MF = MIRBuilder.getMF(); in lowerReturn()
98 OutgoingArgHandler ArgHandler(MIRBuilder, MRI, MIB); in lowerReturn()
102 MIRBuilder, F.getCallingConv(), in lowerReturn()
105 MIRBuilder.insertInstr(MIB); in lowerReturn()
109 bool PPCCallLowering::lowerCall(MachineIRBuilder &MIRBuilder, in lowerCall() argument
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| H A D | PPCCallLowering.h | 29 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
32 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
35 bool lowerCall(MachineIRBuilder &MIRBuilder,
41 PPCIncomingValueHandler(MachineIRBuilder &MIRBuilder, in PPCIncomingValueHandler() argument
43 : CallLowering::IncomingValueHandler(MIRBuilder, MRI) {} in PPCIncomingValueHandler()
67 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
68 : PPCIncomingValueHandler(MIRBuilder, MRI) {}
66 FormalArgHandler(MachineIRBuilder & MIRBuilder,MachineRegisterInfo & MRI) FormalArgHandler() argument
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVCallLowering.cpp | 69 Subtarget(MIRBuilder.getMF().getSubtarget<RISCVSubtarget>()) {} in RISCVOutgoingValueHandler()
73 MachineFunction &MF = MIRBuilder.getMF(); in getStackAddress()
78 SPReg = MIRBuilder.buildCopy(p0, Register(RISCV::X2)).getReg(0); in getStackAddress()
80 auto OffsetReg = MIRBuilder.buildConstant(sXLen, Offset); in getStackAddress()
82 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
91 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
100 MIRBuilder.buildStore(ExtReg, Addr, *MMO); in assignValueToAddress()
111 ValVReg = MIRBuilder.buildAnyExt(DstTy, ValVReg).getReg(0); in assignValueToReg()
115 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
136 MIRBuilder.buildUnmerge(NewRegs, Arg.Regs[0]); in assignCustomValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64CallLowering.cpp | 139 IncomingArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in IncomingArgHandler()
140 : IncomingValueHandler(MIRBuilder, MRI) {} in IncomingArgHandler()
145 auto &MFI = MIRBuilder.getMF().getFrameInfo(); in getStackAddress()
152 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
153 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); in getStackAddress()
175 MachineFunction &MF = MIRBuilder.getMF(); in assignValueToAddress()
196 MIRBuilder.buildLoadInstr(TargetOpcode::G_ZEXTLOAD, ValVReg, Addr, *MMO); in assignValueToAddress()
199 MIRBuilder.buildLoadInstr(TargetOpcode::G_SEXTLOAD, ValVReg, Addr, *MMO); in assignValueToAddress()
202 MIRBuilder.buildLoad(ValVReg, Addr, *MMO); in assignValueToAddress()
214 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
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| H A D | AArch64LegalizerInfo.cpp | 1300 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
1301 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
1308 return legalizeVaArg(MI, MRI, MIRBuilder); in legalizeCustom()
1311 return legalizeLoadStore(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1315 return legalizeShlAshrLshr(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1317 return legalizeSmallCMGlobalValue(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1323 return legalizeFunnelShift(MI, MRI, MIRBuilder, Observer, Helper); in legalizeCustom()
1346 return legalizeICMP(MI, MRI, MIRBuilder); in legalizeCustom()
1354 MachineIRBuilder &MIRBuilder, in legalizeFunnelShift() argument
1387 auto Cast64 = MIRBuilder.buildConstant(LLT::scalar(64), Amount.zext(64)); in legalizeFunnelShift()
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| H A D | AArch64CallLowering.h | 34 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val,
44 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F,
48 bool lowerCall(MachineIRBuilder &MIRBuilder,
53 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder,
69 void saveVarArgRegisters(MachineIRBuilder &MIRBuilder,
73 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info,
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| H A D | AArch64LegalizerInfo.h | 38 MachineIRBuilder &MIRBuilder) const;
40 MachineIRBuilder &MIRBuilder,
43 MachineIRBuilder &MIRBuilder,
47 MachineIRBuilder &MIRBuilder,
54 MachineIRBuilder &MIRBuilder) const;
56 MachineIRBuilder &MIRBuilder,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 39 return Handler.MIRBuilder.buildAnyExt(LLT::scalar(32), ValVReg).getReg(0); in extendRegisterMin32()
81 ExtReg = MIRBuilder.buildPtrToInt(S32, ExtReg).getReg(0); in assignValueToReg()
83 ExtReg = MIRBuilder.buildBitcast(S32, ExtReg).getReg(0); in assignValueToReg()
86 auto ToSGPR = MIRBuilder in assignValueToReg()
93 MIRBuilder.buildCopy(PhysReg, ExtReg); in assignValueToReg()
107 auto &MFI = MIRBuilder.getMF().getFrameInfo(); in getStackAddress()
113 MPO = MachinePointerInfo::getFixedStack(MIRBuilder.getMF(), FI); in getStackAddress()
114 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress()
127 auto Copy = MIRBuilder.buildCopy(LLT::scalar(32), PhysReg); in assignValueToReg()
133 MIRBuilder.buildTrunc(ValVReg, Extended); in assignValueToReg()
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