Lines Matching refs:MIRBuilder
1300 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCustom() local
1301 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCustom()
1308 return legalizeVaArg(MI, MRI, MIRBuilder); in legalizeCustom()
1311 return legalizeLoadStore(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1315 return legalizeShlAshrLshr(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1317 return legalizeSmallCMGlobalValue(MI, MRI, MIRBuilder, Observer); in legalizeCustom()
1323 return legalizeFunnelShift(MI, MRI, MIRBuilder, Observer, Helper); in legalizeCustom()
1346 return legalizeICMP(MI, MRI, MIRBuilder); in legalizeCustom()
1354 MachineIRBuilder &MIRBuilder, in legalizeFunnelShift() argument
1387 auto Cast64 = MIRBuilder.buildConstant(LLT::scalar(64), Amount.zext(64)); in legalizeFunnelShift()
1397 MIRBuilder.buildInstr(TargetOpcode::G_FSHR, {MI.getOperand(0).getReg()}, in legalizeFunnelShift()
1407 MachineIRBuilder &MIRBuilder) const { in legalizeICMP()
1426 MIRBuilder in legalizeICMP()
1429 MIRBuilder.buildNot(DstReg, CmpReg); in legalizeICMP()
1445 auto NewAmt = Helper.MIRBuilder.buildZExt(LLT::scalar(64), AmtReg); in legalizeRotate()
1453 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeSmallCMGlobalValue() argument
1476 auto ADRP = MIRBuilder.buildInstr(AArch64::ADRP, {LLT::pointer(0, 64)}, {}) in legalizeSmallCMGlobalValue()
1497 ADRP = MIRBuilder.buildInstr(AArch64::MOVKXi, {LLT::pointer(0, 64)}, {ADRP}) in legalizeSmallCMGlobalValue()
1504 MIRBuilder.buildInstr(AArch64::G_ADD_LOW, {DstReg}, {ADRP}) in legalizeSmallCMGlobalValue()
1538 MachineIRBuilder &MIB = Helper.MIRBuilder; in legalizeIntrinsic()
1692 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeShlAshrLshr() argument
1707 auto ExtCst = MIRBuilder.buildConstant(LLT::scalar(64), Amount); in legalizeShlAshrLshr()
1731 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &MIRBuilder, in legalizeLoadStore() argument
1773 NewI = MIRBuilder.buildInstr(Opcode, {s64, s64}, {}); in legalizeLoadStore()
1774 MIRBuilder.buildMergeLikeInstr( in legalizeLoadStore()
1777 auto Split = MIRBuilder.buildUnmerge(s64, MI.getOperand(0)); in legalizeLoadStore()
1778 NewI = MIRBuilder.buildInstr( in legalizeLoadStore()
1812 auto Bitcast = MIRBuilder.buildBitcast(NewTy, ValReg); in legalizeLoadStore()
1813 MIRBuilder.buildStore(Bitcast.getReg(0), MI.getOperand(1), MMO); in legalizeLoadStore()
1815 auto NewLoad = MIRBuilder.buildLoad(NewTy, MI.getOperand(1), MMO); in legalizeLoadStore()
1816 MIRBuilder.buildBitcast(ValReg, NewLoad); in legalizeLoadStore()
1824 MachineIRBuilder &MIRBuilder) const { in legalizeVaArg()
1825 MachineFunction &MF = MIRBuilder.getMF(); in legalizeVaArg()
1835 auto List = MIRBuilder.buildLoad( in legalizeVaArg()
1844 MIRBuilder.buildConstant(IntPtrTy, Alignment.value() - 1); in legalizeVaArg()
1845 auto ListTmp = MIRBuilder.buildPtrAdd(PtrTy, List, AlignMinus1.getReg(0)); in legalizeVaArg()
1846 DstPtr = MIRBuilder.buildMaskLowPtrBits(PtrTy, ListTmp, Log2(Alignment)); in legalizeVaArg()
1852 MIRBuilder.buildLoad( in legalizeVaArg()
1857 auto Size = MIRBuilder.buildConstant(IntPtrTy, alignTo(ValSize, PtrAlign)); in legalizeVaArg()
1859 auto NewList = MIRBuilder.buildPtrAdd(PtrTy, DstPtr, Size.getReg(0)); in legalizeVaArg()
1861 MIRBuilder.buildStore(NewList, ListPtr, in legalizeVaArg()
1901 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCTPOP() local
1913 auto Split = MIRBuilder.buildUnmerge(s64, Val); in legalizeCTPOP()
1914 auto CTPOP1 = MIRBuilder.buildCTPOP(s64, Split->getOperand(0)); in legalizeCTPOP()
1915 auto CTPOP2 = MIRBuilder.buildCTPOP(s64, Split->getOperand(1)); in legalizeCTPOP()
1916 auto Add = MIRBuilder.buildAdd(s64, CTPOP1, CTPOP2); in legalizeCTPOP()
1918 MIRBuilder.buildZExt(Dst, Add); in legalizeCTPOP()
1938 Val = MIRBuilder.buildZExt(LLT::scalar(64), Val).getReg(0); in legalizeCTPOP()
1941 Val = MIRBuilder.buildBitcast(VTy, Val).getReg(0); in legalizeCTPOP()
1944 auto CTPOP = MIRBuilder.buildCTPOP(VTy, Val); in legalizeCTPOP()
1951 auto Zeros = MIRBuilder.buildConstant(Dt, 0); in legalizeCTPOP()
1952 auto Ones = MIRBuilder.buildConstant(VTy, 1); in legalizeCTPOP()
1957 MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
1958 Sum = MIRBuilder.buildInstr(AArch64::G_UADDLP, {Ty}, {UDOT}); in legalizeCTPOP()
1960 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
1962 Sum = MIRBuilder.buildInstr(AArch64::G_UDOT, {Dt}, {Zeros, Ones, CTPOP}); in legalizeCTPOP()
2001 UADD = MIRBuilder.buildIntrinsic(Opc, {HTy}).addUse(HSum); in legalizeCTPOP()
2007 MIRBuilder.buildZExt(Dst, UADD); in legalizeCTPOP()
2016 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeAtomicCmpxchg128() local
2019 auto DesiredI = MIRBuilder.buildUnmerge({s64, s64}, MI.getOperand(2)); in legalizeAtomicCmpxchg128()
2020 auto NewI = MIRBuilder.buildUnmerge({s64, s64}, MI.getOperand(3)); in legalizeAtomicCmpxchg128()
2057 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASDesired}, {}) in legalizeAtomicCmpxchg128()
2062 MIRBuilder.buildInstr(TargetOpcode::REG_SEQUENCE, {CASNew}, {}) in legalizeAtomicCmpxchg128()
2068 CAS = MIRBuilder.buildInstr(Opcode, {CASDst}, {CASDesired, CASNew, Addr}); in legalizeAtomicCmpxchg128()
2070 MIRBuilder.buildExtract({DstLo}, {CASDst}, 0); in legalizeAtomicCmpxchg128()
2071 MIRBuilder.buildExtract({DstHi}, {CASDst}, 64); in legalizeAtomicCmpxchg128()
2095 CAS = MIRBuilder.buildInstr(Opcode, {DstLo, DstHi, Scratch}, in legalizeAtomicCmpxchg128()
2106 MIRBuilder.buildMergeLikeInstr(MI.getOperand(0), {DstLo, DstHi}); in legalizeAtomicCmpxchg128()
2113 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeCTTZ() local
2114 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeCTTZ()
2116 auto BitReverse = MIRBuilder.buildBitReverse(Ty, MI.getOperand(1)); in legalizeCTTZ()
2117 MIRBuilder.buildCTLZ(MI.getOperand(0).getReg(), BitReverse); in legalizeCTTZ()
2124 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeMemOps() local
2132 MIRBuilder.buildAnyExt(LLT::scalar(64), Value).getReg(0); in legalizeMemOps()
2154 MachineIRBuilder &MIRBuilder = Helper.MIRBuilder; in legalizeDynStackAlloc() local
2155 MachineRegisterInfo &MRI = *MIRBuilder.getMRI(); in legalizeDynStackAlloc()
2181 MIRBuilder.buildInstr(AArch64::PROBED_STACKALLOC_DYN, {}, {SPTmp}); in legalizeDynStackAlloc()
2183 MIRBuilder.setInsertPt(*NewMI->getParent(), NewMI); in legalizeDynStackAlloc()
2184 MIRBuilder.buildCopy(Dst, SPTmp); in legalizeDynStackAlloc()
2192 MachineIRBuilder &MIB = Helper.MIRBuilder; in legalizePrefetch()