Lo (reference) in projects: freebsd - OpenGrok search results

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Searched refs:Lo (Results 1 – 25 of 149) sorted by relevance

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/freebsd/crypto/heimdal/lib/wind/
H A D	UnicodeData.txt	444 01BB;LATIN LETTER TWO WITH STROKE;Lo;0;L;;;;;N;LATIN LETTER TWO BAR;;;; 449 01C0;LATIN LETTER DENTAL CLICK;Lo;0;L;;;;;N;LATIN LETTER PIPE;;;; 450 01C1;LATIN LETTER LATERAL CLICK;Lo;0;L;;;;;N;LATIN LETTER DOUBLE PIPE;;;; 451 01C2;LATIN LETTER ALVEOLAR CLICK;Lo;0;L;;;;;N;LATIN LETTER PIPE DOUBLE BAR;;;; 452 01C3;LATIN LETTER RETROFLEX CLICK;Lo;0;L;;;;;N;LATIN LETTER EXCLAMATION MARK;;;; 1369 05D0;HEBREW LETTER ALEF;Lo;0;R;;;;;N;;;;; 1370 05D1;HEBREW LETTER BET;Lo;0;R;;;;;N;;;;; 1371 05D2;HEBREW LETTER GIMEL;Lo;0;R;;;;;N;;;;; 1372 05D3;HEBREW LETTER DALET;Lo;0;R;;;;;N;;;;; 1373 05D4;HEBREW LETTER HE;Lo;0;R;;;;;N;;;;; [all …]
H A D	DerivedNormalizationProps.txt	594 0958..095F ; Full_Composition_Exclusion # Lo [8] DEVANAGARI LETTER QA..DEVANAGARI LETTER YYA 595 09DC..09DD ; Full_Composition_Exclusion # Lo [2] BENGALI LETTER RRA..BENGALI LETTER RHA 596 09DF ; Full_Composition_Exclusion # Lo BENGALI LETTER YYA 597 0A33 ; Full_Composition_Exclusion # Lo GURMUKHI LETTER LLA 598 0A36 ; Full_Composition_Exclusion # Lo GURMUKHI LETTER SHA 599 0A59..0A5B ; Full_Composition_Exclusion # Lo [3] GURMUKHI LETTER KHHA..GURMUKHI LETTER ZA 600 0A5E ; Full_Composition_Exclusion # Lo GURMUKHI LETTER FA 601 0B5C..0B5D ; Full_Composition_Exclusion # Lo [2] ORIYA LETTER RRA..ORIYA LETTER RHA 602 0F43 ; Full_Composition_Exclusion # Lo TIBETAN LETTER GHA 603 0F4D ; Full_Composition_Exclusion # Lo TIBETAN LETTER DDHA [all …]
/freebsd/sys/contrib/dev/acpica/components/utilities/
H A D	utmath.c	163 UINT32 Lo; member 218 ACPI_MUL_64_BY_32 (0, MultiplicandOvl.Part.Lo, Multiplier, in AcpiUtShortMultiply() 219 Product.Part.Lo, Carry32); in AcpiUtShortMultiply() 262 OperandOvl.Part.Hi = OperandOvl.Part.Lo; in AcpiUtShortShiftLeft() 263 OperandOvl.Part.Lo = 0; in AcpiUtShortShiftLeft() 267 OperandOvl.Part.Lo, Count); in AcpiUtShortShiftLeft() 307 OperandOvl.Part.Lo = OperandOvl.Part.Hi; in AcpiUtShortShiftRight() 312 OperandOvl.Part.Lo, Count); in AcpiUtShortShiftRight() 476 ACPI_DIV_64_BY_32 (Remainder32, DividendOvl.Part.Lo, Divisor, in AcpiUtShortDivide() 477 Quotient.Part.Lo, Remainder32); in AcpiUtShortDivide() [all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A D	LegalizeTypes.h	227 SDValue JoinIntegers(SDValue Lo, SDValue Hi); 234 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi); 236 SDValue &Lo, SDValue &Hi); 437 /// equal to the bits of Lo; the high bits exactly equal Hi. 439 /// method returns the two i32's, with Lo being equal to the lower 32 bits of 441 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi); 442 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi); 446 void ExpandIntRes_ANY_EXTEND (SDNode N, SDValue &Lo, SDValue &Hi); 447 void ExpandIntRes_AssertSext (SDNode N, SDValue &Lo, SDValue &Hi); 448 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValu 1136 GetSplitOp(SDValue Op,SDValue & Lo,SDValue & Hi) GetSplitOp() argument 1168 GetExpandedOp(SDValue Op,SDValue & Lo,SDValue & Hi) GetExpandedOp() argument [all...]
H A D	LegalizeTypesGeneric.cpp	13 // computation in two identical registers of a smaller type. The Lo/Hi part 31 // These routines assume that the Lo/Hi part is stored first in memory on 32 // little/big-endian machines, followed by the Hi/Lo part. This means that 33 // they cannot be used as is on vectors, for which Lo is always stored first. 35 SDValue &Lo, SDValue &Hi) { in ExpandRes_MERGE_VALUES() argument 37 GetExpandedOp(Op, Lo, Hi); in ExpandRes_MERGE_VALUES() 40 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode N, SDValue &Lo, SDValue &Hi) { in ExpandRes_BITCAST() argument 57 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi); in ExpandRes_BITCAST() 58 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); in ExpandRes_BITCAST() 190 ExpandRes_BUILD_PAIR(SDNode N,SDValue & Lo,SDValue & Hi) ExpandRes_BUILD_PAIR() argument 197 ExpandRes_EXTRACT_ELEMENT(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_EXTRACT_ELEMENT() argument 208 ExpandRes_EXTRACT_VECTOR_ELT(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_EXTRACT_VECTOR_ELT() argument 247 ExpandRes_NormalLoad(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_NormalLoad() argument 287 ExpandRes_VAARG(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_VAARG() argument 385 SDValue Lo, Hi; ExpandOp_BUILD_VECTOR() local 401 SDValue Lo, Hi; ExpandOp_EXTRACT_ELEMENT() local 425 SDValue Lo, Hi; ExpandOp_INSERT_VECTOR_ELT() local 472 SDValue Lo, Hi; ExpandOp_NormalStore() local 501 SplitRes_MERGE_VALUES(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitRes_MERGE_VALUES() argument 506 SplitRes_Select(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_Select() argument 554 SplitRes_SELECT_CC(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_SELECT_CC() argument 567 SplitRes_UNDEF(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_UNDEF() argument 574 SplitVecRes_AssertZext(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_AssertZext() argument 584 SplitRes_FREEZE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_FREEZE() argument 593 SplitRes_ARITH_FENCE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_ARITH_FENCE() argument [all...]
H A D	LegalizeIntegerTypes.cpp	505 SDValue Lo, Hi; in PromoteIntRes_BITCAST() local 506 GetSplitVector(N->getOperand(0), Lo, Hi); in PromoteIntRes_BITCAST() 507 Lo = BitConvertToInteger(Lo); in PromoteIntRes_BITCAST() 511 std::swap(Lo, Hi); in PromoteIntRes_BITCAST() 516 JoinIntegers(Lo, Hi)); in PromoteIntRes_BITCAST() 1531 SDValue Lo = GetPromotedInteger(N->getOperand(1)); in PromoteIntRes_FunnelShift() local 1539 EVT VT = Lo.getValueType(); in PromoteIntRes_FunnelShift() 1558 Lo = DAG.getZeroExtendInReg(Lo, DL, OldVT); in PromoteIntRes_FunnelShift() 1559 SDValue Res = DAG.getNode(ISD::OR, DL, VT, Hi, Lo); in PromoteIntRes_FunnelShift() 1568 Lo = DAG.getNode(ISD::SHL, DL, VT, Lo, ShiftOffset); in PromoteIntRes_FunnelShift() [all …]
H A D	LegalizeTypes.cpp	772 void DAGTypeLegalizer::GetExpandedInteger(SDValue Op, SDValue &Lo, in GetExpandedInteger() argument 776 Lo = getSDValue(Entry.first); in GetExpandedInteger() 780 void DAGTypeLegalizer::SetExpandedInteger(SDValue Op, SDValue Lo, in SetExpandedInteger() argument 782 assert(Lo.getValueType() == in SetExpandedInteger() 784 Hi.getValueType() == Lo.getValueType() && in SetExpandedInteger() 787 AnalyzeNewValue(Lo); in SetExpandedInteger() 794 DAG.transferDbgValues(Op, Lo, Hi.getValueSizeInBits(), in SetExpandedInteger() 795 Lo.getValueSizeInBits()); in SetExpandedInteger() 797 DAG.transferDbgValues(Op, Lo, 0, Lo.getValueSizeInBits(), false); in SetExpandedInteger() 798 DAG.transferDbgValues(Op, Hi, Lo.getValueSizeInBits(), in SetExpandedInteger() [all …]
H A D	LegalizeFloatTypes.cpp	1374 SDValue Lo, Hi; in ExpandFloatResult() local 1375 Lo = Hi = SDValue(); in ExpandFloatResult() 1390 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; in ExpandFloatResult() 1391 case ISD::SELECT: SplitRes_Select(N, Lo, Hi); break; in ExpandFloatResult() 1392 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; in ExpandFloatResult() 1394 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; in ExpandFloatResult() 1395 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; in ExpandFloatResult() 1396 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; in ExpandFloatResult() 1397 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandFloatResult() 1398 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break; in ExpandFloatResult() [all …]
H A D	LegalizeVectorTypes.cpp	1058 SDValue Lo, Hi; in SplitVectorResult() 1074 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; in SplitVectorResult() 1075 case ISD::AssertZext: SplitVecRes_AssertZext(N, Lo, Hi); break; in SplitVectorResult() 1079 case ISD::VP_SELECT: SplitRes_Select(N, Lo, Hi); break; in SplitVectorResult() 1080 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; in SplitVectorResult() 1081 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; in SplitVectorResult() 1082 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; in SplitVectorResult() 1083 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break; in SplitVectorResult() 1084 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; in SplitVectorResult() 1085 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, H in SplitVectorResult() 1054 SDValue Lo, Hi; SplitVectorResult() local 1371 SplitVecRes_BinOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_BinOp() argument 1402 SplitVecRes_TernaryOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_TernaryOp() argument 1436 SplitVecRes_CMP(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_CMP() argument 1457 SplitVecRes_FIX(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_FIX() argument 1472 SplitVecRes_BITCAST(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_BITCAST() argument 1539 SplitVecRes_BUILD_VECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_BUILD_VECTOR() argument 1552 SplitVecRes_CONCAT_VECTORS(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_CONCAT_VECTORS() argument 1573 SplitVecRes_EXTRACT_SUBVECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_EXTRACT_SUBVECTOR() argument 1589 SplitVecRes_INSERT_SUBVECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_INSERT_SUBVECTOR() argument 1657 SplitVecRes_FPOp_MultiType(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_FPOp_MultiType() argument 1680 SplitVecRes_IS_FPCLASS(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_IS_FPCLASS() argument 1697 SplitVecRes_InregOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_InregOp() argument 1713 SplitVecRes_ExtVecInRegOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ExtVecInRegOp() argument 1751 SplitVecRes_StrictFPOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_StrictFPOp() argument 1859 SplitVecRes_OverflowOp(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitVecRes_OverflowOp() argument 1901 SplitVecRes_INSERT_VECTOR_ELT(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_INSERT_VECTOR_ELT() argument 1977 SplitVecRes_STEP_VECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_STEP_VECTOR() argument 2000 SplitVecRes_ScalarOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ScalarOp() argument 2014 SplitVecRes_VP_SPLAT(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_SPLAT() argument 2024 SplitVecRes_LOAD(LoadSDNode * LD,SDValue & Lo,SDValue & Hi) SplitVecRes_LOAD() argument 2070 SplitVecRes_VP_LOAD(VPLoadSDNode * LD,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_LOAD() argument 2152 SplitVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode * SLD,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_STRIDED_LOAD() argument 2233 SplitVecRes_MLOAD(MaskedLoadSDNode * MLD,SDValue & Lo,SDValue & Hi) SplitVecRes_MLOAD() argument 2316 SplitVecRes_Gather(MemSDNode * N,SDValue & Lo,SDValue & Hi,bool SplitSETCC) SplitVecRes_Gather() argument 2407 SplitVecRes_VECTOR_COMPRESS(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_COMPRESS() argument 2418 SplitVecRes_SETCC(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_SETCC() argument 2457 SplitVecRes_UnaryOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_UnaryOp() argument 2499 SplitVecRes_ADDRSPACECAST(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ADDRSPACECAST() argument 2520 SplitVecRes_FFREXP(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitVecRes_FFREXP() argument 2555 SplitVecRes_ExtendOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ExtendOp() argument 2624 SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_SHUFFLE() argument 2976 SplitVecRes_VAARG(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VAARG() argument 2996 SplitVecRes_FP_TO_XINT_SAT(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_FP_TO_XINT_SAT() argument 3013 SplitVecRes_VECTOR_REVERSE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_REVERSE() argument 3023 SplitVecRes_VECTOR_SPLICE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_SPLICE() argument 3031 SplitVecRes_VP_REVERSE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_REVERSE() argument 3296 SDValue Lo, Hi; SplitVecOp_VSELECT() local 3320 SDValue Lo, Hi; SplitVecOp_VECREDUCE() local 3339 SDValue Lo, Hi; SplitVecOp_VECREDUCE_SEQ() local 3365 SDValue Lo, Hi; SplitVecOp_VP_REDUCE() local 3389 SDValue Lo, Hi; SplitVecOp_UnaryOp() local 3432 SDValue Lo, Hi; SplitVecOp_BITCAST() local 3463 SDValue Lo, Hi; SplitVecOp_INSERT_SUBVECTOR() local 3483 SDValue Lo, Hi; SplitVecOp_EXTRACT_SUBVECTOR() local 3542 SDValue Lo, Hi; SplitVecOp_EXTRACT_VECTOR_ELT() local 3597 SDValue Lo, Hi; SplitVecOp_ExtVecInRegOp() local 3608 SDValue Lo, Hi; SplitVecOp_Gather() local 3656 SDValue Lo, Hi; SplitVecOp_VP_STORE() local 3729 SDValue Lo = DAG.getStridedStoreVP( SplitVecOp_VP_STRIDED_STORE() local 3805 SDValue Lo, Hi, Res; SplitVecOp_MSTORE() local 3896 SDValue Lo; SplitVecOp_Scatter() local 3945 SDValue Lo, Hi; SplitVecOp_STORE() local 4154 SDValue Lo, Hi; SplitVecOp_FP_ROUND() local 4208 SDValue Lo = DAG.getNode(N->getOpcode(), DL, LHSLoVT, LHSLo, RHSLo); SplitVecOp_FPOpDifferentTypes() local 4227 SDValue Lo = DAG.getNode(N->getOpcode(), dl, NewResVT, LHSLo, RHSLo); SplitVecOp_CMP() local 4235 SDValue Lo, Hi; SplitVecOp_FP_TO_XINT_SAT() local 4254 SDValue Lo, Hi; SplitVecOp_VP_CttzElements() local [all...]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A D	aarch32.cpp	54 int64_t decodeImmBT4BlT1BlxT2(uint32_t Hi, uint32_t Lo) { 56 uint32_t Imm11L = Lo & 0x07ff; 79 int64_t decodeImmBT4BlT1BlxT2_J1J2(uint32_t Hi, uint32_t Lo) { in decodeImmBT4BlT1BlxT2_J1J2() 81 uint32_t I1 = ~((Lo ^ (Hi << 3)) << 10) & 0x00800000; 82 uint32_t I2 = ~((Lo ^ (Hi << 1)) << 11) & 0x00400000; 84 uint32_t Imm11 = Lo & 0x07ff; 124 uint16_t decodeImmMovtT1MovwT3(uint32_t Hi, uint32_t Lo) { in decodeRegMovtT1MovwT3() 127 uint32_t Imm3 = (Lo >> 12) & 0x07; 128 uint32_t Imm8 = Lo & 0xff; 147 int64_t decodeRegMovtT1MovwT3(uint32_t Hi, uint32_t Lo) { in ThumbRelocation() 47 decodeImmBT4BlT1BlxT2(uint32_t Hi,uint32_t Lo) decodeImmBT4BlT1BlxT2() argument 72 decodeImmBT4BlT1BlxT2_J1J2(uint32_t Hi,uint32_t Lo) decodeImmBT4BlT1BlxT2_J1J2() argument 99 decodeImmMovtT1MovwT3(uint32_t Hi,uint32_t Lo) decodeImmMovtT1MovwT3() argument 122 decodeRegMovtT1MovwT3(uint32_t Hi,uint32_t Lo) decodeRegMovtT1MovwT3() argument 137 support::ulittle16_t &Lo; // Second halfword global() member 151 const support::ulittle16_t &Lo; // Second halfword global() member 164 uint16_t Lo = R.Lo & FixupInfo<Kind>::OpcodeMask.Lo; checkOpcode() local 171 uint16_t Lo = R.Lo & FixupInfo<Kind>::RegMask.Lo; checkRegister() local [all...]
H A D	ELF_riscv.cpp	248 int32_t Lo = Value & 0xFFF; in applyFixup() local 254 RawInstrJalr \| (static_cast<uint32_t>(Lo) << 20); in applyFixup() 279 int64_t Lo = Value & 0xFFF; in applyFixup() local 282 (RawInstr & 0xFFFFF) \| (static_cast<uint32_t>(Lo & 0xFFF) << 20); in applyFixup() 294 int64_t Lo = Value & 0xFFF; in applyFixup() local 295 uint32_t Imm11_5 = extractBits(Lo, 5, 7) << 25; in applyFixup() 296 uint32_t Imm4_0 = extractBits(Lo, 0, 5) << 7; in applyFixup() 316 int32_t Lo = Value & 0xFFF; in applyFixup() local 319 (RawInstr & 0xFFFFF) \| (static_cast<uint32_t>(Lo & 0xFFF) << 20); in applyFixup() 326 int64_t Lo = Value & 0xFFF; in applyFixup() local [all …]
/freebsd/tools/tools/locale/patch/
H A D	patch-UnicodeData.txt	6 3400;<CJK Ideograph Extension A, First>;Lo;0;L;;;;;N;;;;; 7 -4DBF;<CJK Ideograph Extension A, Last>;Lo;0;L;;;;;N;;;;; 8 +4DB5;<CJK Ideograph Extension A, Last>;Lo;0;L;;;;;N;;;;; 15 4E00;<CJK Ideograph, First>;Lo;0;L;;;;;N;;;;; 16 -9FFC;<CJK Ideograph, Last>;Lo;0;L;;;;;N;;;;; 17 +9FEF;<CJK Ideograph, Last>;Lo;0;L;;;;;N;;;;; 18 A000;YI SYLLABLE IT;Lo;0;L;;;;;N;;;;; 19 A001;YI SYLLABLE IX;Lo;0;L;;;;;N;;;;; 20 A002;YI SYLLABLE I;Lo;0;L;;;;;N;;;;; 24 20000;<CJK Ideograph Extension B, First>;Lo;0;L;;;;;N;;;;; [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A D	RISCVMergeBaseOffset.cpp	35 bool detectFoldable(MachineInstr &Hi, MachineInstr &Lo); 37 bool detectAndFoldOffset(MachineInstr &Hi, MachineInstr &Lo); 38 void foldOffset(MachineInstr &Hi, MachineInstr &Lo, MachineInstr &Tail, 40 bool foldLargeOffset(MachineInstr &Hi, MachineInstr &Lo, 42 bool foldShiftedOffset(MachineInstr &Hi, MachineInstr &Lo, 45 bool foldIntoMemoryOps(MachineInstr &Hi, MachineInstr &Lo); 86 MachineInstr &Lo) { in INITIALIZE_PASS() 104 Lo = &Hi; in INITIALIZE_PASS() 110 Lo = &*MRI->use_instr_begin(HiDestReg); in INITIALIZE_PASS() 111 if (Lo->getOpcode() != RISCV::ADDI) in INITIALIZE_PASS() [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A D	AMDGPUDisassembler.h	39 uint64_t Lo = 0; 44 DecoderUInt128(uint64_t Lo, uint64_t Hi = 0) : Lo(Lo), Hi(Hi) {} in Lo() argument 45 operator bool() const { return Lo \|\| Hi; } 51 Lo \|= SubBits << BitPosition; in insertBits() 63 Val = Lo >> BitPosition \| Hi << 1 << (63 - BitPosition); in extractBitsAsZExtValue() 69 return DecoderUInt128(Lo & RHS.Lo, Hi & RHS.Hi); 74 DecoderUInt128 operator~() const { return DecoderUInt128(~Lo, ~Hi); } 76 return Lo == RHS.Lo && Hi == RHS.Hi; 79 return Lo != RHS.Lo \|\| Hi != RHS.Hi; 85 return OS << APInt(128, {RHS.Lo, RHS.Hi});
/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A D	X86.cpp	1245 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const; 1273 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi, 1719 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo, in postMerge() argument 1743 Lo = Memory; in postMerge() 1744 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) in postMerge() 1745 Lo = Memory; in postMerge() 1746 if (AggregateSize > 128 && (Lo != SSE \|\| Hi != SSEUp)) in postMerge() 1747 Lo = Memory; in postMerge() 1748 if (Hi == SSEUp && Lo != SSE) in postMerge() 1792 void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase, Class &Lo, in classify() argument [all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/
H A D	aarch32.h	`163 /// Immutable pair of halfwords, Hi and Lo, with overflow check 165 constexpr HalfWords() : Hi(0), Lo(0) {} 166 constexpr HalfWords(uint32_t Hi, uint32_t Lo) : Hi(Hi), Lo(Lo) { 168 assert(isUInt<16>(Lo) && "Overflow in second half-word"); 171 const uint16_t Lo; // Second halfword 187 bool (*checkOpcode)(uint16_t Hi, uint16_t Lo) = nullptr; 134 const uint16_t Lo; // Second halfword global() member`
/freebsd/contrib/llvm-project/compiler-rt/lib/orc/
H A D	endianness.h	`60 uint16_t Lo = value >> 8; in ByteSwap_16() 61 return Hi \| Lo; in ByteSwap_16() 88 uint32_t Lo = ByteSwap_32(uint32_t(value >> 32)); in ByteSwap_64() 89 return (Hi << 32) \| Lo; in ByteSwap_64()`
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A D	Mips16ISelDAGToDAG.cpp	`47 SDNode Lo = nullptr, Hi = nullptr; in selectMULT() local 54 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InGlue); in selectMULT() 55 InGlue = SDValue(Lo, 1); in selectMULT() 61 return std::make_pair(Lo, Hi); in selectMULT() 151 if (Addr.getOperand(1).getOpcode() == MipsISD::Lo \|\| in selectAddr()`
H A D	MipsISelLowering.h	`77 Lo, enumerator 393 SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty, in getAddrLocal() local 395 return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo); in getAddrLocal() 438 SDValue Lo = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO); in getAddrNonPIC() local 441 DAG.getNode(MipsISD::Lo, DL, Ty, Lo)); in getAddrNonPIC() 455 SDValue Lo = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_LO); in getAddrNonPICSym64() local 471 DAG.getNode(MipsISD::Lo, DL, Ty, Lo)); in getAddrNonPICSym64()`
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A D	LanaiISelLowering.cpp	1150 SDValue Lo = DAG.getTargetConstantPool(C, MVT::i32, N->getAlign(), in LowerConstantPool() local 1153 Lo = DAG.getNode(LanaiISD::LO, DL, MVT::i32, Lo); in LowerConstantPool() 1154 SDValue Result = DAG.getNode(ISD::OR, DL, MVT::i32, Hi, Lo); in LowerConstantPool() 1185 SDValue Lo = DAG.getTargetGlobalAddress( in LowerGlobalAddress() local 1188 Lo = DAG.getNode(LanaiISD::LO, DL, MVT::i32, Lo); in LowerGlobalAddress() 1189 return DAG.getNode(ISD::OR, DL, MVT::i32, Hi, Lo); in LowerGlobalAddress() 1202 SDValue Lo = DAG.getBlockAddress(BA, MVT::i32, true, OpFlagLo); in LowerBlockAddress() local 1204 Lo = DAG.getNode(LanaiISD::LO, DL, MVT::i32, Lo); in LowerBlockAddress() 1205 SDValue Result = DAG.getNode(ISD::OR, DL, MVT::i32, Hi, Lo); in LowerBlockAddress() 1227 SDValue Lo = DAG.getTargetJumpTable( in LowerJumpTable() local [all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A D	BPFDisassembler.cpp	`144 uint64_t Lo, Hi; in readInstruction64() 154 Lo = (Bytes[4] << 0) \| (Bytes[5] << 8) \| (Bytes[6] << 16) \| (Bytes[7] << 24); in readInstruction64() 158 Lo = (Bytes[4] << 24) \| (Bytes[5] << 16) \| (Bytes[6] << 8) \| (Bytes[7] << 0); in readInstruction64() 160 Insn = Make_64(Hi, Lo); in readInstruction64() 145 uint64_t Lo, Hi; readInstruction64() local`
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A D	MCObjectStreamer.cpp	95 const MCSymbol Lo) { in absoluteSymbolDiff() argument 96 assert(Hi && Lo); in absoluteSymbolDiff() 97 if (!Hi->getFragment() \|\| Hi->getFragment() != Lo->getFragment() \|\| in absoluteSymbolDiff() 98 Hi->isVariable() \|\| Lo->isVariable()) in absoluteSymbolDiff() 101 return Hi->getOffset() - Lo->getOffset(); in absoluteSymbolDiff() 105 const MCSymbol Lo, in emitAbsoluteSymbolDiff() argument 108 if (std::optional<uint64_t> Diff = absoluteSymbolDiff(Hi, Lo)) in emitAbsoluteSymbolDiff() 110 MCStreamer::emitAbsoluteSymbolDiff(Hi, Lo, Size); in emitAbsoluteSymbolDiff() 114 const MCSymbol *Lo) { in emitAbsoluteSymbolDiffAsULEB128() argument 116 if (std::optional<uint64_t> Diff = absoluteSymbolDiff(Hi, Lo)) { in emitAbsoluteSymbolDiffAsULEB128() [all …]
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A D	MDBuilder.cpp	97 MDNode MDBuilder::createRange(const APInt &Lo, const APInt &Hi) { in createRange() argument 98 assert(Lo.getBitWidth() == Hi.getBitWidth() && "Mismatched bitwidths!"); in createRange() 100 Type Ty = IntegerType::get(Context, Lo.getBitWidth()); in createRange() 101 return createRange(ConstantInt::get(Ty, Lo), ConstantInt::get(Ty, Hi)); in createRange() 104 MDNode MDBuilder::createRange(Constant Lo, Constant *Hi) { in createRange() argument 106 if (Hi == Lo) in createRange() 110 return MDNode::get(Context, {createConstant(Lo), createConstant(Hi)}); in createRange()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A D	RISCVMatInt.cpp	`319 uint64_t Lo = Val & 0x7fffffff; in generateInstSeq() local 320 uint64_t Hi = Val ^ Lo; in generateInstSeq() 324 if (Lo != 0) in generateInstSeq() 325 generateInstSeqImpl(Lo, STI, TmpSeq); in generateInstSeq() 341 uint64_t Lo = Val \| 0xffffffff80000000; in generateInstSeq() local 342 uint64_t Hi = Val ^ Lo; in generateInstSeq() 346 generateInstSeqImpl(Lo, STI, TmpSeq); in generateInstSeq()`
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A D	VVPISelLowering.cpp	28 SDValue LoA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Lo, AVL); in splitMaskArithmetic() 30 SDValue LoB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Lo, AVL); in splitMaskArithmetic() 207 for (PackElem Part : {PackElem::Hi, PackElem::Lo}) { in splitPackedLoadStore() 251 SDValue LowChain = SDValue(PartOps[(int)PackElem::Lo].getNode(), ChainResIdx); in splitPackedLoadStore() 263 SDValue PackedVals = CDAG.getPack(PackedVT, PartOps[(int)PackElem::Lo], in lowerVVP_GATHER_SCATTER() 365 for (PackElem Part : {PackElem::Hi, PackElem::Lo}) { in splitVectorOp() 398 return CDAG.getPack(Op.getValueType(), PartOps[(int)PackElem::Lo], in legalizePackedAVL()

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