Lines Matching refs:Lo
54 int64_t decodeImmBT4BlT1BlxT2(uint32_t Hi, uint32_t Lo) {
56 uint32_t Imm11L = Lo & 0x07ff;
79 int64_t decodeImmBT4BlT1BlxT2_J1J2(uint32_t Hi, uint32_t Lo) {
81 uint32_t I1 = ~((Lo ^ (Hi << 3)) << 10) & 0x00800000;
82 uint32_t I2 = ~((Lo ^ (Hi << 1)) << 11) & 0x00400000;
84 uint32_t Imm11 = Lo & 0x07ff;
124 uint16_t decodeImmMovtT1MovwT3(uint32_t Hi, uint32_t Lo) {
127 uint32_t Imm3 = (Lo >> 12) & 0x07;
128 uint32_t Imm8 = Lo & 0xff;
147 int64_t decodeRegMovtT1MovwT3(uint32_t Hi, uint32_t Lo) {
148 uint32_t Rd4 = (Lo >> 8) & 0x0f;
198 /// followed by bytes A+3, A+2 in the second halfword (Lo).
203 Lo{*reinterpret_cast<support::ulittle16_t *>(FixupPtr + 2)} {}
206 support::ulittle16_t &Lo; // Second halfword
213 Lo{*reinterpret_cast<const support::ulittle16_t *>(FixupPtr + 2)} {}
217 : Hi{Writable.Hi}, Lo(Writable.Lo) {}
220 const support::ulittle16_t &Lo; // Second halfword
243 static_cast<uint16_t>(R.Hi), static_cast<uint16_t>(R.Lo),
266 static bool checkOpcodeThumb(uint16_t Hi, uint16_t Lo) {
268 (Lo & FixupInfo<K>::OpcodeMask.Lo) == FixupInfo<K>::Opcode.Lo;
335 if (!Info.checkOpcode(R.Hi, R.Lo))
348 uint16_t Lo = R.Lo & FixupInfo<Kind>::RegMask.Lo;
349 return Hi == Reg.Hi && Lo == Reg.Lo;
361 assert((Mask.Hi & Reg.Hi) == Reg.Hi && (Mask.Lo & Reg.Lo) == Reg.Lo &&
364 R.Lo = (R.Lo & ~Mask.Lo) | Reg.Lo;
377 assert((Mask.Hi & Imm.Hi) == Imm.Hi && (Mask.Lo & Imm.Lo) == Imm.Lo &&
380 R.Lo = (R.Lo & ~Mask.Lo) | Imm.Lo;
444 ? decodeImmBT4BlT1BlxT2_J1J2(R.Hi, R.Lo)
445 : decodeImmBT4BlT1BlxT2(R.Hi, R.Lo);
450 return SignExtend64<16>(decodeImmMovtT1MovwT3(R.Hi, R.Lo));
455 return SignExtend64<16>(decodeImmMovtT1MovwT3(R.Hi, R.Lo));
637 bool InstrIsBlx = (R.Lo & FixupInfo<Thumb_Call>::LoBitNoBlx) == 0;
642 R.Lo = R.Lo & ~FixupInfo<Thumb_Call>::LoBitNoBlx;
643 R.Lo = R.Lo & ~FixupInfo<Thumb_Call>::LoBitH;
647 R.Lo = R.Lo & ~FixupInfo<Thumb_Call>::LoBitNoBlx;
661 assert(((R.Lo & FixupInfo<Thumb_Call>::LoBitNoBlx) ||
662 (R.Lo & FixupInfo<Thumb_Call>::LoBitH) == 0) &&