| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTLSDynamicCall.cpp | 91 Register InReg = PPC::NoRegister; in processBlock() local
95 InReg = MI.getOperand(1).getReg(); in processBlock()
208 if (Temp == &MI && RegInfo.hasOneDef(InReg)) in processBlock()
209 Temp = RegInfo.getOneDef(InReg)->getParent(); in processBlock()
250 .addReg(InReg); in processBlock()
273 assert(InReg != PPC::NoRegister && "Operand must be a register"); in processBlock()
274 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addReg(InReg); in processBlock()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Lanai.cpp | 130 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
138 if (InReg) in classifyArgumentType()
142 if (InReg) in classifyArgumentType()
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| H A D | Sparc.cpp | 135 bool InReg; member
138 : Context(c), DL(dl), Size(0), InReg(false) {} in CoerceBuilder()
173 InReg = true; in addFloat()
307 AAI.setInReg(CB.InReg); in classifyType()
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| H A D | X86.cpp | 145 bool shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg,
671 bool &InReg, in shouldAggregateUseDirect() argument
680 InReg = !IsMCUABI; in shouldAggregateUseDirect()
813 bool InReg; in classifyArgumentType() local
814 if (shouldAggregateUseDirect(Ty, State, InReg, NeedsPadding)) { in classifyArgumentType()
818 if (InReg) in classifyArgumentType()
888 bool InReg = shouldPrimitiveUseInReg(Ty, State); in classifyArgumentType() local
891 if (InReg) in classifyArgumentType()
898 if (InReg) in classifyArgumentType()
905 if (InReg) in classifyArgumentType()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | JMCInstrumenter.cpp | 145 DefaultCheckFunc->addParamAttr(0, Attribute::InReg); in createDefaultCheckFunction()
207 CheckFunc->addParamAttr(0, Attribute::InReg); in runImpl()
234 CI->addParamAttr(0, Attribute::InReg); in runImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Arm64ECCallLowering.cpp | 239 Attribute InRegAttr0 = AttrList.getParamAttr(0, Attribute::InReg); in getThunkRetType()
246 InRegAttr1 = AttrList.getParamAttr(1, Attribute::InReg); in getThunkRetType()
411 auto InReg = Attrs.getParamAttr(0, Attribute::InReg); in buildExitThunk() local
412 if (SRet.isValid() && !InReg.isValid()) in buildExitThunk()
559 Thunk->addParamAttr(5, Attribute::InReg); in buildEntryThunk()
573 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildEntryThunk()
662 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildGuestExitThunk()
718 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildPatchableThunk()
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| /freebsd/contrib/llvm-project/clang/include/clang/CodeGen/ |
| H A D | CGFunctionInfo.h | 116 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
140 SRetAfterThis(false), InReg(false), CanBeFlattened(false),
398 return InReg; in getInReg()
403 InReg = IR; in setInReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUPreloadKernelArguments.cpp | 150 AB.addAttribute(Attribute::InReg); in cloneFunctionWithPreloadImplicitArgs()
317 Arg.addAttr(Attribute::InReg); in markKernelArgsAsInreg()
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| H A D | AMDGPUCallLowering.cpp | 635 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
642 if (CC == CallingConv::AMDGPU_PS && !InReg && PSInputNum <= 15) { in lowerFormalArguments()
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| H A D | AMDGPUInstructionSelector.cpp | 2585 bool InReg = I.getOpcode() == AMDGPU::G_SEXT_INREG; in selectG_SZA_EXT() local
2586 bool Signed = I.getOpcode() == AMDGPU::G_SEXT || InReg; in selectG_SZA_EXT()
2652 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? in selectG_SZA_EXT()
2670 unsigned SubReg = InReg ? AMDGPU::sub0 : AMDGPU::NoSubRegister; in selectG_SZA_EXT()
2694 if (DstSize > 32 && (SrcSize <= 32 || InReg)) { in selectG_SZA_EXT()
2698 unsigned SubReg = InReg ? AMDGPU::sub0 : AMDGPU::NoSubRegister; in selectG_SZA_EXT()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 110 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee()
134 IsInReg = Call.hasRetAttr(Attribute::InReg);
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILPrepare.cpp | 50 Attribute::InReg, in isValidForDXIL()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| H A D | X86WinEHState.cpp | 415 Call->addParamAttr(0, Attribute::InReg); in generateLSDAInEAXThunk()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 281 Arg.hasAttribute(Attribute::InReg) || in lowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 1245 Register InReg = Record.payload.Reg; in visitGCRelocate() local
1247 DAG.getDataLayout(), InReg, Relocate.getType(), in visitGCRelocate()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 515 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
551 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
552 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
562 Tmp0 = InReg; in LowerFPToInt()
564 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
572 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
588 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg); in LowerFPToInt()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 3038 return A->hasAttribute(Attribute::InReg) || in isArgPassedInSGPR()
3042 return A->hasAttribute(Attribute::InReg); in isArgPassedInSGPR()
3065 return CB->paramHasAttr(ArgNo, Attribute::InReg) || in isArgPassedInSGPR()
3068 return CB->paramHasAttr(ArgNo, Attribute::InReg); in isArgPassedInSGPR()
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| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | Lint.cpp | 268 Attribute::ZExt, Attribute::SExt, Attribute::InReg, in visitCallBase()
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| /freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/ |
| H A D | IRMutator.cpp | 420 Attribute::InAlloca, Attribute::InReg, in isUnsupportedFunction()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Attributes.td | 154 def InReg : EnumAttr<"inreg", IntersectPreserve, [ParamAttr, RetAttr]>;
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| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Function.cpp | 294 return hasAttribute(Attribute::InReg); in hasInRegAttr()
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| H A D | Verifier.cpp | 2023 Attrs.hasAttribute(Attribute::InReg); in verifyParameterAttrs()
3928 Check(!Attrs.contains(Attribute::InReg), in verifyTailCCMustTailAttrs()
3953 Attribute::InReg, Attribute::StackAlignment, Attribute::SwiftSelf, in getParameterABIAttributes()
6542 Check(Call.paramHasAttr(2, Attribute::InReg), in visitIntrinsicCall()
6544 Check(!Call.paramHasAttr(3, Attribute::InReg), in visitIntrinsicCall()
6578 Check(!Call.paramHasAttr(InactiveIdx, Attribute::InReg), in visitIntrinsicCall()
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| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGCall.cpp | 2702 RetAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2755 SRETAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2819 .addAttribute(llvm::Attribute::InReg)); in ConstructAttributeList()
2845 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2853 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 43 if (AttrFn(Attribute::InReg)) in addFlagsUsingAttrFn()
|