| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTLSDynamicCall.cpp | 95 Register InReg = PPC::NoRegister; in processBlock() local
99 InReg = MI.getOperand(1).getReg(); in processBlock()
212 if (Temp == &MI && RegInfo.hasOneDef(InReg)) in processBlock()
213 Temp = RegInfo.getOneDef(InReg)->getParent(); in processBlock()
254 .addReg(InReg); in processBlock()
277 assert(InReg != PPC::NoRegister && "Operand must be a register"); in processBlock()
278 Addi = BuildMI(MBB, I, DL, TII->get(Opc1), GPR3).addReg(InReg); in processBlock()
|
| /freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
| H A D | Lanai.cpp | 126 bool InReg = shouldUseInReg(Ty, State); in classifyArgumentType() local
134 if (InReg) in classifyArgumentType()
138 if (InReg) in classifyArgumentType()
|
| H A D | Sparc.cpp | 133 bool InReg; member
136 : Context(c), DL(dl), Size(0), InReg(false) {} in CoerceBuilder()
171 InReg = true; in addFloat()
275 if (CB.InReg) in classifyType()
|
| H A D | X86.cpp | 158 bool shouldAggregateUseDirect(QualType Ty, CCState &State, bool &InReg,
676 bool &InReg, in shouldAggregateUseDirect() argument
685 InReg = !IsMCUABI; in shouldAggregateUseDirect()
814 bool InReg; in classifyArgumentType() local
815 if (shouldAggregateUseDirect(Ty, State, InReg, NeedsPadding)) { in classifyArgumentType()
819 if (InReg) in classifyArgumentType()
889 bool InReg = shouldPrimitiveUseInReg(Ty, State); in classifyArgumentType() local
892 if (InReg) in classifyArgumentType()
899 if (InReg) in classifyArgumentType()
906 if (InReg) in classifyArgumentType()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | JMCInstrumenter.cpp | 145 DefaultCheckFunc->addParamAttr(0, Attribute::InReg); in createDefaultCheckFunction()
207 CheckFunc->addParamAttr(0, Attribute::InReg); in runImpl()
234 CI->addParamAttr(0, Attribute::InReg); in runImpl()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Arm64ECCallLowering.cpp | 244 Attribute InRegAttr0 = AttrList.getParamAttr(0, Attribute::InReg); in getThunkRetType()
251 InRegAttr1 = AttrList.getParamAttr(1, Attribute::InReg); in getThunkRetType()
416 auto InReg = Attrs.getParamAttr(0, Attribute::InReg); in buildExitThunk() local
417 if (SRet.isValid() && !InReg.isValid()) in buildExitThunk()
565 Thunk->addParamAttr(5, Attribute::InReg); in buildEntryThunk()
580 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildEntryThunk()
673 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildGuestExitThunk()
732 auto InRegAttr = F->getAttributes().getParamAttr(0, Attribute::InReg); in buildPatchableThunk()
|
| /freebsd/contrib/llvm-project/clang/include/clang/CodeGen/ |
| H A D | CGFunctionInfo.h | 116 bool InReg : 1; // isDirect() || isExtend() || isIndirect() variable
139 SRetAfterThis(false), InReg(false), CanBeFlattened(false),
380 return InReg; in getInReg()
385 InReg = IR; in setInReg()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 110 IsInReg = Call.hasRetAttr(Attribute::InReg); in setCallee()
134 IsInReg = Call.hasRetAttr(Attribute::InReg);
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DXILPrepare.cpp | 48 Attribute::InReg, in isValidForDXIL()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 468 Register InReg = MI.getOperand(1).getReg(); in LowerFPToInt() local
504 Tmp0 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
505 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
515 Tmp0 = InReg; in LowerFPToInt()
517 BuildMI(BB, DL, TII.get(Abs), Tmp0).addReg(InReg); in LowerFPToInt()
525 Tmp1 = MRI.createVirtualRegister(MRI.getRegClass(InReg)); in LowerFPToInt()
541 BuildMI(FalseMBB, DL, TII.get(LoweredOpcode), FalseReg).addReg(InReg); in LowerFPToInt()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86CallLowering.cpp | |
| H A D | X86WinEHState.cpp | 411 Call->addParamAttr(0, Attribute::InReg); in generateLSDAInEAXThunk()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86CallLowering.cpp | 282 Arg.hasAttribute(Attribute::InReg) || in lowerFormalArguments()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUCallLowering.cpp | 633 const bool InReg = Arg.hasAttribute(Attribute::InReg); in lowerFormalArguments() local
640 if (CC == CallingConv::AMDGPU_PS && !InReg && PSInputNum <= 15) { in lowerFormalArguments()
|
| H A D | AMDGPUMachineCFGStructurizer.cpp | 2675 unsigned InReg = LRegion->getBBSelectRegIn(); in structurizeComplexRegion() local
2677 MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2678 Register NewInReg = MRI->createVirtualRegister(MRI->getRegClass(InReg)); in structurizeComplexRegion()
2683 LRegion->replaceRegisterInsideRegion(InReg, InnerSelectReg, false, MRI); in structurizeComplexRegion()
|
| H A D | AMDGPUInstructionSelector.cpp | 2341 bool InReg = I.getOpcode() == AMDGPU::G_SEXT_INREG; in selectG_SZA_EXT() local
2342 bool Signed = I.getOpcode() == AMDGPU::G_SEXT || InReg; in selectG_SZA_EXT()
2408 const TargetRegisterClass &SrcRC = InReg && DstSize > 32 ? in selectG_SZA_EXT()
2426 unsigned SubReg = InReg ? AMDGPU::sub0 : AMDGPU::NoSubRegister; in selectG_SZA_EXT()
2450 if (DstSize > 32 && (SrcSize <= 32 || InReg)) { in selectG_SZA_EXT()
2454 unsigned SubReg = InReg ? AMDGPU::sub0 : AMDGPU::NoSubRegister; in selectG_SZA_EXT()
|
| H A D | AMDGPUAttributor.cpp | 1022 Arg.addAttr(Attribute::InReg); in addPreloadKernArgHint()
|
| H A D | AMDGPUAsmPrinter.cpp | 870 if (Arg.hasAttribute(Attribute::InReg)) { in getSIProgramInfo()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 1241 Register InReg = Record.payload.Reg; in visitGCRelocate() local
1243 DAG.getDataLayout(), InReg, Relocate.getType(), in visitGCRelocate()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 2788 return A->hasAttribute(Attribute::InReg) || in isArgPassedInSGPR()
2792 return A->hasAttribute(Attribute::InReg); in isArgPassedInSGPR()
2815 return CB->paramHasAttr(ArgNo, Attribute::InReg) || in isArgPassedInSGPR()
2818 return CB->paramHasAttr(ArgNo, Attribute::InReg); in isArgPassedInSGPR()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Attributes.td | 128 def InReg : EnumAttr<"inreg", [ParamAttr, RetAttr]>;
|
| /freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
| H A D | CGCall.cpp | 2567 RetAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2620 SRETAttrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2686 llvm::AttrBuilder(getLLVMContext()).addAttribute(llvm::Attribute::InReg)); in ConstructAttributeList()
2710 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
2718 Attrs.addAttribute(llvm::Attribute::InReg); in ConstructAttributeList()
|
| /freebsd/contrib/llvm-project/llvm/lib/IR/ |
| H A D | Verifier.cpp | 1948 Attrs.hasAttribute(Attribute::InReg); in verifyParameterAttrs()
3784 Check(!Attrs.contains(Attribute::InReg), in verifyTailCCMustTailAttrs()
3809 Attribute::InReg, Attribute::StackAlignment, Attribute::SwiftSelf, in getParameterABIAttributes()
6259 Check(Call.paramHasAttr(2, Attribute::InReg), in visitIntrinsicCall()
6261 Check(!Call.paramHasAttr(3, Attribute::InReg), in visitIntrinsicCall()
6280 Check(!Call.paramHasAttr(InactiveIdx, Attribute::InReg), in visitIntrinsicCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 44 if (AttrFn(Attribute::InReg)) in addFlagsUsingAttrFn()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 2355 if (CI->paramHasAttr(ArgIdx, Attribute::InReg) || in SelectCall()
3034 if (Arg.hasAttribute(Attribute::InReg) || in fastLowerArguments()
|