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Searched refs:ISEL (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCBack2BackFusion.def103 ISEL,
631 ISEL,
H A DPPCReduceCRLogicals.cpp510 if (Opc == PPC::ISEL || Opc == PPC::ISEL8) in createCRLogicalOpInfo()
H A DPPCInstrInfo.cpp1585 unsigned OpCode = Is64Bit ? PPC::ISEL8 : PPC::ISEL; in insertSelect()
2473 } else if (UseMI->getOpcode() == PPC::ISEL || in optimizeCompareInstr()
2665 } else if (UseMI->getOpcode() == PPC::ISEL || in optimizeCompareInstr()
4636 if (UseOpc != PPC::ISEL && UseOpc != PPC::ISEL8) in simplifyToLI()
5300 case PPC::ISEL: in promoteInstr32To64ForElimEXTSW()
5377 {PPC::OR, PPC::OR8}, {PPC::ISEL, PPC::ISEL8}, in promoteInstr32To64ForElimEXTSW()
5608 case PPC::ISEL: in isSignOrZeroExtended()
H A DP10InstrResources.td1114 ISEL, ISEL8,
H A DP9InstrResources.td194 (instregex "ISEL(8)?$"),
H A DPPCInstrInfo.td695 // can make a accurate check for x-form instructions in ISEL.
3104 def ISEL : AForm_4<31, 15,
4806 (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0LT)>;
4808 (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0GT)>;
4810 (ISEL gprc:$rT, gprc_nor0:$rA, gprc:$rB, CR0EQ)>;
H A DPPCInstrVSX.td2801 // these need to be defined after the any_frint versions so ISEL will correctly
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAGHVX.cpp1140 if (!W->isMachineOpcode() && W->getOpcode() == HexagonISD::ISEL) in selectVectorConstants()
1743 assert(ISelN->getOpcode() == HexagonISD::ISEL); in select()
1756 auto IsISelN = [](SDNode *T) { return T->getOpcode() == HexagonISD::ISEL; }; in select()
1911 SDValue IS = DAG.getNode(HexagonISD::ISEL, dl, ResTy, LV); in scalarizeShuffle()
2561 return DAG.getNode(HexagonISD::ISEL, dl, VecTy, LV); in getVectorConstant()
H A DHexagonISelLowering.h117 ISEL, // Marker for nodes that were created during ISel, and enumerator
H A DHexagonISelLowering.cpp1980 case HexagonISD::ISEL: return "HexagonISD::ISEL"; in getTargetNodeName()