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Searched refs:FirstMI (Results 1 – 25 of 32) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64MacroFusion.cpp22 static bool isArithmeticBccPair(const MachineInstr *FirstMI, in isArithmeticBccPair() argument
28 if (FirstMI == nullptr) in isArithmeticBccPair()
33 if (CmpOnly && FirstMI->getOperand(0).isReg() && in isArithmeticBccPair()
34 !(FirstMI->getOperand(0).getReg() == AArch64::XZR || in isArithmeticBccPair()
35 FirstMI->getOperand(0).getReg() == AArch64::WZR)) { in isArithmeticBccPair()
39 switch (FirstMI->getOpcode()) { in isArithmeticBccPair()
64 return !AArch64InstrInfo::hasShiftedReg(*FirstMI); in isArithmeticBccPair()
71 static bool isArithmeticCbzPair(const MachineInstr *FirstMI, in isArithmeticCbzPair() argument
80 if (FirstMI == nullptr) in isArithmeticCbzPair()
83 switch (FirstMI->getOpcode()) { in isArithmeticCbzPair()
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H A DAArch64LoadStoreOptimizer.cpp631 static bool isPreLdStPairCandidate(MachineInstr &FirstMI, MachineInstr &MI) { in isPreLdStPairCandidate() argument
633 unsigned OpcA = FirstMI.getOpcode(); in isPreLdStPairCandidate()
1629 static bool areCandidatesToMergeOrPair(MachineInstr &FirstMI, MachineInstr &MI, in areCandidatesToMergeOrPair() argument
1637 assert(!FirstMI.hasOrderedMemoryRef() && in areCandidatesToMergeOrPair()
1638 !TII->isLdStPairSuppressed(FirstMI) && in areCandidatesToMergeOrPair()
1645 unsigned OpcA = FirstMI.getOpcode(); in areCandidatesToMergeOrPair()
1650 return !AArch64InstrInfo::isPreLdSt(FirstMI); in areCandidatesToMergeOrPair()
1659 if (AArch64InstrInfo::isPreLdSt(FirstMI) && AArch64InstrInfo::isPreLdSt(MI)) in areCandidatesToMergeOrPair()
1681 return getLdStRegOp(FirstMI).getReg() == AArch64::WZR && in areCandidatesToMergeOrPair()
1683 TII->getMemScale(FirstMI) == TII->getMemScale(MI); in areCandidatesToMergeOrPair()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCMacroFusion.cpp68 static bool matchingRegOps(const MachineInstr &FirstMI, in matchingRegOps() argument
72 const MachineOperand &Op1 = FirstMI.getOperand(FirstMIOpIndex); in matchingRegOps()
93 // Return true if the FirstMI meets the constraints of SecondMI according to
96 const MachineInstr &FirstMI, in checkOpConstraints() argument
127 const MachineOperand &SI = FirstMI.getOperand(2); in checkOpConstraints()
152 return (matchingImmOps(FirstMI, 2, 3) && matchingImmOps(FirstMI, 3, 60)) || in checkOpConstraints()
153 (matchingImmOps(FirstMI, 2, 6) && matchingImmOps(FirstMI, 3, 57)); in checkOpConstraints()
157 return matchingImmOps(FirstMI, in checkOpConstraints()
236 shouldScheduleAdjacent(const TargetInstrInfo & TII,const TargetSubtargetInfo & TSI,const MachineInstr * FirstMI,const MachineInstr & SecondMI) shouldScheduleAdjacent() argument
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMMacroFusion.cpp22 static bool isAESPair(const MachineInstr *FirstMI, in isAESPair() argument
28 return FirstMI == nullptr || FirstMI->getOpcode() == ARM::AESE; in isAESPair()
31 return FirstMI == nullptr || FirstMI->getOpcode() == ARM::AESD; in isAESPair()
38 static bool isLiteralsPair(const MachineInstr *FirstMI, in isLiteralsPair() argument
41 if ((FirstMI == nullptr || FirstMI->getOpcode() == ARM::MOVi16) && in isLiteralsPair()
48 /// Check if the instr pair, FirstMI and SecondMI, should be fused
49 /// together. Given SecondMI, when FirstMI i
53 shouldScheduleAdjacent(const TargetInstrInfo & TII,const TargetSubtargetInfo & TSI,const MachineInstr * FirstMI,const MachineInstr & SecondMI) shouldScheduleAdjacent() argument
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNCreateVOPD.cpp47 : FirstMI(First), SecondMI(Second), IsVOPD3(VOPD3) {} in VOPDCombineInfo()
49 MachineInstr *FirstMI; member in __anon4acca4580111::GCNCreateVOPD::VOPDCombineInfo
58 auto *FirstMI = CI.FirstMI; in doReplace() local
60 unsigned Opc1 = FirstMI->getOpcode(); in doReplace()
70 auto VOPDInst = BuildMI(*FirstMI->getParent(), FirstMI, in doReplace()
71 FirstMI->getDebugLoc(), SII->get(NewOpcode)) in doReplace()
72 .setMIFlags(FirstMI->getFlags() | SecondMI->getFlags()); in doReplace()
75 MachineInstr *MI[] = {FirstMI, SecondMI}; in doReplace()
77 AMDGPU::getVOPDInstInfo(FirstMI->getDesc(), SecondMI->getDesc()); in doReplace()
121 << *CI.FirstMI << "\tY: " << *CI.SecondMI << "\n"); in doReplace()
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H A DGCNVOPDUtils.cpp38 const MachineInstr &FirstMI, in checkVOPDRegConstraints() argument
42 const MachineFunction *MF = FirstMI.getMF(); in checkVOPDRegConstraints()
47 if (!IsVOPD3 && (TII.isVOP3(FirstMI) || TII.isVOP3(SecondMI))) in checkVOPDRegConstraints()
49 if (TII.isDPP(FirstMI) || TII.isDPP(SecondMI)) in checkVOPDRegConstraints()
65 for (auto MII = MachineBasicBlock::const_iterator(&FirstMI); in checkVOPDRegConstraints()
66 MII != FirstMI.getParent()->instr_end(); ++MII) { in checkVOPDRegConstraints()
74 if (Use.isReg() && FirstMI.modifiesRegister(Use.getReg(), TRI)) in checkVOPDRegConstraints()
78 const MachineInstr &MI = (OpcodeIdx == VOPD::X) ? FirstMI : SecondMI; in checkVOPDRegConstraints()
86 AMDGPU::getVOPDInstInfo(FirstMI.getDesc(), SecondMI.getDesc()); in checkVOPDRegConstraints()
89 const MachineInstr &MI = (CompIdx == VOPD::X) ? FirstMI : SecondMI; in checkVOPDRegConstraints()
[all …]
H A DAMDGPUMacroFusion.cpp23 /// Check if the instr pair, FirstMI and SecondMI, should be fused
24 /// together. Given SecondMI, when FirstMI is unspecified, then check if
28 const MachineInstr *FirstMI, in shouldScheduleAdjacent() argument
40 if (!FirstMI) in shouldScheduleAdjacent()
43 const MachineBasicBlock &MBB = *FirstMI->getParent(); in shouldScheduleAdjacent()
48 return FirstMI->definesRegister(Src2->getReg(), TRI); in shouldScheduleAdjacent()
H A DGCNVOPDUtils.h25 const MachineInstr &FirstMI,
H A DSIWholeQuadMode.cpp1620 MachineInstr *FirstMI = &*MBB->begin(); in lowerInitExec() local
1625 if (DefInstr != FirstMI) { in lowerInitExec()
1629 MBB->insert(FirstMI, DefInstr); in lowerInitExec()
1634 FirstMI = &*std::next(FirstMI->getIterator()); in lowerInitExec()
1644 auto BfeMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_BFE_U32), CountReg) in lowerInitExec()
1648 BuildMI(*MBB, FirstMI, DL, in lowerInitExec()
1652 auto CmpMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_CMP_EQ_U32)) in lowerInitExec()
1656 BuildMI(*MBB, FirstMI, DL, in lowerInitExec()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMacroFusion.cpp
H A DRISCVLoadStoreOptimizer.cpp224 MachineInstr &FirstMI = *I; in findMatchingInsn() local
227 bool MayLoad = FirstMI.mayLoad(); in findMatchingInsn()
228 Register Reg = FirstMI.getOperand(0).getReg(); in findMatchingInsn()
229 Register BaseReg = FirstMI.getOperand(1).getReg(); in findMatchingInsn()
230 int64_t Offset = FirstMI.getOperand(2).getImm(); in findMatchingInsn()
231 int64_t OffsetStride = (*FirstMI.memoperands_begin())->getSize().getValue(); in findMatchingInsn()
252 if (MI.getOpcode() == FirstMI.getOpcode() && in findMatchingInsn()
298 !UsedRegUnits.available(FirstMI.getOperand(0).getReg())) && in findMatchingInsn()
299 !mayAlias(FirstMI, MemInsns, AA)) { in findMatchingInsn()
301 if (ModifiedRegUnits.available(FirstMI.getOperand(0).getReg())) { in findMatchingInsn()
H A DRISCVMakeCompressible.cpp304 static Register analyzeCompressibleUses(MachineInstr &FirstMI, in analyzeCompressibleUses() argument
307 MachineBasicBlock &MBB = *FirstMI.getParent(); in analyzeCompressibleUses()
311 for (MachineBasicBlock::instr_iterator I = FirstMI.getIterator(), in analyzeCompressibleUses()
364 return RS.scavengeRegisterBackwards(*RCToScavenge, FirstMI.getIterator(), in analyzeCompressibleUses()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstrBundle.cpp110 static DebugLoc getDebugLoc(MachineBasicBlock::instr_iterator FirstMI, in getDebugLoc() argument
112 for (auto MII = FirstMI; MII != LastMI; ++MII) in getDebugLoc()
125 MachineBasicBlock::instr_iterator FirstMI, in finalizeBundle() argument
127 assert(FirstMI != LastMI && "Empty bundle?"); in finalizeBundle()
128 MIBundleBuilder Bundle(MBB, FirstMI, LastMI); in finalizeBundle()
135 BuildMI(MF, getDebugLoc(FirstMI, LastMI), TII->get(TargetOpcode::BUNDLE)); in finalizeBundle()
144 for (auto MII = FirstMI; MII != LastMI; ++MII) { in finalizeBundle()
223 MachineBasicBlock::instr_iterator FirstMI) { in finalizeBundle() argument
225 MachineBasicBlock::instr_iterator LastMI = std::next(FirstMI); in finalizeBundle()
228 finalizeBundle(MBB, FirstMI, LastMI); in finalizeBundle()
H A DMacroFusion.cpp165 const MachineInstr *FirstMI,
173 const MachineInstr *FirstMI, in shouldScheduleAdjacent() argument
176 return Predicate(TII, STI, FirstMI, SecondMI); in shouldScheduleAdjacent()
H A DXRayInstrumentation.cpp265 auto &FirstMI = *FirstMBB.begin(); in run() local
280 BuildMI(FirstMBB, FirstMI, FirstMI.getDebugLoc(), in run()
H A DVirtRegMap.cpp530 MachineInstr *FirstMI = MIs.back(); in expandCopyBundle() local
560 MachineInstr *BundleStart = FirstMI; in expandCopyBundle()
573 if (Indexes && BundledMI != FirstMI) in expandCopyBundle()
H A DInlineSpiller.cpp273 static Register isCopyOfBundle(const MachineInstr &FirstMI, Register Reg, in isCopyOfBundle() argument
275 if (!FirstMI.isBundled()) in isCopyOfBundle()
276 return isCopyOf(FirstMI, Reg, TII); in isCopyOfBundle()
278 assert(!FirstMI.isBundledWithPred() && FirstMI.isBundledWithSucc() && in isCopyOfBundle()
282 MachineBasicBlock::const_instr_iterator I = FirstMI.getIterator(); in isCopyOfBundle()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetMacroFusion.td21 // * const MachineInstr *FirstMI
48 // Tie firstOpIdx and secondOpIdx. The operand of `FirstMI` at position
58 // The operand of `FirstMI` at position `firstOpIdx` should be the same as the
78 // if (!FirstMI)
87 // Indicates that the destination register of `FirstMI` should have one use if
97 // const MachineInstr *FirstMI,
116 // const MachineInstr *FirstMI,
122 // /* Predicate for `FirstMI` */
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86MacroFusion.cpp32 /// Check if the instr pair, FirstMI and SecondMI, should be fused
33 /// together. Given SecondMI, when FirstMI is unspecified, then check if
37 const MachineInstr *FirstMI, in shouldScheduleAdjacent() argument
50 if (FirstMI == nullptr) in shouldScheduleAdjacent()
53 const X86::FirstMacroFusionInstKind TestKind = classifyFirst(*FirstMI); in shouldScheduleAdjacent()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonLoadStoreWidening.cpp434 MachineInstr *FirstMI = *Begin; in selectInsts() local
435 assert(!FirstMI->memoperands_empty() && "Expecting some memory operands"); in selectInsts()
436 const MachineMemOperand &FirstMMO = getMemTarget(FirstMI); in selectInsts()
442 unsigned FirstOffset = getOffset(FirstMI); in selectInsts()
466 if (HII->isPostIncrement(*FirstMI)) in selectInsts()
467 OffsetOrIncVal = getPostIncrementValue(FirstMI); in selectInsts()
472 << " value: " << getPostIncrementValue(FirstMI) in selectInsts()
477 OG.push_back(FirstMI); in selectInsts()
478 MachineInstr *S1 = FirstMI; in selectInsts()
H A DHexagonVLIWPacketizer.cpp1810 MachineBasicBlock::instr_iterator FirstMI(OldPacketMIs.front()); in endPacket() local
1812 finalizeBundle(*MBB, FirstMI, LastMI); in endPacket()
1813 auto BundleMII = std::prev(FirstMI); in endPacket()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstrBundle.h29 MachineBasicBlock::instr_iterator FirstMI,
39 MachineBasicBlock::instr_iterator FirstMI);
H A DMacroFusion.h35 const MachineInstr *FirstMI,
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp406 MachineInstr *FirstMI = LIS.getInstructionFromIndex(LI.beginIndex()); in shouldCoalesce() local
408 if (!FirstMI || FirstMI->getParent() != MBB || in shouldCoalesce()
415 for (MachineBasicBlock::iterator MII = FirstMI, in shouldCoalesce()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelperCasts.cpp232 bool CombinerHelper::matchExtOfExt(const MachineInstr &FirstMI, in matchExtOfExt() argument
235 const GExtOp *First = cast<GExtOp>(&FirstMI); in matchExtOfExt()

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