Lines Matching refs:FirstMI

38                                    const MachineInstr &FirstMI,
42   const MachineFunction *MF = FirstMI.getMF();
57     for (auto MII = MachineBasicBlock::const_iterator(&FirstMI);
58          MII != FirstMI.getParent()->instr_end(); ++MII) {
63   }() && "Expected FirstMI to precede SecondMI");
66     if (Use.isReg() && FirstMI.modifiesRegister(Use.getReg(), TRI))
70     const MachineInstr &MI = (OpcodeIdx == VOPD::X) ? FirstMI : SecondMI;
78       AMDGPU::getVOPDInstInfo(FirstMI.getDesc(), SecondMI.getDesc());
81     const MachineInstr &MI = (CompIdx == VOPD::X) ? FirstMI : SecondMI;
109                  FirstMI.getOpcode() == AMDGPU::V_MOV_B32_e32 &&
115   LLVM_DEBUG(dbgs() << "VOPD Reg Constraints Passed\n\tX: " << FirstMI
120 /// Check if the instr pair, FirstMI and SecondMI, should be scheduled
121 /// together. Given SecondMI, when FirstMI is unspecified, then check if
125                                        const MachineInstr *FirstMI,
132   if (!FirstMI)
135   unsigned Opc = FirstMI->getOpcode();
142   return checkVOPDRegConstraints(STII, *FirstMI, SecondMI);