| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 76 const MCDisassembler *Decoder);
80 const MCDisassembler *Decoder);
84 const MCDisassembler *Decoder);
88 const MCDisassembler *Decoder);
92 const MCDisassembler *Decoder);
96 const MCDisassembler *Decoder);
100 const MCDisassembler *Decoder);
104 const MCDisassembler *Decoder);
108 const MCDisassembler *Decoder);
112 const MCDisassembler *Decoder);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 44 const MCDisassembler *Decoder);
47 const MCDisassembler *Decoder);
50 const void *Decoder);
53 const void *Decoder);
57 const MCDisassembler *Decoder);
61 const MCDisassembler *Decoder);
64 const void *Decoder);
68 const MCDisassembler *Decoder);
71 const MCDisassembler *Decoder);
74 const MCDisassembler *Decoder);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 84 const MCDisassembler *Decoder);
88 const MCDisassembler *Decoder);
92 const MCDisassembler *Decoder);
96 const MCDisassembler *Decoder);
100 const MCDisassembler *Decoder);
104 const MCDisassembler *Decoder);
108 const MCDisassembler *Decoder);
112 const MCDisassembler *Decoder);
116 const MCDisassembler *Decoder);
120 const MCDisassembler *Decoder);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 178 const MCDisassembler *Decoder);
181 const MCDisassembler *Decoder);
184 const MCDisassembler *Decoder);
187 const MCDisassembler *Decoder);
191 const MCDisassembler *Decoder);
194 const MCDisassembler *Decoder);
197 const MCDisassembler *Decoder);
200 const MCDisassembler *Decoder);
203 const MCDisassembler *Decoder);
206 const MCDisassembler *Decoder);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 77 const MCDisassembler *Decoder) { in tryAddingSymbolicOperand()
78 return Decoder->tryAddingSymbolicOperand(MI, Value, Address, IsBranch, Offset, in tryAddingSymbolicOperand()
99 const MCDisassembler *Decoder) { in DecodeGR32BitRegisterClass()
105 const MCDisassembler *Decoder) { in DecodeGRH32BitRegisterClass()
111 const MCDisassembler *Decoder) { in DecodeGR64BitRegisterClass()
117 const MCDisassembler *Decoder) { in DecodeGR128BitRegisterClass()
123 const MCDisassembler *Decoder) { in DecodeADDR32BitRegisterClass()
129 const MCDisassembler *Decoder) { in DecodeADDR64BitRegisterClass()
135 const MCDisassembler *Decoder) { in DecodeFP32BitRegisterClass()
141 const MCDisassembler *Decoder) { in DecodeFP64BitRegisterClass()
76 tryAddingSymbolicOperand(int64_t Value,bool isBranch,uint64_t Address,uint64_t Offset,uint64_t Width,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument
98 DecodeGR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR32BitRegisterClass() argument
104 DecodeGRH32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGRH32BitRegisterClass() argument
110 DecodeGR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR64BitRegisterClass() argument
116 DecodeGR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGR128BitRegisterClass() argument
122 DecodeADDR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR32BitRegisterClass() argument
128 DecodeADDR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeADDR64BitRegisterClass() argument
134 DecodeFP32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP32BitRegisterClass() argument
140 DecodeFP64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP64BitRegisterClass() argument
146 DecodeFP128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFP128BitRegisterClass() argument
152 DecodeVR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR32BitRegisterClass() argument
158 DecodeVR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR64BitRegisterClass() argument
164 DecodeVR128BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeVR128BitRegisterClass() argument
170 DecodeAR32BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeAR32BitRegisterClass() argument
176 DecodeCR64BitRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCR64BitRegisterClass() argument
198 decodeU1ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU1ImmOperand() argument
204 decodeU2ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU2ImmOperand() argument
210 decodeU3ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU3ImmOperand() argument
216 decodeU4ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU4ImmOperand() argument
222 decodeU8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU8ImmOperand() argument
228 decodeU12ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU12ImmOperand() argument
234 decodeU16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU16ImmOperand() argument
240 decodeU32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeU32ImmOperand() argument
246 decodeS8ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS8ImmOperand() argument
252 decodeS16ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS16ImmOperand() argument
258 decodeS20ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS20ImmOperand() argument
264 decodeS32ImmOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeS32ImmOperand() argument
271 decodeLenOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodeLenOperand() argument
281 decodePCDBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,bool isBranch,const MCDisassembler * Decoder) decodePCDBLOperand() argument
294 decodePC12DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC12DBLBranchOperand() argument
300 decodePC16DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC16DBLBranchOperand() argument
306 decodePC24DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC24DBLBranchOperand() argument
312 decodePC32DBLBranchOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLBranchOperand() argument
318 decodePC32DBLOperand(MCInst & Inst,uint64_t Imm,uint64_t Address,const MCDisassembler * Decoder) decodePC32DBLOperand() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepDecoders.inc | 18 const MCDisassembler *Decoder) {
19 signedDecoder<6>(MI, tmp, Decoder);
23 const MCDisassembler *Decoder) {
24 signedDecoder<12>(MI, tmp, Decoder);
28 const MCDisassembler *Decoder) {
29 signedDecoder<13>(MI, tmp, Decoder);
33 const MCDisassembler *Decoder) {
34 signedDecoder<14>(MI, tmp, Decoder);
38 const MCDisassembler *Decoder) {
39 signedDecoder<3>(MI, tmp, Decoder);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/tools/llvm-readobj/ |
| H A D | ARMWinEHPrinter.cpp | 23 // This layout is parsed by Decoder::dumpPackedEntry. No unwind bytecode is
37 // describing how to unwind the function (c.f. Decoder::decodeOpcodes).
45 // This layout is parsed by Decoder::dumpUnpackedEntry. Such an entry must
51 // up the bulk of the Decoder.
115 const size_t Decoder::PDataEntrySize = sizeof(RuntimeFunction);
118 const Decoder::RingEntry Decoder::Ring[] = {
119 { 0x80, 0x00, 1, &Decoder::opcode_0xxxxxxx }, // UOP_STACK_FREE (16-bit)
120 { 0xc0, 0x80, 2, &Decoder::opcode_10Lxxxxx }, // UOP_POP (32-bit)
121 { 0xf0, 0xc0, 1, &Decoder
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 73 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass() argument
74 bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE); in DecodeGPRRegisterClass()
86 const MCDisassembler *Decoder) { in DecodeGPRX1X5RegisterClass() argument
97 const MCDisassembler *Decoder) { in DecodeFPR16RegisterClass() argument
108 const MCDisassembler *Decoder) { in DecodeFPR32RegisterClass() argument
119 const MCDisassembler *Decoder) { in DecodeFPR32CRegisterClass() argument
130 const MCDisassembler *Decoder) { in DecodeFPR64RegisterClass() argument
141 const MCDisassembler *Decoder) { in DecodeFPR64CRegisterClass() argument
152 const MCDisassembler *Decoder) { in DecodeGPRNoX0RegisterClass() argument
157 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeGPRNoX0RegisterClass()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 129 const MCDisassembler *Decoder) { in DecodeI32RegisterClass() argument
139 const MCDisassembler *Decoder) { in DecodeI64RegisterClass() argument
149 const MCDisassembler *Decoder) { in DecodeF32RegisterClass() argument
159 const MCDisassembler *Decoder) { in DecodeF128RegisterClass() argument
169 const MCDisassembler *Decoder) { in DecodeV64RegisterClass() argument
183 const MCDisassembler *Decoder) { in DecodeVMRegisterClass() argument
193 const MCDisassembler *Decoder) { in DecodeVM512RegisterClass() argument
203 const MCDisassembler *Decoder) { in DecodeMISCRegisterClass() argument
214 const MCDisassembler *Decoder);
216 const MCDisassembler *Decoder);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 94 const MCDisassembler *Decoder) { in DecodeCRRCRegisterClass() argument
100 const MCDisassembler *Decoder) { in DecodeCRBITRCRegisterClass() argument
106 const MCDisassembler *Decoder) { in DecodeF4RCRegisterClass() argument
112 const MCDisassembler *Decoder) { in DecodeF8RCRegisterClass() argument
118 const MCDisassembler *Decoder) { in DecodeFpRCRegisterClass() argument
126 const MCDisassembler *Decoder) { in DecodeVFRCRegisterClass() argument
132 const MCDisassembler *Decoder) { in DecodeVRRCRegisterClass() argument
138 const MCDisassembler *Decoder) { in DecodeVSRCRegisterClass() argument
144 const MCDisassembler *Decoder) { in DecodeVSFRCRegisterClass() argument
150 const MCDisassembler *Decoder) { in DecodeVSSRCRegisterClass() argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/Disassembler/ |
| H A D | M68kDisassembler.cpp | 43 uint64_t Address, const void *Decoder) { in DecodeRegisterClass()
52 const void *Decoder) { in DecodeDR32RegisterClass()
53 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR32RegisterClass()
58 const void *Decoder) { in DecodeDR16RegisterClass()
59 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR16RegisterClass()
64 const void *Decoder) { in DecodeDR8RegisterClass()
65 return DecodeRegisterClass(Inst, RegNo, Address, Decoder); in DecodeDR8RegisterClass()
70 const void *Decoder) { in DecodeAR32RegisterClass()
71 return DecodeRegisterClass(Inst, RegNo | 8ULL, Address, Decoder); in DecodeAR32RegisterClass()
76 const void *Decoder) { in DecodeAR16RegisterClass()
42 DecodeRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeRegisterClass() argument
51 DecodeDR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeDR32RegisterClass() argument
57 DecodeDR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeDR16RegisterClass() argument
63 DecodeDR8RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeDR8RegisterClass() argument
69 DecodeAR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeAR32RegisterClass() argument
75 DecodeAR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeAR16RegisterClass() argument
81 DecodeXR32RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR32RegisterClass() argument
87 DecodeXR16RegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeXR16RegisterClass() argument
93 DecodeFPDRRegisterClass(MCInst & Inst,uint64_t RegNo,uint64_t Address,const void * Decoder) DecodeFPDRRegisterClass() argument
102 DecodeCCRCRegisterClass(MCInst & Inst,APInt & Insn,uint64_t Address,const void * Decoder) DecodeCCRCRegisterClass() argument
107 DecodeImm32(MCInst & Inst,uint64_t Imm,uint64_t Address,const void * Decoder) DecodeImm32() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 72 const MCDisassembler *Decoder) { in DecodeGPR8RegisterClass() argument
83 const MCDisassembler *Decoder) { in DecodeLD8RegisterClass() argument
93 const MCDisassembler *Decoder);
96 const MCDisassembler *Decoder);
99 const MCDisassembler *Decoder);
103 const MCDisassembler *Decoder);
106 const MCDisassembler *Decoder);
109 const MCDisassembler *Decoder);
113 const MCDisassembler *Decoder);
117 const MCDisassembler *Decoder);
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 69 const void *Decoder) { in DecodeARRegisterClass() argument
82 const void *Decoder) { in DecodeSRRegisterClass() argument
100 const void *Decoder) { in tryAddingSymbolicOperand() argument
101 const MCDisassembler *Dis = static_cast<const MCDisassembler *>(Decoder); in tryAddingSymbolicOperand()
107 int64_t Address, const void *Decoder) { in decodeCallOperand() argument
114 int64_t Address, const void *Decoder) { in decodeJumpOperand() argument
121 int64_t Address, const void *Decoder) { in decodeBranchOperand() argument
129 Address, 0, 3, Inst, Decoder)) in decodeBranchOperand()
135 Address, 0, 3, Inst, Decoder)) in decodeBranchOperand()
142 int64_t Address, const void *Decoder) { in decodeL32ROperand() argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 88 const MCDisassembler *Decoder = nullptr);
93 const MCDisassembler *Decoder = nullptr);
98 const MCDisassembler *Decoder);
133 const MCDisassembler *Decoder) { in DecodeGPR32RegisterClass() argument
146 const MCDisassembler *Decoder) { in DecodeGBR32ShortRegister() argument
151 return DecodeGPR32RegisterClass(Inst, RegNo, Address, Decoder); in DecodeGBR32ShortRegister()
181 const MCDisassembler *Decoder) { in DecodeSymbolicOperand() argument
183 return (nullptr != Decoder && Decoder->tryAddingSymbolicOperand( in DecodeSymbolicOperand()
189 const MCDisassembler *Decoder) { in DecodeSymbolicOperandOff() argument
192 if (!DecodeSymbolicOperand(Inst, Address, NextAddress, Decoder)) in DecodeSymbolicOperandOff()
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 48 const MCDisassembler *Decoder);
52 const MCDisassembler *Decoder);
56 const MCDisassembler *Decoder);
60 const MCDisassembler *Decoder);
63 const MCDisassembler *Decoder);
67 const MCDisassembler *Decoder);
71 const MCDisassembler *Decoder);
176 const MCDisassembler *Decoder) { in decodeRiMemoryValue() argument
189 const MCDisassembler *Decoder) { in decodeRrMemoryValue() argument
202 const MCDisassembler *Decoder) { in decodeSplsValue() argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
| H A D | HexagonDisassembler.cpp | 81 static HexagonDisassembler const &disassembler(const MCDisassembler *Decoder) { in disassembler() argument
82 return *static_cast<HexagonDisassembler const *>(Decoder); in disassembler()
86 const MCDisassembler *Decoder) { in signedDecoder() argument
87 HexagonDisassembler const &Disassembler = disassembler(Decoder); in signedDecoder()
99 const MCDisassembler *Decoder);
103 const MCDisassembler *Decoder);
106 const MCDisassembler *Decoder);
109 const MCDisassembler *Decoder);
112 const MCDisassembler *Decoder);
116 const MCDisassembler *Decoder);
549 DecodeIntRegsLow8RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsLow8RegisterClass() argument
555 DecodeIntRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsRegisterClass() argument
571 DecodeGeneralSubRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeGeneralSubRegsRegisterClass() argument
584 DecodeHvxVRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxVRRegisterClass() argument
600 DecodeDoubleRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeDoubleRegsRegisterClass() argument
613 DecodeGeneralDoubleLow8RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGeneralDoubleLow8RegsRegisterClass() argument
623 DecodeHvxWRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxWRRegisterClass() argument
641 DecodeHvxVQRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxVQRRegisterClass() argument
651 DecodePredRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodePredRegsRegisterClass() argument
660 DecodeHvxQRRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeHvxQRRegisterClass() argument
669 DecodeCtrRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeCtrRegsRegisterClass() argument
697 DecodeCtrRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeCtrRegs64RegisterClass() argument
725 DecodeModRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeModRegsRegisterClass() argument
743 unsignedImmDecoder(MCInst & MI,unsigned tmp,uint64_t,const MCDisassembler * Decoder) unsignedImmDecoder() argument
753 s32_0ImmDecoder(MCInst & MI,unsigned tmp,uint64_t,const MCDisassembler * Decoder) s32_0ImmDecoder() argument
763 brtargetDecoder(MCInst & MI,unsigned tmp,uint64_t Address,const MCDisassembler * Decoder) brtargetDecoder() argument
809 DecodeSysRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeSysRegsRegisterClass() argument
836 DecodeSysRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeSysRegs64RegisterClass() argument
851 DecodeGuestRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGuestRegsRegisterClass() argument
878 DecodeGuestRegs64RegisterClass(MCInst & Inst,unsigned RegNo,uint64_t,const MCDisassembler * Decoder) DecodeGuestRegs64RegisterClass() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 110 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass() argument
120 const MCDisassembler *Decoder) { in DecodeFPR32RegisterClass() argument
130 const MCDisassembler *Decoder) { in DecodesFPR32RegisterClass() argument
140 const MCDisassembler *Decoder) { in DecodesFPR64RegisterClass() argument
150 const MCDisassembler *Decoder) { in DecodesFPR64_VRegisterClass() argument
160 const MCDisassembler *Decoder) { in DecodeFPR64RegisterClass() argument
172 const MCDisassembler *Decoder) { in DecodesFPR128RegisterClass() argument
182 const MCDisassembler *Decoder) { in DecodesGPRRegisterClass() argument
192 const MCDisassembler *Decoder) { in DecodemGPRRegisterClass() argument
204 const MCDisassembler *Decoder) { in DecodeGPRSPRegisterClass() argument
[all …]
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 143 const MCDisassembler *Decoder) {
153 const MCDisassembler *Decoder) { in DecodeIntRegsRegisterClass()
154 return DecodeIntRegsRegisterClass(Inst, RegNo, Address, Decoder);
161 const MCDisassembler *Decoder) {
162 return DecodeIntRegsRegisterClass(Inst, RegNo, Address, Decoder);
167 const MCDisassembler *Decoder) { in DecodePointerLikeRegClass0()
177 const MCDisassembler *Decoder) { in DecodeFPRegsRegisterClass()
187 const MCDisassembler *Decoder) { in DecodeDFPRegsRegisterClass()
200 const MCDisassembler *Decoder) { in DecodeQFPRegsRegisterClass()
210 const MCDisassembler *Decoder) { in DecodeCoprocRegsRegisterClass()
147 DecodeIntRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntRegsRegisterClass() argument
157 DecodeI64RegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeI64RegsRegisterClass() argument
165 DecodePointerLikeRegClass0(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodePointerLikeRegClass0() argument
171 DecodeFPRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFPRegsRegisterClass() argument
181 DecodeDFPRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeDFPRegsRegisterClass() argument
191 DecodeQFPRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeQFPRegsRegisterClass() argument
204 DecodeCoprocRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocRegsRegisterClass() argument
214 DecodeFCCRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeFCCRegsRegisterClass() argument
223 DecodeASRRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeASRRegsRegisterClass() argument
232 DecodePRRegsRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodePRRegsRegisterClass() argument
241 DecodeIntPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeIntPairRegisterClass() argument
257 DecodeCoprocPairRegisterClass(MCInst & Inst,unsigned RegNo,uint64_t Address,const MCDisassembler * Decoder) DecodeCoprocPairRegisterClass() argument
330 tryAddingSymbolicOperand(int64_t Value,bool isBranch,uint64_t Address,uint64_t Offset,uint64_t Width,MCInst & MI,const MCDisassembler * Decoder) tryAddingSymbolicOperand() argument
336 DecodeCall(MCInst & MI,unsigned insn,uint64_t Address,const MCDisassembler * Decoder) DecodeCall() argument
346 DecodeSIMM13(MCInst & MI,unsigned insn,uint64_t Address,const MCDisassembler * Decoder) DecodeSIMM13() argument
[all...] |
| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 60 const MCDisassembler *Decoder) { in DecodeGPRRegisterClass() argument
69 const MCDisassembler *Decoder) { in DecodeFPR32RegisterClass() argument
78 const MCDisassembler *Decoder) { in DecodeFPR64RegisterClass() argument
87 const MCDisassembler *Decoder) { in DecodeCFRRegisterClass() argument
96 const MCDisassembler *Decoder) { in DecodeFCSRRegisterClass() argument
105 const MCDisassembler *Decoder) { in DecodeLSX128RegisterClass() argument
114 const MCDisassembler *Decoder) { in DecodeLASX256RegisterClass() argument
123 const MCDisassembler *Decoder) { in DecodeSCRRegisterClass() argument
133 const MCDisassembler *Decoder) { in decodeUImmOperand() argument
142 const MCDisassembler *Decoder) { in decodeSImmOperand() argument
|
| /freebsd/contrib/llvm-project/llvm/lib/DebugInfo/GSYM/ |
| H A D | ObjectFileTransformer.cpp | 52 DataExtractor Decoder(BuildIDData, Obj.makeTriple().isLittleEndian(), 8); in getUUID() local
54 const uint32_t NameSize = Decoder.getU32(&Offset); in getUUID()
55 const uint32_t PayloadSize = Decoder.getU32(&Offset); in getUUID()
56 const uint32_t PayloadType = Decoder.getU32(&Offset); in getUUID()
57 StringRef Name(Decoder.getFixedLengthString(&Offset, NameSize)); in getUUID()
60 StringRef UUIDBytes(Decoder.getBytes(&Offset, PayloadSize)); in getUUID()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 106 const MCDisassembler *Decoder) { in decodeSOPPBrTarget() argument
107 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSOPPBrTarget()
120 const MCDisassembler *Decoder) { in decodeSMEMOffset() argument
121 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSMEMOffset()
134 const MCDisassembler *Decoder) { in decodeBoolReg() argument
135 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeBoolReg()
141 const MCDisassembler *Decoder) { in decodeSplitBarrier() argument
142 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeSplitBarrier()
147 const MCDisassembler *Decoder) { in decodeDpp8FI() argument
148 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeDpp8FI()
[all …]
|
| /freebsd/contrib/ntp/html/scripts/ |
| H A D | audio.txt | 2 <li class='inline'><a href='drivers/driver6.html'>IRIG Audio Decoder</a>\
3 <li class='inline'><a href='drivers/driver7.html'>Radio CHU Audio Demodulator/Decoder</a></li>\
4 <li class='inline'><a href='drivers/driver36.html'>Radio WWV/H Audio Demodulator/Decoder</a></li>\
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 75 const MCDisassembler *Decoder) { in DecodeGR8RegisterClass() argument
93 const MCDisassembler *Decoder) { in DecodeGR16RegisterClass() argument
103 const MCDisassembler *Decoder);
107 const MCDisassembler *Decoder);
112 const MCDisassembler *Decoder) { in DecodeCGImm() argument
130 const MCDisassembler *Decoder) { in DecodeMemOperand() argument
134 if (DecodeGR16RegisterClass(MI, Reg, Address, Decoder) != in DecodeMemOperand()
|
| /freebsd/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | DecoderEmitter.cpp | 96 std::string Decoder; member
101 : Decoder(std::move(D)), HasCompleteDecoder(HCD), InitValue(0) {} in OperandInfo()
1051 for (const auto &Decoder : Decoders) { in emitDecoderFunction() local
1053 OS << Decoder; in emitDecoderFunction()
1182 const std::string &Decoder = OpInfo.Decoder; in emitBinaryParser() local
1206 if (Decoder != "") { in emitBinaryParser()
1208 o.indent(Indentation) << "if (!Check(S, " << Decoder in emitBinaryParser()
1225 if (Op.numFields() == 0 && !Op.Decoder.empty()) { in emitDecoder()
1228 << "if (!Check(S, " << Op.Decoder in emitDecoder()
1245 SmallString<256> Decoder; in getDecoderIndex() local
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | mediatek-jpeg-decoder.txt | 1 * Mediatek JPEG Decoder
3 Mediatek JPEG Decoder is the JPEG decode hardware present in Mediatek SoCs
|