Lines Matching refs:Decoder

69                                           const void *Decoder) {  in DecodeARRegisterClass()  argument
82 const void *Decoder) { in DecodeSRRegisterClass() argument
100 const void *Decoder) { in tryAddingSymbolicOperand() argument
101 const MCDisassembler *Dis = static_cast<const MCDisassembler *>(Decoder); in tryAddingSymbolicOperand()
107 int64_t Address, const void *Decoder) { in decodeCallOperand() argument
114 int64_t Address, const void *Decoder) { in decodeJumpOperand() argument
121 int64_t Address, const void *Decoder) { in decodeBranchOperand() argument
129 Address, 0, 3, Inst, Decoder)) in decodeBranchOperand()
135 Address, 0, 3, Inst, Decoder)) in decodeBranchOperand()
142 int64_t Address, const void *Decoder) { in decodeL32ROperand() argument
151 int64_t Address, const void *Decoder) { in decodeImm8Operand() argument
159 const void *Decoder) { in decodeImm8_sh8Operand() argument
166 int64_t Address, const void *Decoder) { in decodeImm12Operand() argument
173 int64_t Address, const void *Decoder) { in decodeUimm4Operand() argument
180 int64_t Address, const void *Decoder) { in decodeUimm5Operand() argument
187 int64_t Address, const void *Decoder) { in decodeImm1_16Operand() argument
195 const void *Decoder) { in decodeShimm1_31Operand() argument
204 int64_t Address, const void *Decoder) { in decodeB4constOperand() argument
215 const void *Decoder) { in decodeB4constuOperand() argument
223 int64_t Address, const void *Decoder) { in decodeMem8Operand() argument
225 DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder); in decodeMem8Operand()
231 int64_t Address, const void *Decoder) { in decodeMem16Operand() argument
233 DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder); in decodeMem16Operand()
239 int64_t Address, const void *Decoder) { in decodeMem32Operand() argument
241 DecodeARRegisterClass(Inst, Imm & 0xf, Address, Decoder); in decodeMem32Operand()