Lines Matching refs:Decoder
106 const MCDisassembler *Decoder) { in decodeSOPPBrTarget() argument
107 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSOPPBrTarget()
120 const MCDisassembler *Decoder) { in decodeSMEMOffset() argument
121 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeSMEMOffset()
134 const MCDisassembler *Decoder) { in decodeBoolReg() argument
135 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeBoolReg()
141 const MCDisassembler *Decoder) { in decodeSplitBarrier() argument
142 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeSplitBarrier()
147 const MCDisassembler *Decoder) { in decodeDpp8FI() argument
148 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeDpp8FI()
155 const MCDisassembler *Decoder) { \
156 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); \
165 const MCDisassembler *Decoder) { \
167 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); \
175 const MCDisassembler *Decoder) { \
177 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); \
188 const MCDisassembler *Decoder) { in decodeSrcOp() argument
190 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeSrcOp()
206 const MCDisassembler *Decoder) { in decodeAV10() argument
208 false, 0, AMDGPU::OperandSemantics::INT, Decoder); in decodeAV10()
215 const MCDisassembler *Decoder) { in decodeSrcReg9() argument
217 AMDGPU::OperandSemantics::INT, Decoder); in decodeSrcReg9()
225 const MCDisassembler *Decoder) { in decodeSrcA9() argument
227 AMDGPU::OperandSemantics::INT, Decoder); in decodeSrcA9()
235 const MCDisassembler *Decoder) { in decodeSrcAV10() argument
237 AMDGPU::OperandSemantics::INT, Decoder); in decodeSrcAV10()
249 const MCDisassembler *Decoder) { in decodeSrcRegOrImm9() argument
251 (AMDGPU::OperandSemantics)OperandSemantics, Decoder); in decodeSrcRegOrImm9()
260 const MCDisassembler *Decoder) { in decodeSrcRegOrImmA9() argument
262 (AMDGPU::OperandSemantics)OperandSemantics, Decoder); in decodeSrcRegOrImmA9()
269 const MCDisassembler *Decoder) { in decodeSrcRegOrImmDeferred9() argument
271 (AMDGPU::OperandSemantics)OperandSemantics, Decoder); in decodeSrcRegOrImmDeferred9()
310 const MCDisassembler *Decoder) { in DECODE_OPERAND_REG_8()
316 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in DECODE_OPERAND_REG_8()
322 const MCDisassembler *Decoder) { in DecodeVGPR_16_Lo128RegisterClass() argument
327 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in DecodeVGPR_16_Lo128RegisterClass()
333 const MCDisassembler *Decoder) { in decodeOperand_VSrcT16_Lo128() argument
336 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_VSrcT16_Lo128()
349 const MCDisassembler *Decoder) { in decodeOperand_VSrcT16() argument
352 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_VSrcT16()
365 const MCDisassembler *Decoder) { in decodeOperand_KImmFP() argument
366 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_KImmFP()
371 uint64_t Addr, const void *Decoder) { in decodeOperandVOPDDstY() argument
372 const auto *DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperandVOPDDstY()
392 const MCDisassembler *Decoder) { in decodeAVLdSt() argument
393 auto DAsm = static_cast<const AMDGPUDisassembler*>(Decoder); in decodeAVLdSt()
427 const MCDisassembler *Decoder) { in decodeAVLdSt() argument
428 return decodeAVLdSt(Inst, Imm, Opw, Decoder); in decodeAVLdSt()
433 const MCDisassembler *Decoder) { in decodeOperand_VSrc_f64() argument
435 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in decodeOperand_VSrc_f64()
450 const MCDisassembler *Decoder) { in DECODE_SDWA()
451 auto DAsm = static_cast<const AMDGPUDisassembler *>(Decoder); in DECODE_SDWA()