/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIMachineFunctionInfo.cpp | 78 ArgInfo.PrivateSegmentBuffer = in SIMachineFunctionInfo() 84 ArgInfo = AMDGPUArgumentUsageInfo::FixedABIFunctionInfo; in SIMachineFunctionInfo() 94 ArgInfo.PrivateSegmentBuffer = in SIMachineFunctionInfo() 152 ArgInfo.PrivateSegmentWaveByteOffset = in SIMachineFunctionInfo() 192 ArgInfo.PrivateSegmentBuffer = in addPrivateSegmentBuffer() 196 return ArgInfo.PrivateSegmentBuffer.getRegister(); in addPrivateSegmentBuffer() 200 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr() 203 return ArgInfo.DispatchPtr.getRegister(); in addDispatchPtr() 207 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr() 210 return ArgInfo.QueuePtr.getRegister(); in addQueuePtr() [all …]
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H A D | AMDGPUCallLowering.h | 30 void lowerParameter(MachineIRBuilder &B, ArgInfo &AI, uint64_t Offset, 62 SmallVectorImpl<ArgInfo> &InArgs) const; 66 SmallVectorImpl<ArgInfo> &OutArgs) const; 72 SmallVectorImpl<ArgInfo> &InArgs, 73 SmallVectorImpl<ArgInfo> &OutArgs) const; 82 SmallVectorImpl<ArgInfo> &OutArgs) const;
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H A D | SIMachineFunctionInfo.h | 281 std::optional<SIArgumentInfo> ArgInfo; 324 YamlIO.mapOptional("argumentInfo", MFI.ArgInfo); 400 AMDGPUFunctionArgInfo ArgInfo; 772 ArgInfo.WorkGroupIDX = ArgDescriptor::createRegister(getNextSystemSGPR()); 774 return ArgInfo.WorkGroupIDX.getRegister(); 778 ArgInfo.WorkGroupIDY = ArgDescriptor::createRegister(getNextSystemSGPR()); 780 return ArgInfo.WorkGroupIDY.getRegister(); 784 ArgInfo.WorkGroupIDZ = ArgDescriptor::createRegister(getNextSystemSGPR()); 786 return ArgInfo.WorkGroupIDZ.getRegister(); 790 ArgInfo.WorkGroupInfo = ArgDescriptor::createRegister(getNextSystemSGPR()); [all …]
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H A D | AMDGPUTargetMachine.cpp | 1646 if (YamlMFI.ArgInfo && in parseMachineFunctionInfo() 1647 (parseAndCheckArgument(YamlMFI.ArgInfo->PrivateSegmentBuffer, in parseMachineFunctionInfo() 1649 MFI->ArgInfo.PrivateSegmentBuffer, 4, 0) || in parseMachineFunctionInfo() 1650 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchPtr, in parseMachineFunctionInfo() 1651 AMDGPU::SReg_64RegClass, MFI->ArgInfo.DispatchPtr, in parseMachineFunctionInfo() 1653 parseAndCheckArgument(YamlMFI.ArgInfo->QueuePtr, AMDGPU::SReg_64RegClass, in parseMachineFunctionInfo() 1654 MFI->ArgInfo.QueuePtr, 2, 0) || in parseMachineFunctionInfo() 1655 parseAndCheckArgument(YamlMFI.ArgInfo->KernargSegmentPtr, in parseMachineFunctionInfo() 1657 MFI->ArgInfo.KernargSegmentPtr, 2, 0) || in parseMachineFunctionInfo() 1658 parseAndCheckArgument(YamlMFI.ArgInfo->DispatchID, in parseMachineFunctionInfo() [all …]
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H A D | AMDGPUCallLowering.cpp | 253 void assignValueToAddress(const CallLowering::ArgInfo &Arg, in assignValueToAddress() 321 SmallVector<ArgInfo, 8> SplitRetInfos; in lowerReturnVal() 326 ArgInfo RetInfo(Reg, VT.getTypeForEVT(Ctx), 0); in lowerReturnVal() 414 void AMDGPUCallLowering::lowerParameter(MachineIRBuilder &B, ArgInfo &OrigArg, in lowerParameter() 424 SmallVector<ArgInfo, 32> SplitArgs; in lowerParameter() 429 for (ArgInfo &SplitArg : SplitArgs) { in lowerParameter() 567 ArgInfo OrigArg(VRegs[i], Arg, i); in lowerFormalArgumentsKernel() 620 SmallVector<ArgInfo, 32> SplitArgs; in lowerFormalArguments() 661 ArgInfo OrigArg(VRegs[Idx], Arg, Idx); in lowerFormalArguments() 998 SmallVectorImpl<ArgInfo> &InArgs) const { in doCallerAndCalleePassArgsTheSameWay() [all …]
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H A D | AMDGPUArgumentUsageInfo.h | 190 void setFuncArgInfo(const Function &F, const AMDGPUFunctionArgInfo &ArgInfo) { in setFuncArgInfo() argument 191 ArgInfoMap[&F] = ArgInfo; in setFuncArgInfo()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
H A D | CallLowering.h | 62 struct ArgInfo : public BaseArgInfo { struct 81 ArgInfo(ArrayRef<Register> Regs, Type *Ty, unsigned OrigIndex, argument 94 ArgInfo(ArrayRef<Register> Regs, const Value &OrigValue, unsigned OrigIndex, 97 : ArgInfo(Regs, OrigValue.getType(), OrigIndex, Flags, IsFixed, &OrigValue) {} 99 ArgInfo() = default; 116 ArgInfo OrigRet; 119 SmallVector<ArgInfo, 32> OrigArgs; 200 CCValAssign::LocInfo LocInfo, const ArgInfo &Info, in assignArg() 294 virtual void assignValueToAddress(const ArgInfo &Arg, unsigned ValRegIndex, in assignValueToAddress() 308 virtual unsigned assignCustomValue(ArgInfo &Arg, ArrayRef<CCValAssign> VAs, [all …]
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H A D | LegalizerHelper.h | 447 const CallLowering::ArgInfo &Result, 448 ArrayRef<CallLowering::ArgInfo> Args, CallingConv::ID CC, 454 const CallLowering::ArgInfo &Result, 455 ArrayRef<CallLowering::ArgInfo> Args,
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.h | 55 SmallVectorImpl<ArgInfo> &InArgs, 56 SmallVectorImpl<ArgInfo> &OutArgs) const; 74 SmallVectorImpl<ArgInfo> &OutArgs) const; 79 SmallVectorImpl<ArgInfo> &InArgs) const; 83 SmallVectorImpl<ArgInfo> &OutArgs) const;
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H A D | AArch64CallLowering.cpp | 92 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 118 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 308 void assignValueToAddress(const CallLowering::ArgInfo &Arg, unsigned RegIndex, in assignValueToAddress() 385 SmallVector<ArgInfo, 8> SplitArgs; in lowerReturn() 390 ArgInfo CurArgInfo = ArgInfo{CurVReg, SplitEVTs[i].getTypeForEVT(Ctx), 0}; in lowerReturn() 662 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 675 ArgInfo OrigArg{VRegs[i], Arg, i}; in lowerFormalArguments() 812 SmallVectorImpl<ArgInfo> &InArgs) const { in doCallerAndCalleePassArgsTheSameWay() 855 SmallVectorImpl<ArgInfo> &OrigOutArgs) const { in areCalleeOutgoingArgsTailCallable() 878 SmallVector<ArgInfo, 8> OutArgs; in areCalleeOutgoingArgsTailCallable() [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/ |
H A D | SCCPSolver.h | 41 struct ArgInfo { struct 45 ArgInfo(Argument *F, Constant *A) : Formal(F), Actual(A) {} in ArgInfo() argument 47 bool operator==(const ArgInfo &Other) const { 51 bool operator!=(const ArgInfo &Other) const { return !(*this == Other); } 53 friend hash_code hash_value(const ArgInfo &A) { in hash_value() argument 178 const SmallVectorImpl<ArgInfo> &Args);
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/freebsd/contrib/llvm-project/clang/include/clang/CodeGen/ |
H A D | CGFunctionInfo.h | 555 typedef CGFunctionInfoArgInfo ArgInfo; typedef 622 ArgInfo *getArgsBuffer() { in getArgsBuffer() 623 return getTrailingObjects<ArgInfo>(); in getArgsBuffer() 625 const ArgInfo *getArgsBuffer() const { in getArgsBuffer() 626 return getTrailingObjects<ArgInfo>(); in getArgsBuffer() 649 size_t numTrailingObjects(OverloadToken<ArgInfo>) const { in numTrailingObjects() argument 656 typedef const ArgInfo *const_arg_iterator; 657 typedef ArgInfo *arg_iterator; 659 MutableArrayRef<ArgInfo> arguments() { in arguments() 660 return MutableArrayRef<ArgInfo>(arg_begin(), NumArgs); in arguments() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsCallLowering.cpp | 43 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 71 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 105 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, 167 MipsIncomingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 212 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, 259 MipsOutgoingValueHandler::assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 330 SmallVector<ArgInfo, 8> RetInfos; in lowerReturn() 332 ArgInfo ArgRetInfo(VRegs, *Val, 0); in lowerReturn() 376 SmallVector<ArgInfo, 8> ArgInfos; in lowerFormalArguments() 379 ArgInfo AInf in lowerFormalArguments() [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
H A D | M68kCallLowering.cpp | 108 SmallVector<ArgInfo, 8> SplitArgs; in lowerReturn() 109 ArgInfo OrigArg{VRegs, Val->getType(), 0}; in lowerReturn() 131 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 134 ArgInfo OrigArg{VRegs[I], Arg.getType(), I}; in lowerFormalArguments() 200 SmallVector<ArgInfo, 8> OutArgs; in lowerCall() 204 SmallVector<ArgInfo, 8> InArgs; in lowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
H A D | PPCCallLowering.cpp | 86 ArgInfo OrigArg{VRegs, Val->getType(), 0}; in lowerReturn() 90 SmallVector<ArgInfo, 8> SplitArgs; in lowerReturn() 124 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 130 ArgInfo OrigArg{VRegs[I], Arg, I}; in lowerFormalArguments()
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 136 ArgInfo OrigArg{ArgRegs[i], *Arg.get(), i, getAttributesForArgIdx(CB, i), in lowerCall() 179 Info.OrigRet = ArgInfo{ResRegs, RetTy, 0, getAttributesForReturn(CB)}; in lowerCall() 220 void CallLowering::setArgFlags(CallLowering::ArgInfo &Arg, unsigned OpIdx, in setArgFlags() 278 CallLowering::setArgFlags<Function>(CallLowering::ArgInfo &Arg, unsigned OpIdx, 283 CallLowering::setArgFlags<CallBase>(CallLowering::ArgInfo &Arg, unsigned OpIdx, 287 void CallLowering::splitToValueTypes(const ArgInfo &OrigArg, in splitToValueTypes() 288 SmallVectorImpl<ArgInfo> &SplitArgs, in splitToValueTypes() 651 SmallVectorImpl<ArgInfo> &Args, MachineIRBuilder &MIRBuilder, in determineAndHandleAssignments() 675 SmallVectorImpl<ArgInfo> &Args, in determineAssignments() 736 SmallVectorImpl<ArgInfo> &Args, in handleAssignments() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVCallLowering.cpp | 49 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 119 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 195 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 245 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 408 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturnVal() 411 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerReturnVal() 526 SmallVector<ArgInfo, 32> SplitArgInfos; in lowerFormalArguments() 531 ArgInfo AInfo(VRegs[Index], Arg.getType(), Index); in lowerFormalArguments() 584 SmallVector<ArgInfo, 32> SplitArgInfos; in lowerCall() 639 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerCall()
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/ |
H A D | Mips.cpp | 218 ABIArgInfo ArgInfo = in classifyArgumentType() local 221 ArgInfo.setInReg(true); in classifyArgumentType() 222 return ArgInfo; in classifyArgumentType() 306 ABIArgInfo ArgInfo = in classifyReturnType() local 308 ArgInfo.setInReg(true); in classifyReturnType() 309 return ArgInfo; in classifyReturnType()
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H A D | CSKY.cpp | 55 for (auto &ArgInfo : FI.arguments()) { in computeInfo() local 56 ArgInfo.info = classifyArgumentType(ArgInfo.type, ArgGPRsLeft, ArgFPRsLeft); in computeInfo()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86CallLowering.cpp |
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
H A D | X86CallLowering.cpp | 71 const CallLowering::ArgInfo &Info, ISD::ArgFlagsTy Flags, in assignArg() 167 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturn() 170 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerReturn() 269 SmallVector<ArgInfo, 8> SplitArgs; in lowerFormalArguments() 294 ArgInfo OrigArg(VRegs[Idx], Arg.getType(), Idx); in lowerFormalArguments() 348 SmallVector<ArgInfo, 8> SplitArgs; in lowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMCallLowering.cpp | 141 unsigned assignCustomValue(CallLowering::ArgInfo &Arg, in assignCustomValue() 205 ArgInfo OrigRetInfo(VRegs, Val->getType(), 0); in lowerReturnVal() 208 SmallVector<ArgInfo, 4> SplitRetInfos; in lowerReturnVal() 317 unsigned assignCustomValue(ARMCallLowering::ArgInfo &Arg, in assignCustomValue() 406 SmallVector<ArgInfo, 8> SplitArgInfos; in lowerFormalArguments() 409 ArgInfo OrigArgInfo(VRegs[Idx], Arg.getType(), Idx); in lowerFormalArguments() 502 SmallVector<ArgInfo, 8> ArgInfos; in lowerCall()
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/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | Function.cpp | 1269 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1270 OutputTable.push_back(IITDescriptor::get(IITDescriptor::Argument, ArgInfo)); in DecodeIITType() 1274 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1276 ArgInfo)); in DecodeIITType() 1280 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1282 ArgInfo)); in DecodeIITType() 1286 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1288 ArgInfo)); in DecodeIITType() 1292 unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]); in DecodeIITType() local 1294 ArgInfo)); in DecodeIITType() [all …]
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/freebsd/contrib/llvm-project/clang/lib/Sema/ |
H A D | SemaHexagon.cpp | 26 struct ArgInfo { in CheckHexagonBuiltinArgument() struct 34 ArgInfo Infos[2]; in CheckHexagonBuiltinArgument() 265 for (const ArgInfo &A : F->Infos) { in CheckHexagonBuiltinArgument()
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/freebsd/contrib/llvm-project/clang/lib/CodeGen/ |
H A D | CGCall.cpp | 840 operator new(totalSizeToAlloc<ArgInfo, ExtParameterInfo>( in create() 1436 SmallVector<IRArgs, 8> ArgInfo; member in __anonf4c048640511::ClangToLLVMArgMapping 1442 ArgInfo(OnlyRequiredArgs ? FI.getNumRequiredArgs() : FI.arg_size()) { in ClangToLLVMArgMapping() 1461 assert(ArgNo < ArgInfo.size()); in hasPaddingArg() 1462 return ArgInfo[ArgNo].PaddingArgIndex != InvalidIndex; in hasPaddingArg() 1466 return ArgInfo[ArgNo].PaddingArgIndex; in getPaddingArgNo() 1472 assert(ArgNo < ArgInfo.size()); in getIRArgs() 1473 return std::make_pair(ArgInfo[ArgNo].FirstArgIndex, in getIRArgs() 1474 ArgInfo[ArgNo].NumberOfArgs); in getIRArgs() 1502 auto &IRArgs = ArgInfo[ArgNo]; in construct() [all …]
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