| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64ExternalSymbolizer.cpp | 109 MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
118 } else if (MI.getOpcode() == AArch64::ADR) { in tryAddingSymbolicOperand()
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| /freebsd/sys/contrib/device-tree/Bindings/iio/temperature/ |
| H A D | tmp007.txt | 8 - reg: the I2C address of the sensor (changeable via ADR pins)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedPredExynos.td | 122 [ADR, ADRP,
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| H A D | AArch64MacroFusion.cpp | 229 case AArch64::ADR: in isAddressLdStPair()
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| H A D | AArch64AsmPrinter.cpp | 1484 EmitToStreamer(OutStreamer, MCInstBuilder(AArch64::ADR) in LowerJumpTableDest()
1612 MCInstBuilder(AArch64::ADR).addReg(AArch64::X17).addExpr(AdrLabelE)); in LowerHardenedBRJumpTable()
2533 MCInstBuilder(AArch64::ADR).addReg(AArch64::X17).addOperand(GAMC)); in LowerLOADgotAUTH()
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| H A D | AArch64SchedCyclone.td | 141 // ADR,ADRP
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| H A D | AArch64SchedTSV110.td | 410 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM3.td | 510 def : InstRW<[M3WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedAmpere1.td | 983 def : InstRW<[Ampere1Write_1cyc_1A], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedAmpere1B.td | 965 def : InstRW<[Ampere1BWrite_1cyc_1A], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM4.td | 605 def : InstRW<[M4WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedExynosM5.td | 652 def : InstRW<[M5WriteZ0], (instrs ADR, ADRP)>;
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| H A D | AArch64SchedOryon.td | 696 (instrs ADR,ADRP)>;
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| /freebsd/sys/contrib/device-tree/Bindings/mips/cavium/ |
| H A D | bootbus.txt | 32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
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| /freebsd/sys/contrib/edk2/Include/Protocol/ |
| H A D | DevicePath.h | 278 UINT32 ADR; member
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| /freebsd/lib/libefivar/ |
| H A D | efivar-dp-format.c | 640 UefiDevicePathLibCatPrint (Str, "AcpiAdr(0x%x", AcpiAdr->ADR); in DevPathToTextAcpiAdr()
641 Addr = &AcpiAdr->ADR + 1; in DevPathToTextAcpiAdr()
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| H A D | efivar-dp-parse.c | 1121 (&AcpiAdr->ADR)[Index] = (UINT32)Strtoi (DisplayDeviceStr); in DevPathFromTextAcpiAdr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrHFP.td | 134 def ADR : BinaryRR<"adr", 0x2A, null_frag, FP64, FP64>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64MCCodeEmitter.cpp | 277 unsigned Kind = MI.getOpcode() == AArch64::ADR in getAdrLabelOpValue()
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| H A D | AArch64MCTargetDesc.cpp | 406 if (Inst.getOpcode() == AArch64::ADR) in evaluateBranch()
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| /freebsd/contrib/file/magic/Magdir/ |
| H A D | hp | 208 >8 leshort 0x2911 (ADR)
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 1497 : ARM::ADR)) in emitInstruction()
1513 : ARM::ADR)) in emitInstruction()
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| H A D | ARMScheduleR52.td | 326 (instregex "ADR", "MOVsi", "MVNS?s?i", "t2MOVS?si")>;
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| H A D | ARMScheduleSwift.td | 129 // ADC,ADD,NEG,RSB,RSC,SBC,SUB,ADR
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| H A D | ARMScheduleA57.td | 170 // ADD{S}, ADC{S}, ADR, AND{S}, BIC{S}, CMN, CMP, EOR{S}, ORN{S}, ORR{S},
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