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Searched refs:ADF_CSR_WR (Results 1 – 23 of 23) sorted by relevance

/freebsd/sys/dev/qat/qat_hw/qat_c4xxx/
H A Dadf_c4xxx_hw_data.c228 ADF_CSR_WR(csr, ADF_C4XXX_SSMWDTL_OFFSET(accel), ssm_wdt_low); in c4xxx_set_ssm_wdtimer()
229 ADF_CSR_WR(csr, ADF_C4XXX_SSMWDTH_OFFSET(accel), ssm_wdt_high); in c4xxx_set_ssm_wdtimer()
230 ADF_CSR_WR(csr, in c4xxx_set_ssm_wdtimer()
233 ADF_CSR_WR(csr, in c4xxx_set_ssm_wdtimer()
351 ADF_CSR_WR(csr, in get_eth_doorbell_msg()
435 ADF_CSR_WR(csr, in adf_enable_slice_hang_detection()
454 ADF_CSR_WR(csr, in adf_enable_ras()
484 ADF_CSR_WR(csr, ADF_C4XXX_GET_INTMASKSSM_OFFSET(accel), 0); in adf_enable_error_interrupts()
487 ADF_CSR_WR(csr, ADF_C4XXX_GET_SPPPARERRMSK_OFFSET(accel), 0); in adf_enable_error_interrupts()
490 ADF_CSR_WR(csr, in adf_enable_error_interrupts()
[all …]
H A Dadf_c4xxx_ras.c361 ADF_CSR_WR(pmisc, ADF_C4XXX_HI_ME_COR_ERRLOG, mecorrerr); in adf_process_errsou8()
386 ADF_CSR_WR(pmisc, ADF_C4XXX_HI_ME_UNCERR_LOG, me_uncorr_err); in adf_handle_ae_uncorr_err()
421 ADF_CSR_WR(pmisc, ADF_C4XXX_RI_MEM_PAR_ERR_STS, ri_mem_par_err_sts); in adf_handle_ri_mem_par_err()
449 ADF_CSR_WR(pmisc, ADF_C4XXX_TI_MEM_PAR_ERR_STS0, ti_mem_par_err_sts0); in adf_handle_ti_mem_par_err()
450 ADF_CSR_WR(pmisc, ADF_C4XXX_TI_MEM_PAR_ERR_STS1, ti_mem_par_err_sts1); in adf_handle_ti_mem_par_err()
493 ADF_CSR_WR(pmisc, in adf_handle_host_cpp_par_err()
550 ADF_CSR_WR(pmisc, ADF_C4XXX_EXPRPSSMCPR0(accel), 0); in adf_process_exprpssmcpr()
566 ADF_CSR_WR(pmisc, ADF_C4XXX_EXPRPSSMCPR1(accel), 0); in adf_process_exprpssmcpr()
590 ADF_CSR_WR(pmisc, ADF_C4XXX_EXPRPSSMXLT0(accel), 0); in adf_process_exprpssmxlt()
606 ADF_CSR_WR(pmisc, ADF_C4XXX_EXPRPSSMXLT0(accel), 0); in adf_process_exprpssmxlt()
[all …]
H A Dadf_c4xxx_inline.h159 ADF_CSR_WR(csr_base_addr, \
165 ADF_CSR_WR(csr_base_addr, \
180 ADF_CSR_WR(csr_base_addr, \
186 ADF_CSR_WR(csr_base_addr, \
244 ADF_CSR_WR(csr_base_addr, \
250 ADF_CSR_WR(csr_base_addr, \
H A Dadf_c4xxx_hw_data.h547 ADF_CSR_WR(csr_addr, (csr_offset) + ((index)*ADF_C4XXX_WQM_SIZE), value)
/freebsd/sys/dev/qat/include/common/
H A Dadf_gen2_hw_data.h44 ADF_CSR_WR(csr_base_addr, \
76 ADF_CSR_WR(csr_base_addr, \
80 ADF_CSR_WR(csr_base_addr, \
87 ADF_CSR_WR(csr_base_addr, \
92 ADF_CSR_WR(csr_base_addr, \
97 ADF_CSR_WR(csr_base_addr, \
102 ADF_CSR_WR(csr_base_addr, \
106 ADF_CSR_WR(csr_base_addr, \
112 ADF_CSR_WR(csr_base_addr, \
116 ADF_CSR_WR(csr_base_addr, \
[all …]
H A Dadf_gen4_hw_data.h56 ADF_CSR_WR((csr_base_addr), \
69 ADF_CSR_WR((_csr_base_addr), \
74 ADF_CSR_WR((_csr_base_addr), \
106 ADF_CSR_WR((csr_base_addr), \
111 ADF_CSR_WR((csr_base_addr), \
116 ADF_CSR_WR((csr_base_addr), \
121 ADF_CSR_WR((csr_base_addr), \
126 ADF_CSR_WR((csr_base_addr), \
131 ADF_CSR_WR((csr_base_addr), \
136 ADF_CSR_WR((csr_base_addr), \
[all …]
H A Dadf_transport_access_macros.h91 ADF_CSR_WR(csr_base_addr, \
100 ADF_CSR_WR(csr_base_addr, \
104 ADF_CSR_WR(csr_base_addr, \
131 ADF_CSR_WR(csr_base_addr, \
136 ADF_CSR_WR(csr_base_addr, \
141 ADF_CSR_WR(csr_base_addr, \
146 ADF_CSR_WR(csr_base_addr, \
150 ADF_CSR_WR(csr_base_addr, \
156 ADF_CSR_WR(csr_base_addr, \
160 ADF_CSR_WR(csr_base_addr, \
[all …]
H A Dicp_qat_hal.h146 ADF_CSR_WR(handle->hal_misc_addr_v, CAP_CSR_ADDR(csr), val)
194 ADF_CSR_WR(handle->hal_misc_addr_v, AE_CSR_ADDR(handle, ae, csr), val)
202 ADF_CSR_WR(handle->hal_misc_addr_v, AE_XFER_ADDR(handle, ae, reg), val)
204 ADF_CSR_WR((handle)->hal_sram_addr_v, addr, val)
H A Dadf_accel_devices.h470 #define ADF_CSR_WR(csr_base, csr_offset, val) \ macro
537 ADF_CSR_WR(csr, offs, val); in adf_csr_fetch_and_and()
546 ADF_CSR_WR(csr, offs, val); in adf_csr_fetch_and_or()
/freebsd/sys/dev/qat/include/
H A Dadf_gen4vf_hw_csr_data.h44 ADF_CSR_WR((csr_base_addr), \
58 ADF_CSR_WR((_csr_base_addr), \
63 ADF_CSR_WR((_csr_base_addr), \
90 ADF_CSR_WR((csr_base_addr), \
100 ADF_CSR_WR((csr_base_addr), \
106 ADF_CSR_WR((csr_base_addr), \
112 ADF_CSR_WR((csr_base_addr), \
118 ADF_CSR_WR((csr_base_addr), \
124 ADF_CSR_WR((csr_base_addr), \
130 ADF_CSR_WR((csr_base_addr), \
[all …]
/freebsd/sys/dev/qat/qat_hw/qat_200xx/
H A Dadf_200xx_hw_data.c180 ADF_CSR_WR(csr, ADF_ERRMSK0, ADF_200XX_ERRMSK0_CERR); /* ME0-ME3 */ in adf_enable_error_interrupts()
181 ADF_CSR_WR(csr, ADF_ERRMSK1, ADF_200XX_ERRMSK1_CERR); /* ME4-ME5 */ in adf_enable_error_interrupts()
182 ADF_CSR_WR(csr, ADF_ERRMSK5, ADF_200XX_ERRMSK5_CERR); /* SSM2 */ in adf_enable_error_interrupts()
188 ADF_CSR_WR(csr, ADF_200XX_RICPPINTCTL, ADF_200XX_RICPP_EN); in adf_enable_error_interrupts()
191 ADF_CSR_WR(csr, ADF_200XX_TICPPINTCTL, ADF_200XX_TICPP_EN); in adf_enable_error_interrupts()
194 ADF_CSR_WR(csr, ADF_200XX_CPP_CFC_ERR_CTRL, ADF_200XX_CPP_CFC_UE); in adf_enable_error_interrupts()
204 ADF_CSR_WR(csr, in adf_disable_error_interrupts()
208 ADF_CSR_WR(csr, in adf_disable_error_interrupts()
212 ADF_CSR_WR(csr, ADF_ERRMSK3, ADF_200XX_ERRMSK3_UERR); in adf_disable_error_interrupts()
214 ADF_CSR_WR(csr, ADF_ERRMSK5, ADF_200XX_ERRMSK5_UERR); in adf_disable_error_interrupts()
[all …]
/freebsd/sys/dev/qat/qat_common/
H A Dadf_gen4_hw_data.c166 ADF_CSR_WR(csr, in reset_ring_pair()
182 ADF_CSR_WR(csr, in reset_ring_pair()
243 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTL_OFFSET, ssm_wdt_low); in adf_gen4_set_ssm_wdtimer()
244 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTH_OFFSET, ssm_wdt_high); in adf_gen4_set_ssm_wdtimer()
246 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEL_OFFSET, ssm_wdt_pke_low); in adf_gen4_set_ssm_wdtimer()
247 ADF_CSR_WR(pmisc_addr, ADF_SSMWDTPKEH_OFFSET, ssm_wdt_pke_high); in adf_gen4_set_ssm_wdtimer()
H A Dadf_gen4_pfvf.c59 ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val | ADF_PFVF_INT); in adf_gen4_pfvf_send()
108 ADF_CSR_WR(pmisc_addr, pfvf_offset, csr_val & ~ADF_PFVF_INT); in adf_gen4_pfvf_recv()
H A Dadf_hw_arbiter.c29 ADF_CSR_WR(csr_addr, \
34 ADF_CSR_WR(csr_addr, (csr_offset) + (ADF_ARB_REG_SIZE * (index)), value)
43 ADF_CSR_WR(csr_addr, \
H A Dadf_freebsd_admin.c158 ADF_CSR_WR(mailbox, mb_offset, 1); in adf_put_admin_msg_sync()
571 ADF_CSR_WR(csr, adminmsg_u, reg_val >> 32); in adf_init_admin_comms()
572 ADF_CSR_WR(csr, adminmsg_l, reg_val); in adf_init_admin_comms()
H A Dadf_init.c245 ADF_CSR_WR(csr, ADF_SSMWDT(i), timer_val); in adf_set_ssm_wdtimer()
247 ADF_CSR_WR(csr, ADF_SSMWDTPKE(i), timer_val_pke); in adf_set_ssm_wdtimer()
H A Dadf_dev_err.c264 ADF_CSR_WR(csr, slice_hang_offset, slice_hang); in adf_handle_slice_hang()
H A Dqat_hal.c607 ADF_CSR_WR(handle->hal_misc_addr_v, csr_addr, csr_val); in qat_hal_init_esram()
/freebsd/sys/dev/qat/qat_hw/qat_dh895xcc/
H A Dadf_dh895xcc_hw_data.c209 ADF_CSR_WR(csr, ADF_DH895XCC_AE_CTX_ENABLES(i), val); in adf_enable_error_correction()
212 ADF_CSR_WR(csr, ADF_DH895XCC_AE_MISC_CONTROL(i), val); in adf_enable_error_correction()
222 ADF_CSR_WR(csr, ADF_DH895XCC_UERRSSMSH(i), val); in adf_enable_error_correction()
225 ADF_CSR_WR(csr, ADF_DH895XCC_CERRSSMSH(i), val); in adf_enable_error_correction()
237 ADF_CSR_WR(addr, in adf_enable_ints()
242 ADF_CSR_WR(addr, in adf_enable_ints()
/freebsd/sys/dev/qat/qat_hw/qat_c3xxx/
H A Dadf_c3xxx_hw_data.c192 ADF_CSR_WR(csr, ADF_C3XXX_AE_CTX_ENABLES(i), val); in adf_enable_error_correction()
195 ADF_CSR_WR(csr, ADF_C3XXX_AE_MISC_CONTROL(i), val); in adf_enable_error_correction()
205 ADF_CSR_WR(csr, ADF_C3XXX_UERRSSMSH(i), val); in adf_enable_error_correction()
208 ADF_CSR_WR(csr, ADF_C3XXX_CERRSSMSH(i), val); in adf_enable_error_correction()
220 ADF_CSR_WR(addr, ADF_C3XXX_SMIAPF0_MASK_OFFSET, ADF_C3XXX_SMIA0_MASK); in adf_enable_ints()
221 ADF_CSR_WR(addr, ADF_C3XXX_SMIAPF1_MASK_OFFSET, ADF_C3XXX_SMIA1_MASK); in adf_enable_ints()
/freebsd/sys/dev/qat/qat_hw/qat_c62x/
H A Dadf_c62x_hw_data.c196 ADF_CSR_WR(csr, ADF_C62X_AE_CTX_ENABLES(i), val); in adf_enable_error_correction()
199 ADF_CSR_WR(csr, ADF_C62X_AE_MISC_CONTROL(i), val); in adf_enable_error_correction()
209 ADF_CSR_WR(csr, ADF_C62X_UERRSSMSH(i), val); in adf_enable_error_correction()
212 ADF_CSR_WR(csr, ADF_C62X_CERRSSMSH(i), val); in adf_enable_error_correction()
224 ADF_CSR_WR(addr, ADF_C62X_SMIAPF0_MASK_OFFSET, ADF_C62X_SMIA0_MASK); in adf_enable_ints()
225 ADF_CSR_WR(addr, ADF_C62X_SMIAPF1_MASK_OFFSET, ADF_C62X_SMIA1_MASK); in adf_enable_ints()
/freebsd/sys/dev/qat/qat_hw/qat_4xxx/
H A Dadf_4xxx_hw_data.c207 ADF_CSR_WR(csr, ADF_4XXX_MSIX_RTTABLE_OFFSET(i), i); in set_msix_default_rttable()
880 ADF_CSR_WR(csr, ADF_4XXX_ERRMSK3, ADF_4XXX_VFLNOTIFY); in adf_enable_error_correction()
891 ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_RP_X0_MASK_OFFSET, 0); in adf_enable_ints()
892 ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_RP_X1_MASK_OFFSET, 0); in adf_enable_ints()
895 ADF_CSR_WR(addr, ADF_4XXX_SMIAPF_MASK_OFFSET, 0); in adf_enable_ints()
911 ADF_CSR_WR(addr, ADF_4XXX_ERRMSK2, csr); in adf_init_device()
914 ADF_CSR_WR(addr, ADF_4XXX_PM_INTERRUPT, ADF_4XXX_PM_DRV_ACTIVE); in adf_init_device()
/freebsd/sys/dev/qat/qat_hw/qat_4xxxvf/
H A Dadf_4xxxvf_hw_data.c194 ADF_CSR_WR(pmisc_bar_addr, ADF_4XXXIOV_VINTMSKPF2VM_OFFSET, 0x0); in enable_pf2vm_interrupt()
208 ADF_CSR_WR(pmisc_bar_addr, ADF_4XXXIOV_VINTMSKPF2VM_OFFSET, BIT(0)); in disable_pf2vm_interrupt()