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/linux/Documentation/devicetree/bindings/timer/
H A Dxlnx,xps-timer.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/timer/xlnx,xps-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx LogiCORE IP AXI Timer
10 - Sean Anderson <sean.anderson@seco.com>
15 const: xlnx,xps-timer-1.00.a
18 maxItems: 1
20 clock-names:
24 maxItems: 1
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/linux/Documentation/devicetree/bindings/watchdog/
H A Dxlnx,xps-timebase-wdt.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/watchdog/xlnx,xps-timebase-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx AXI/PLB softcore and window Watchdog Timer
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
11 - Srinivas Neeli <srinivas.neeli@amd.com>
14 The Timebase watchdog timer(WDT) is a free-running 32 bit counter.
15 WDT uses a dual-expiration architecture. After one expiration of
22 - $ref: watchdog.yaml#
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/linux/arch/microblaze/boot/dts/
H A Dsystem.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2007-2008 Xilinx, Inc.
6 * (C) Copyright 2007-2009 Michal Simek
13 * XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
16 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 stdout-path = "/plb@0/serial@84000000";
35 #address-cells = <1>;
37 #size-cells = <0>;
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/linux/net/sunrpc/
H A Dxprt.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * - When a process places a call, it allocates a request slot if
13 * - Next, the caller puts together the RPC message, stuffs it into
15 * - xprt_transmit sends the message and installs the caller on the
17 * it installs a timer that is run after the packet's timeout has
19 * - When a packet arrives, the data_ready handler walks the list of
21 * caller is woken up, and the timer removed.
22 * - When no reply arrives within the timeout interval, the timer is
25 * of -ETIMEDOUT.
26 * - When the caller receives a notification from RPC that a reply arrived,
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/linux/drivers/watchdog/
H A Dof_xilinx_wdt.c1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2013 - 2014 Xilinx, Inc.
28 #define XWT_CSR0_WDS_MASK BIT(2) /* Timer state */
29 #define XWT_CSR0_EWDT1_MASK BIT(1) /* Enable bit 1 */
31 /* Control/Status Register 0/1 bits */
54 ret = clk_enable(xdev->clk); in xilinx_wdt_start()
56 dev_err(wdd->parent, "Failed to enable clock\n"); in xilinx_wdt_start()
60 spin_lock(&xdev->spinlock); in xilinx_wdt_start()
62 /* Clean previous status and enable the watchdog timer */ in xilinx_wdt_start()
63 control_status_reg = ioread32(xdev->base + XWT_TWCSR0_OFFSET); in xilinx_wdt_start()
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/linux/arch/sh/boot/dts/
H A Dj2_mimas_v2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 compatible = "jcore,j2-soc";
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&aic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
21 clock-frequency = <50000000>;
22 d-cache-size = <8192>;
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/linux/arch/microblaze/kernel/
H A Dtimer.c2 * Copyright (C) 2007-2013 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2012-2013 Xilinx, Inc.
4 * Copyright (C) 2007-2009 PetaLogix
36 #define TCSR_MDT (1<<0)
37 #define TCSR_UDT (1<<1)
38 #define TCSR_GENT (1<<2)
39 #define TCSR_CAPT (1<<3)
40 #define TCSR_ARHT (1<<4)
41 #define TCSR_LOAD (1<<5)
42 #define TCSR_ENIT (1<<6)
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/linux/include/linux/sunrpc/
H A Dxprt.h1 /* SPDX-License-Identifier: GPL-2.0 */
28 #define RPC_CWNDSCALE (1U << RPC_CWNDSHIFT)
30 #define RPC_MAXCWND(xprt) ((xprt)->max_reqs << RPC_CWNDSHIFT)
31 #define RPCXPRT_CONGESTED(xprt) ((xprt)->cong >= (xprt)->cwnd)
56 * This is the user-visible part
68 int rq_cong; /* has incremented xprt->cong */
97 ktime_t rq_rtt; /* round-trip time */
157 void (*timer)(struct rpc_xprt *xprt, struct rpc_task *task); member
186 #define XPRT_TRANSPORT_BC (1 << 31)
223 unsigned char resvport : 1, /* use a reserved port */
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H A Dclnt.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Declarations for the high-level RPC client interface
25 #include <linux/sunrpc/timer.h>
42 * The high-level client handle
58 struct rpc_stat * cl_stats; /* per-program statistics */
59 struct rpc_iostats * cl_metrics; /* per-client statistics */
61 unsigned int cl_softrtry : 1,/* soft timeouts */
62 cl_softerr : 1,/* Timeout
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/linux/drivers/input/serio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
113 This driver provides support for the PS/2 ports on PA-RISC machines
130 The SDC itself contains a 10ms resolution timer/clock capable
131 of delivering interrupts on a periodic and one-shot basis.
132 The SDC may also be connected to a battery-backed real-time
133 clock, a basic audio waveform generator, and an HP-HIL Master
196 allocating minor 1 (that historically corresponds to /dev/psaux)
199 echo -n "serio_raw" > /sys/bus/serio/devices/serioX/drvctl
205 tristate "Xilinx XPS PS/2 Controller Support"
208 This driver supports XPS PS/2 IP from the Xilinx EDK on
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/linux/drivers/pwm/
H A Dpwm-xilinx.c1 // SPDX-License-Identifier: GPL-2.0+
6 * - When changing both duty cycle and period, we may end up with one cycle
13 * - Cannot produce 100% duty cycle by configuring the TLRs. This might be
16 * - Only produces "normal" output.
17 * - Always produces low output if disabled.
20 #include <clocksource/timer-xilinx.h>
22 #include <linux/clk-provider.h>
37 WARN_ON(cycles < 2 || cycles - 2 > priv->max); in xilinx_timer_tlr_cycles()
40 return cycles - 2; in xilinx_timer_tlr_cycles()
41 return priv->max - cycles + 2; in xilinx_timer_tlr_cycles()
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/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_clock_utils.c1 // SPDX-License-Identifier: MIT
20 GEN9_TIMESTAMP_OVERRIDE_US_COUNTER_DIVIDER_SHIFT) + 1; in read_reference_ts_freq()
26 frac_freq = 1000000 / (frac_freq + 1); in read_reference_ts_freq()
83 freq >>= 3 - ((c0 & GEN10_RPM_CONFIG0_CTC_SHIFT_PARAMETER_MASK) >> in gen11_read_clock_frequency()
98 freq = IS_GEN9_LP(uncore->i915) ? 19200000 : 24000000; in gen9_read_clock_frequency()
105 freq >>= 3 - ((ctc_reg & CTC_SHIFT_PARAMETER_MASK) >> in gen9_read_clock_frequency()
136 * 63:20 increments every 1/4 ns in g4x_read_clock_frequency()
139 * -> 63:32 increments every 1024 ns in g4x_read_clock_frequency()
155 return DIV_ROUND_CLOSEST(i9xx_fsb_freq(uncore->i915), 4) * 1000; in gen4_read_clock_frequency()
160 if (GRAPHICS_VER(uncore->i915) >= 11) in read_clock_frequency()
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/linux/arch/x86/kernel/
H A Dapm_32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* -*- linux-c -*-
4 * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
16 * (Thanks to Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de>)
43 * 1.1: support user-space standby and suspend, power off after system
46 * is only incorrect by 30-60mS (vs. 1S previously) (Gabor J. Toth
48 * screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4
63 * <echter@informatik.uni-rostock.de>
68 * Reset interrupt 0 timer to 100Hz after suspend
109 * <Walter.Hofmann@physik.stud.uni-erlangen.de>).
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/linux/include/linux/
H A Dnetdevice.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 * Corey Minyard <wf-rch!minyard@relay.EU.net>
24 #include <linux/timer.h>
54 #include <net/dropreason-core.h>
97 #define NET_RX_DROP 1 /* packet dropped */
105 * - qdisc return codes
106 * - driver transmit return codes
107 * - errno values
111 * the driver transmit return codes though - when qdiscs are used, the actual
118 /* qdisc ->enqueue() return codes. */
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/linux/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_pci.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
15 * fm10k_pci_tbl - PCI Device ID Table
35 struct fm10k_intfc *interface = hw->back; in fm10k_read_pci_cfg_word()
38 if (FM10K_REMOVED(hw->hw_addr)) in fm10k_read_pci_cfg_word()
41 pci_read_config_word(interface->pdev, reg, &value); in fm10k_read_pci_cfg_word()
50 u32 __iomem *hw_addr = READ_ONCE(hw->hw_addr); in fm10k_read_reg()
58 struct fm10k_intfc *interface = hw->back; in fm10k_read_reg()
59 struct net_device *netdev = interface->netdev; in fm10k_read_reg()
61 hw->hw_addr = NULL; in fm10k_read_reg()
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/linux/net/ipv4/
H A Dtcp_output.c1 // SPDX-License-Identifier: GPL-2.0-only
12 * Corey Minyard <wf-rch!minyard@relay.EU.net>
13 * Florian La Roche, <flla@stud.uni-sb.de>
33 * Cacophonix Gaul : draft-minshall-nagle-01
59 tp->tcp_clock_cache = val; in tcp_mstamp_refresh()
60 tp->tcp_mstamp = div_u64(val, NSEC_PER_USEC); in tcp_mstamp_refresh()
71 unsigned int prior_packets = tp->packets_out; in tcp_event_new_data_sent()
73 WRITE_ONCE(tp->snd_nxt, TCP_SKB_CB(skb)->end_seq); in tcp_event_new_data_sent()
75 __skb_unlink(skb, &sk->sk_write_queue); in tcp_event_new_data_sent()
76 tcp_rbtree_insert(&sk->tcp_rtx_queue, skb); in tcp_event_new_data_sent()
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/linux/net/core/
H A Ddev.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Florian la Roche <rzsfl@rz.uni-sb.de>
19 * D.J. Barrow : Fixed bug where dev->refcnt gets set
54 * 1 device.
64 * Pekka Riikonen : Netdev boot-time settings code
66 * indefinitely on dev->refcnt
67 * J Hadi Salim : - Backlog queue sampling
68 * - netif_rx() feedback
167 #include "net-sysfs.h"
187 unsigned int val = net->dev_base_seq + 1; in dev_base_seq_inc()
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/linux/drivers/net/ethernet/marvell/
H A Dmvneta.c7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
74 #define MVNETA_PHY_POLLING_ENABLE BIT(1)
84 #define MVNETA_DEF_RXQ(q) ((q) << 1)
103 #define MVNETA_RX_BRST_SZ_MASK(burst) ((burst) << 1)
156 #define MVNETA_TX_INTR_MASK(nr_txqs) (((1 << nr_txqs) - 1) << 0)
158 #define MVNETA_RX_INTR_MASK(nr_rxqs) (((1 << nr_rxqs) - 1) << 8)
170 #define MVNETA_CAUSE_LINK_CHANGE BIT(1)
184 #define MVNETA_CAUSE_BMU_ALLOC_ERR_MASK(pool) (1 << (MVNETA_CAUSE_BMU_ALLOC_ERR_SHIFT + (pool)…
188 #define MVNETA_CAUSE_TXQ_ERROR_MASK(q) (1 << (MVNETA_CAUSE_TXQ_ERROR_SHIFT + (q)))
202 #define MVNETA_GMAC0_PORT_1000BASE_X BIT(1)
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/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
31 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
57 /* i40e_pci_tbl - PCI Device ID Table
97 static int debug = -1;
116 if (is_unicast_ether_addr(f->macaddr) || is_link_local_ether_addr(f->macaddr)) in netdev_hw_addr_refcnt()
117 ha_list = &netdev->uc; in netdev_hw_addr_refcnt()
119 ha_list = &netdev->mc; in netdev_hw_addr_refcnt()
122 if (ether_addr_equal(ha->addr, f->macaddr)) { in netdev_hw_addr_refcnt()
123 ha->refcount += delta; in netdev_hw_addr_refcnt()
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/linux/drivers/nvme/host/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2011-2014, Intel Corporation.
10 #include <linux/blk-mq.h>
11 #include <linux/blk-integrity.h>
24 #include <linux/t10-pi.h>
26 #include <linux/io-64-nonatomic-lo-hi.h>
27 #include <linux/io-64-nonatomic-hi-lo.h>
28 #include <linux/sed-opal.h>
29 #include <linux/pci-p2pdma.h>
34 #define SQ_SIZE(q) ((q)->q_depth << (q)->sqes)
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/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt.c1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2019 Broadcom Limited
15 #include <linux/timer.h>
25 #include <linux/dma-mapping.h>
91 [BCM57301] = { "Broadcom BCM57301 NetXtreme-C 10Gb Ethernet" },
92 [BCM57302] = { "Broadcom BCM57302 NetXtreme-C 10Gb/25Gb Ethernet" },
93 [BCM57304] = { "Broadcom BCM57304 NetXtreme-C 10Gb/25Gb/40Gb/50Gb Ethernet" },
94 [BCM57417_NPAR] = { "Broadcom BCM57417 NetXtreme-E Ethernet Partition" },
95 [BCM58700] = { "Broadcom BCM58700 Nitro 1Gb/2.5Gb/10Gb Ethernet" },
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
64 "Copyright (c) 1999-2016 Intel Corporation.";
80 /* ixgbe_pci_tbl - PCI Device ID Table
160 …"Maximum number of virtual functions to allocate per physical function - default is zero and maxim…
166 "Allow unsupported and untested SFP+ modules on 82599-based adapters");
169 static int debug = -1;
190 return dev && (dev->netdev_ops == &ixgbe_netdev_ops); in netif_is_ixgbe()
199 parent_bus = adapter->pdev->bus->parent; in ixgbe_read_pci_cfg_word_parent()
201 return -1; in ixgbe_read_pci_cfg_word_parent()
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