| /linux/drivers/net/pcs/ |
| H A D | pcs-xpcs.c | 4 * Synopsys DesignWare XPCS helpers 11 #include <linux/pcs/pcs-xpcs.h> 17 #include "pcs-xpcs.h" 158 int (*pma_config)(struct dw_xpcs *xpcs); 168 xpcs_find_compat(struct dw_xpcs *xpcs, phy_interface_t interface) in xpcs_find_compat() argument 172 for (compat = xpcs->desc->compat; compat->supported; compat++) in xpcs_find_compat() 179 struct phylink_pcs *xpcs_to_phylink_pcs(struct dw_xpcs *xpcs) in xpcs_to_phylink_pcs() argument 181 return &xpcs->pcs; in xpcs_to_phylink_pcs() 185 int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface) in xpcs_get_an_mode() argument 189 compat = xpcs_find_compat(xpcs, interface); in xpcs_get_an_mode() [all …]
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| H A D | pcs-xpcs.h | 4 * Synopsys DesignWare XPCS helpers 10 #include <linux/pcs/pcs-xpcs.h> 119 int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg); 120 int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val); 121 int xpcs_modify(struct dw_xpcs *xpcs, int dev, u32 reg, u16 mask, u16 set); 122 int xpcs_read_vpcs(struct dw_xpcs *xpcs, int reg); 123 int xpcs_write_vpcs(struct dw_xpcs *xpcs, int reg, u16 val); 124 int nxp_sja1105_sgmii_pma_config(struct dw_xpcs *xpcs); 125 int nxp_sja1110_sgmii_pma_config(struct dw_xpcs *xpcs); 126 int nxp_sja1110_2500basex_pma_config(struct dw_xpcs *xpcs); [all …]
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| H A D | Makefile | 4 pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-plat.o \ 5 pcs-xpcs-nxp.o pcs-xpcs-wx.o
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| /linux/drivers/net/ethernet/stmicro/stmmac/ |
| H A D | dwmac-tegra.c | 27 void __iomem *xpcs; member 91 value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_STATUS); in tegra_mgbe_resume() 93 value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_HW_INIT_CTRL); in tegra_mgbe_resume() 95 writel(value, mgbe->xpcs + XPCS_WRAP_UPHY_HW_INIT_CTRL); in tegra_mgbe_resume() 98 err = readl_poll_timeout(mgbe->xpcs + XPCS_WRAP_UPHY_HW_INIT_CTRL, value, in tegra_mgbe_resume() 120 value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL); in mgbe_uphy_lane_bringup_serdes_up() 122 writel(value, mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL); in mgbe_uphy_lane_bringup_serdes_up() 124 value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL); in mgbe_uphy_lane_bringup_serdes_up() 126 writel(value, mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL); in mgbe_uphy_lane_bringup_serdes_up() 128 value = readl(mgbe->xpcs + XPCS_WRAP_UPHY_RX_CONTROL); in mgbe_uphy_lane_bringup_serdes_up() [all …]
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| H A D | stmmac_main.c | 1329 if (priv->hw->xpcs && in stmmac_init_phy() 1330 xpcs_get_an_mode(priv->hw->xpcs, mode) == DW_AN_C73) in stmmac_init_phy() 1430 /* If we have an xpcs, it defines which PHY interfaces are supported. */ in stmmac_phylink_setup() 1431 if (priv->hw->xpcs) in stmmac_phylink_setup() 1432 pcs = xpcs_to_phylink_pcs(priv->hw->xpcs); in stmmac_phylink_setup()
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| /linux/Documentation/devicetree/bindings/net/pcs/ |
| H A D | snps,dw-xpcs.yaml | 4 $id: http://devicetree.org/schemas/net/pcs/snps,dw-xpcs.yaml# 22 by means of the APB3/MCI interfaces. In the later case the XPCS can be mapped 28 - description: Synopsys DesignWare XPCS with none or unknown PMA 29 const: snps,dw-xpcs 30 - description: Synopsys DesignWare XPCS with Consumer Gen1 3G PMA 31 const: snps,dw-xpcs-gen1-3g 32 - description: Synopsys DesignWare XPCS with Consumer Gen2 3G PMA 33 const: snps,dw-xpcs-gen2-3g 34 - description: Synopsys DesignWare XPCS with Consumer Gen2 6G PMA 35 const: snps,dw-xpcs-gen2-6g [all …]
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | nvidia,tegra234-mgbe.yaml | 24 - const: xpcs 121 reg-names = "hypervisor", "mac", "xpcs";
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| /linux/drivers/net/ethernet/amd/xgbe/ |
| H A D | xgbe.h | 1009 /* XGMAC/XPCS related mmio registers */ 1011 void __iomem *xpcs_regs; /* XPCS MMD registers */ 1025 /* XPCS indirect addressing lock */
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| H A D | xgbe-common.h | 1516 * within the register values of XPCS registers.
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| /linux/drivers/net/dsa/sja1105/ |
| H A D | sja1105_mdio.c | 4 #include <linux/pcs/pcs-xpcs.h>
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| H A D | sja1105_main.c | 1380 * sense, because that is done through the XPCS. We allow in sja1105_phylink_get_caps()
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| /linux/drivers/net/ethernet/marvell/mvpp2/ |
| H A D | mvpp2_main.c | 1583 void __iomem *xpcs = priv->iface_base + MVPP22_XPCS_BASE(port->gop_id); in mvpp22_gop_init_10gkr() local 1586 val = readl(xpcs + MVPP22_XPCS_CFG0); in mvpp22_gop_init_10gkr() 1590 writel(val, xpcs + MVPP22_XPCS_CFG0); in mvpp22_gop_init_10gkr() 2183 void __iomem *mpcs, *xpcs; in mvpp22_pcs_reset_assert() local 2190 xpcs = priv->iface_base + MVPP22_XPCS_BASE(port->gop_id); in mvpp22_pcs_reset_assert() 2197 val = readl(xpcs + MVPP22_XPCS_CFG0); in mvpp22_pcs_reset_assert() 2198 writel(val & ~MVPP22_XPCS_CFG0_RESET_DIS, xpcs + MVPP22_XPCS_CFG0); in mvpp22_pcs_reset_assert() 2205 void __iomem *mpcs, *xpcs; in mvpp22_pcs_reset_deassert() local 2212 xpcs = priv->iface_base + MVPP22_XPCS_BASE(port->gop_id); in mvpp22_pcs_reset_deassert() 2225 val = readl(xpcs + MVPP22_XPCS_CFG0); in mvpp22_pcs_reset_deassert() [all …]
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| H A D | mvpp2.h | 603 /* XPCS registers.PPv2.2 and PPv2.3 */ 623 /* XPCS registers. PPv2.2 and PPv2.3 */
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| /linux/drivers/net/ethernet/sun/ |
| H A D | niu.c | 8309 /* 10G fiber, XPCS */ in niu_phy_type_prop_decode() 8319 /* 10G copper, XPCS */ in niu_phy_type_prop_decode() 8476 /* 10G copper, XPCS */ in niu_pci_probe_sprom() 8483 /* 10G fiber, XPCS */ in niu_pci_probe_sprom() 9754 (np->mac_xcvr == MAC_XCVR_PCS ? "PCS" : "XPCS")), in niu_device_announce() 9765 (np->mac_xcvr == MAC_XCVR_PCS ? "PCS" : "XPCS")), in niu_device_announce()
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| H A D | niu.h | 591 /* XPCS registers, offset from np->regs + np->xpcs_off */
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| /linux/ |
| H A D | CREDITS | 29 D: Synopsys DesignWare XPCS MDIO/PCS driver.
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| H A D | MAINTAINERS | 19338 F: drivers/net/pcs/pcs-xpcs-nxp.c 25894 SYNOPSYS DESIGNWARE ETHERNET XPCS DRIVER 25897 F: drivers/net/pcs/pcs-xpcs.c 25898 F: drivers/net/pcs/pcs-xpcs.h 25899 F: include/linux/pcs/pcs-xpcs.h 28658 F: drivers/net/pcs/pcs-xpcs-wx.c
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