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Searched +full:xgene +full:- +full:pcie (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/pci/
H A Dapm,xgene-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/apm,xgene-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AppliedMicro X-Gene PCIe interface
10 - Toan Le <toan@os.amperecomputing.com>
13 - $ref: /schemas/pci/pci-host-bridge.yaml#
18 - items:
19 - const: apm,xgene-storm-pcie
20 - const: apm,xgene-pcie
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/linux/arch/arm64/boot/dts/apm/
H A Dapm-storm.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * dts file for AppliedMicro (APM) X-Gene Storm SOC
9 compatible = "apm,xgene-storm";
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
15 #address-cells = <2>;
16 #size-cells = <0>;
22 enable-method = "spin-table";
23 cpu-release-addr = <0x1 0x0000fff8>;
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/linux/Documentation/devicetree/bindings/mfd/
H A Dsyscon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 represent as any specific type of device. The typical use-case is
13 for some other node's driver, or platform-specific code, to acquire
20 - Lee Jones <lee@kernel.org>
30 - airoha,en7581-pbus-csr
31 - al,alpine-sysfabric-service
32 - allwinner,sun8i-a83t-system-controller
33 - allwinner,sun8i-h3-system-controller
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/linux/drivers/pci/controller/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_PCIE_CADENCE) += cadence/
3 obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o
4 obj-$(CONFIG_PCI_IXP4XX) += pci-ixp4xx.o
5 obj-$(CONFIG_PCI_HYPERV) += pci-hyperv.o
6 obj-$(CONFIG_PCI_HYPERV_INTERFACE) += pci-hyperv-intf.o
7 obj-$(CONFIG_PCI_MVEBU) += pci-mvebu.o
8 obj-$(CONFIG_PCI_AARDVARK) += pci-aardvark.o
9 obj-$(CONFIG_PCI_TEGRA) += pci-tegra.o
10 obj-$(CONFIG_PCI_RCAR_GEN2) += pci-rcar-gen2.o
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H A Dpci-xgene.c1 // SPDX-License-Identifier: GPL-2.0+
3 * APM X-Gene PCIe Driver
20 #include <linux/pci-acpi.h>
21 #include <linux/pci-ecam.h>
56 /* PCIe IP version */
73 return readl(port->csr_base + reg); in xgene_pcie_readl()
78 writel(val, port->csr_base + reg); in xgene_pcie_writel()
91 return (struct xgene_pcie *)(bus->sysdata); in pcie_bus_to_port()
93 cfg = bus->sysdata; in pcie_bus_to_port()
94 return (struct xgene_pcie *)(cfg->priv); in pcie_bus_to_port()
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H A Dpci-xgene-msi.c1 // SPDX-License-Identifier: GPL-2.0+
3 * APM X-Gene MSI Driver
16 #include <linux/irqchip/irq-msi-lib.h>
49 * X-Gene v1 has 16 frames of MSI termination registers MSInIRx, where n is
94 return readl_relaxed(msi->msi_regs + MSI_IR0 + in xgene_msi_ir_read()
102 return readl_relaxed(msi->msi_regs + MSI_INT0 + in xgene_msi_int_read()
110 * that XGene-1 has 8 CPUs, each CPU gets two frames assigned to it
118 * - hwirq[7]::cpu[2:0] is the target frame number (n in MSInIRx)
119 * - hwirq[6:4] is the register index in any given frame (x in MSInIRx)
120 * - hwirq[3:0] is the MSI data
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/linux/Documentation/devicetree/bindings/phy/
H A Dapm,xgene-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/apm,xgene-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: APM X-Gene 15Gbps Multi-purpose PHY
10 - Khuong Dinh <khuong@os.amperecomputing.com>
13 PHY nodes are defined to describe on-chip 15Gbps Multi-purpose PHY. Each
19 - const: apm,xgene-phy
24 '#phy-cells':
26 Possible values are 0 (SATA), 1 (SGMII), 2 (PCIe), 3 (USB), and 4 (XFI).
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/linux/drivers/phy/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_GENERIC_PHY) += phy-core.o
7 obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o
8 obj-$(CONFIG_PHY_CAN_TRANSCEIVER) += phy-can-transceiver.o
9 obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
10 obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
11 obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
12 obj-$(CONFIG_PHY_SNPS_EUSB2) += phy-snps-eusb2.o
13 obj-$(CONFIG_USB_LGM_PHY) += phy-lgm-usb.o
14 obj-$(CONFIG_PHY_AIROHA_PCIE) += phy-airoha-pcie.o
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H A Dphy-xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene Multi-purpose PHY driver
10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.
19 * -----------------
20 * | Internal | |------|
21 * | Ref PLL CMU |----| | ------------- ---------
22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes|
23 * | | | | ---------
24 * External Clock ------| | -------------
25 * |------|
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/linux/drivers/acpi/
H A Dpci_mcfg.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/pci-acpi.h>
14 #include <linux/pci-ecam.h>
37 ((end) - (start) + 1), \
110 THUNDER_PEM_QUIRK(2, 0), /* off-chip devices */
111 THUNDER_PEM_QUIRK(2, 1), /* off-chip devices */
129 {"APM ", "XGENE ", rev, seg, MCFG_BUS_ANY, \
133 {"APM ", "XGENE ", rev, seg, MCFG_BUS_ANY, \
136 /* X-Gene SoC with v1 PCIe controller */
147 /* X-Gene SoC with v2.1 PCIe controller */
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/linux/drivers/gpio/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB_LEGACY) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
13 gpiolib-acpi-y := gpiolib-acpi-core.o gpiolib-acpi-quirks.o
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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