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/linux/drivers/watchdog/
H A Dwd501p.h1 /* SPDX-License-Identifier: GPL-1.0+ */
25 #define WDT_BUZZER (io+6) /* PCI only: rd=disable, wr=enable */
30 #define WDT_CLOCK (io+12) /* COUNT2: rd=16.67MHz, wr=2.0833MHz */
32 #define WDT_OPTONOTRST (io+13) /* wr=enable, rd=disable */
34 #define WDT_OPTORST (io+14) /* wr=enable, rd=disable */
36 #define WDT_PROGOUT (io+15) /* wr=enable, rd=disable */
39 #define WDC_SR_WCCR 1 /* Active low */ /* X X X */
40 #define WDC_SR_TGOOD 2 /* X X - */
43 #define WDC_SR_FANGOOD 16 /* X - - */
44 #define WDC_SR_PSUOVER 32 /* Active low */ /* X X - */
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/linux/drivers/net/ethernet/8390/
H A D8390.h1 /* SPDX-License-Identifier: GPL-1.0+ */
6 * under the same license. Auto-loading of 8390.o only in v2.2 - Paul G.
21 /* The 8390 specific per-packet-header format. */
34 /* Without I/O delay - non ISA or later chips */
70 /* You have one of these per-board */
85 unsigned word16:1; /* We have the 16-bit (vs 8-bit)
88 unsigned bigendian:1; /* 16-bit big endian mode. Do NOT
91 unsigned txing:1; /* Transmit Active */
93 unsigned dmaing:1; /* Remote DMA Active */
98 short tx1, tx2; /* Packet lengths for ping-pong tx. */
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmvebu-devbus.txt9 - compatible: Armada 370/XP SoC are supported using the
10 "marvell,mvebu-devbus" compatible string.
13 "marvell,orion-devbus" compatible string.
15 - reg: A resource specifier for the register space.
20 - #address-cells: Must be set to 1
21 - #size-cells: Must be set to 1
22 - ranges: Must be set up to reflect the memory layout with four
23 integer values for each chip-select line in use:
28 - devbus,keep-config This property can optionally be used to keep
37 - devbus,turn-off-ps: Defines the time during which the controller does not
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H A Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
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/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-nano.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/
5 /dts-v1/;
15 cpu0-supply = <&dcdc2_reg>;
25 compatible = "gpio-leds";
30 default-state = "off";
36 pinctrl-names = "default";
37 pinctrl-0 = <&misc_pins>;
39 misc_pins: misc-pins {
40 pinctrl-single,pins = <
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H A Ddra7-evm.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-evm-common.dtsi"
9 #include "dra74x-mmc-iodelay.dtsi"
13 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
20 evm_12v0: fixedregulator-evm_12v0 {
22 compatible = "regulator-fixed";
23 regulator-name = "evm_12v0";
24 regulator-min-microvolt = <12000000>;
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H A Dam335x-baltos.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
12 #include <dt-bindings/pwm/pwm.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
20 cpu0-supply = <&vdd1_reg>;
30 compatible = "regulator-fixed";
31 regulator-name = "vbat";
32 regulator-min-microvolt = <5000000>;
33 regulator-max-microvolt = <5000000>;
34 regulator-boot-on;
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H A Ddra72-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/
5 /dts-v1/;
8 #include "dra7-ipu-dsp-common.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/clock/ti-dra7-atl.h>
13 compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
20 stdout-path = &uart1;
23 evm_12v0: fixedregulator-evm12v0 {
25 compatible = "regulator-fixed";
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H A Dlogicpd-torpedo-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 compatible = "gpio-keys";
6 pinctrl-names = "default";
7 pinctrl-0 = <&gpio_key_pins &gpio_key_pins_wkup>;
13 wakeup-source;
20 wakeup-source;
27 wakeup-source;
34 wakeup-source;
39 compatible = "ti,omap-twl4030";
45 compatible = "gpio-leds";
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H A Domap3-n950-n9.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap3-n950-n9.dtsi - Device Tree file for Nokia N950 & N9 (common stuff)
13 cpu0-supply = <&vcc>;
23 compatible = "regulator-fixed";
24 regulator-name = "VEMMC";
25 regulator-min-microvolt = <2900000>;
26 regulator-max-microvolt = <2900000>;
28 startup-delay-us = <150>;
29 enable-active-high;
33 compatible = "regulator-fixed";
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H A Domap3-pandora-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/input/input.h>
14 cpu0-supply = <&vcc>;
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <26000000>;
35 compatible = "connector-analog-tv";
40 remote-endpoint = <&venc_out>;
45 gpio-leds {
47 compatible = "gpio-leds";
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/linux/drivers/scsi/csiostor/
H A Dcsio_scsi.c4 * Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
76 * csio_scsi_match_io - Match an ioreq with the given SCSI level data.
88 switch (sld->level) { in csio_scsi_match_io()
93 return ((ioreq->lnode == sld->lnode) && in csio_scsi_match_io()
94 (ioreq->rnode == sld->rnode) && in csio_scsi_match_io()
95 ((uint64_t)scmnd->device->lun == sld->oslun)); in csio_scsi_match_io()
98 return ((ioreq->lnode == sld->lnode) && in csio_scsi_match_io()
99 (ioreq->rnode == sld->rnode)); in csio_scsi_match_io()
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H A Dcsio_lnode.c4 * Copyright (c) 2008-2012 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
102 #define csio_ct_rsp(cp) (((struct fc_ct_hdr *)cp)->ct_cmd)
103 #define csio_ct_reason(cp) (((struct fc_ct_hdr *)cp)->ct_reason)
104 #define csio_ct_expl(cp) (((struct fc_ct_hdr *)cp)->ct_explan)
108 * csio_ln_match_by_portid - lookup lnode using given portid.
110 * @portid: port-id.
121 list_for_each(tmp, &hw->sln_head) { in csio_ln_lookup_by_portid()
123 if (ln->portid == portid) in csio_ln_lookup_by_portid()
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/linux/arch/sparc/kernel/
H A Dwof.S1 /* SPDX-License-Identifier: GPL-2.0 */
49 /* On a 7-window Sparc the boot code patches spnwin_*
66 /* Datum current_thread_info->uwinmask contains at all times a bitmask
67 * where if any user windows are active, at least one bit will
68 * be set in to mask. If no user windows are active, the bitmask
82 * newwim = ((%wim>>1) | (%wim<<(nwindows - 1)));
99 /* See if any user windows are active in the set. */
111 wr %glob_tmp, 0x0, %wim ! set new %wim, this is safe now
122 wr %t_psr, 0x0, %psr ! restore condition codes in %psr
148 wr %glob_tmp, 0x0, %wim ! Now it is safe to set new %wim
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H A Dwuf.S1 /* SPDX-License-Identifier: GPL-2.0 */
44 /* Datum current_thread_info->uwinmask contains at all times a bitmask
45 * where if any user windows are active, at least one bit will
46 * be set in to mask. If no user windows are active, the bitmask
53 * 1 2 3 4 <-- Window number
54 * ----------
55 * T O W I <-- Symbolic name
73 /* On 7-window Sparc the boot code patches fnwin_patch1
93 wr %twin_tmp1, 0x0, %wim /* Make window 'I' invalid */
122 wr %t_psr, 0x0, %psr
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/linux/Documentation/devicetree/bindings/mtd/
H A Dlpc32xx-mlc.txt4 - compatible: "nxp,lpc3220-mlc"
5 - reg: Address and size of the controller
6 - interrupts: The NAND interrupt specification
7 - gpios: GPIO specification for NAND write protect
13 - nxp,tcea_delay: TCEA_DELAY
14 - nxp,busy_delay: BUSY_DELAY
15 - nxp,nand_ta: NAND_TA
16 - nxp,rd_high: RD_HIGH
17 - nxp,rd_low: RD_LOW
18 - nxp,wr_high: WR_HIGH
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/linux/arch/mips/boot/dts/cavium-octeon/
H A Docteon_3xxx.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
7 compatible = "cavium,octeon-3860";
8 #address-cells = <2>;
9 #size-cells = <2>;
10 interrupt-parent = <&ciu>;
13 compatible = "simple-bus";
14 #address-cells = <2>;
15 #size-cells = <2>;
18 ciu: interrupt-controller@1070000000000 {
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/linux/Documentation/devicetree/bindings/mips/cavium/
H A Dbootbus.txt7 - compatible: "cavium,octeon-3860-bootbus"
11 - reg: The base address of the Boot Bus' register bank.
13 - #address-cells: Must be <2>. The first cell is the chip select
16 - #size-cells: Must be <1>.
18 - ranges: There must be one one triplet of (child-bus-address,
19 parent-bus-address, length) for each active chip select. If the
27 - compatible: "cavium,octeon-3860-bootbus-config"
29 - cavium,cs-index: A single cell indicating the chip select that
32 - cavium,t-adr: A cell specifying the ADR timing (in nS).
34 - cavium,t-ce: A cell specifying the CE timing (in nS).
[all …]
/linux/Documentation/spi/
H A Dspidev.rst5 SPI devices have a limited userspace API, supporting basic half-duplex
19 * Prototyping in an environment that's not crash-prone; stray pointers
38 - struct spi_device_id spidev_spi_ids[]: list of devices that can be
42 - struct of_device_id spidev_dt_ids[]: list of devices that can be
46 - struct acpi_device_id spidev_acpi_ids[]: list of devices that can
52 post a patch for spidev to the linux-spi@vger.kernel.org mailing list.
101 Since this is a standard Linux device driver -- even though it just happens
102 to expose a low level API to userspace -- it can be associated with any number
112 Standard read() and write() operations are obviously only half-duplex, and
113 the chipselect is deactivated between those operations. Full-duplex access,
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/linux/net/9p/
H A Dtrans_rdma.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (C) 2004-2005 by Latchesar Ionkov <lucho@ionkov.net>
8 * Copyright (C) 2004-2008 by Eric Van Hensbergen <ericvh@gmail.com>
9 * Copyright (C) 1997-2002 by Ron Minnich <rminnich@sarnoff.com>
42 * struct p9_trans_rdma - RDMA transport instance
59 * @req_lock: Protects the active request list
93 * struct p9_rdma_context - Keeps track of in-process WR
96 * @busa: Bus address to unmap when the WR completes
111 struct p9_trans_rdma *rdma = clnt->trans; in p9_rdma_show_options()
113 if (rdma->port != P9_RDMA_PORT) in p9_rdma_show_options()
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/linux/fs/autofs/
H A Dwaitq.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 1997-1998 Transmeta Corporation -- All Rights Reserved
4 * Copyright 2001-2006 Ian Kent <raven@themaw.net>
19 mutex_lock(&sbi->wq_mutex); in autofs_catatonic_mode()
20 if (sbi->flags & AUTOFS_SBI_CATATONIC) { in autofs_catatonic_mode()
21 mutex_unlock(&sbi->wq_mutex); in autofs_catatonic_mode()
27 sbi->flags |= AUTOFS_SBI_CATATONIC; in autofs_catatonic_mode()
28 wq = sbi->queues; in autofs_catatonic_mode()
29 sbi->queues = NULL; /* Erase all wait queues */ in autofs_catatonic_mode()
31 nwq = wq->next; in autofs_catatonic_mode()
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/linux/drivers/net/ethernet/chelsio/cxgb4/
H A Dcxgb4_uld.h4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
63 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_TP_WR) | \
64 FW_WR_IMMDLEN_V(sizeof(*w) - sizeof(w->wr))); \
65 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(sizeof(*w), 16)) | \
67 (w)->wr.wr_lo = cpu_to_be64(0); \
76 (w)->wr.wr_hi = htonl(FW_WR_OP_V(FW_ULPTX_WR) | \
78 (w)->wr.wr_mid = htonl(FW_WR_LEN16_V(DIV_ROUND_UP(wrlen, 16)) | \
80 (w)->wr.wr_lo = cpu_to_be64(0); \
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/linux/net/smc/
H A Dsmc_close.c1 // SPDX-License-Identifier: GPL-2.0
3 * Shared Memory Communications over RDMA (SMC-R) and RoCE
5 * Socket Closing - normal and abnormal
28 if (smc->listen_smc && current_work() != &smc->smc_listen_work) in smc_clcsock_release()
29 cancel_work_sync(&smc->smc_listen_work); in smc_clcsock_release()
30 mutex_lock(&smc->clcsock_release_lock); in smc_clcsock_release()
31 if (smc->clcsock) { in smc_clcsock_release()
32 tcp = smc->clcsock; in smc_clcsock_release()
33 smc->clcsock = NULL; in smc_clcsock_release()
36 mutex_unlock(&smc->clcsock_release_lock); in smc_clcsock_release()
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/linux/arch/microblaze/boot/dts/
H A Dsystem.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2007-2008 Xilinx, Inc.
6 * (C) Copyright 2007-2009 Michal Simek
13 * XPS project directory: Xilinx-ML505-ll_temac-sgdma-MMU-FDT-edk101
16 /dts-v1/;
18 #address-cells = <1>;
19 #size-cells = <1>;
32 stdout-path = "/plb@0/serial@84000000";
35 #address-cells = <1>;
37 #size-cells = <0>;
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/linux/drivers/infiniband/hw/hfi1/
H A Drc.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright(c) 2015 - 2018 Intel Corporation.
18 __must_hold(&qp->s_lock) in find_prev_entry()
24 for (i = qp->r_head_ack_queue; ; i = p) { in find_prev_entry()
25 if (i == qp->s_tail_ack_queue) in find_prev_entry()
28 p = i - 1; in find_prev_entry()
30 p = rvt_size_atomic(ib_to_rvt(qp->ibqp.device)); in find_prev_entry()
31 if (p == qp->r_head_ack_queue) { in find_prev_entry()
35 e = &qp->s_ack_queue[p]; in find_prev_entry()
36 if (!e->opcode) { in find_prev_entry()
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