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/linux/drivers/gpu/drm/renesas/rz-du/
H A Drzg2l_du_kms.c327 const char *vsps_prop_name = "renesas,vsps"; in rzg2l_du_vsps_init()
332 } vsps[RZG2L_DU_MAX_VSPS] = { { NULL, }, }; in rzg2l_du_vsps_init() local
339 * First parse the DT vsps property to populate the list of VSPs. Each in rzg2l_du_vsps_init()
361 if (vsps[j].np == args.np) in rzg2l_du_vsps_init()
368 vsps[vsps_count++].np = args.np; in rzg2l_du_vsps_init()
370 vsps[j].crtcs_mask |= BIT(i); in rzg2l_du_vsps_init()
374 * second cell of the 'renesas,vsps' specifier isn't present, in rzg2l_du_vsps_init()
377 rcdu->crtcs[i].vsp = &rcdu->vsps[j]; in rzg2l_du_vsps_init()
382 * Then initialize all the VSPs from the node pointers and CRTCs bitmask in rzg2l_du_vsps_init()
386 struct rzg2l_du_vsp *vsp = &rcdu->vsps[i]; in rzg2l_du_vsps_init()
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H A Drzg2l_du_drv.h76 struct rzg2l_du_vsp vsps[RZG2L_DU_MAX_VSPS];
68 struct rzg2l_du_vsp vsps[RZG2L_DU_MAX_VSPS]; global() member
/linux/Documentation/virt/hyperv/
H A Dcoco.rst251 with VMBus servers (the VSPs) running on the Hyper-V host. The
253 host can access it. With Confidential VMBus, one or more of the VSPs reside
256 such VSPs does not need to be decrypted and thereby exposed to the
350 not any VSPs in OpenHCL that support encrypted external memory, but future
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g043u.dtsi166 renesas,vsps = <&vspd 0>;
H A Dr8a77995.dtsi1384 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
H A Dr9a09g056.dtsi1745 renesas,vsps = <&vspd 0>;
H A Dr9a09g057.dtsi1735 renesas,vsps = <&vspd 0>;
H A Dr8a774c0.dtsi1883 renesas,vsps = <&vspd0 0>, <&vspd1 0>;
/linux/drivers/clk/renesas/
H A Dr8a7792-cpg-mssr.c91 DEF_MOD("vsps", 131, R8A7792_CLK_ZS),
H A Dr8a77470-cpg-mssr.c88 DEF_MOD("vsps", 131, R8A77470_CLK_ZS),
H A Dr8a7745-cpg-mssr.c93 DEF_MOD("vsps", 131, R8A7745_CLK_ZS),
H A Dr8a7794-cpg-mssr.c100 DEF_MOD("vsps", 131, R8A7794_CLK_ZS),
H A Dr8a7791-cpg-mssr.c105 DEF_MOD("vsps", 131, R8A7791_CLK_ZS),
H A Dr8a7790-cpg-mssr.c112 DEF_MOD("vsps", 131, R8A7790_CLK_ZS),
H A Dr8a7742-cpg-mssr.c101 DEF_MOD("vsps", 131, R8A7742_CLK_ZS),
H A Dr8a7743-cpg-mssr.c95 DEF_MOD("vsps", 131, R8A7743_CLK_ZS),
/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_plane.c665 * VSPS bit in the PnDDCR4 register. Although the datasheet states that in rcar_du_plane_atomic_update()