| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | mediatek,syscon.yaml | 23 - mediatek,mt2701-vdecsys 29 - mediatek,mt2712-vdecsys 33 - mediatek,mt6735-vdecsys 43 - mediatek,mt6779-vdecsys 46 - mediatek,mt6797-vdecsys 50 - mediatek,mt8167-vdecsys 52 - mediatek,mt8173-vdecsys 63 - mediatek,mt8183-vdecsys 75 - const: mediatek,mt7623-vdecsys 76 - const: mediatek,mt2701-vdecsys
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| H A D | mediatek,mt6795-clock.yaml | 27 - mediatek,mt6795-vdecsys 55 vdecsys: clock-controller@16000000 { 56 compatible = "mediatek,mt6795-vdecsys";
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| H A D | mediatek,mt8192-clock.yaml | 31 - mediatek,mt8192-vdecsys 138 vdecsys: clock-controller@1602f000 { 139 compatible = "mediatek,mt8192-vdecsys";
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| H A D | mediatek,mt8195-clock.yaml | 47 - mediatek,mt8195-vdecsys 206 vdecsys: clock-controller@1802f000 { 207 compatible = "mediatek,mt8195-vdecsys";
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| H A D | mediatek,mt8188-clock.yaml | 43 - mediatek,mt8188-vdecsys 44 - mediatek,mt8188-vdecsys-soc
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| H A D | mediatek,mt8196-clock.yaml | 40 - mediatek,mt8196-vdecsys 41 - mediatek,mt8196-vdecsys-soc
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| H A D | mediatek,mt8365-clock.yaml | 19 - mediatek,mt8365-vdecsys
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| H A D | mediatek,mt8186-clock.yaml | 31 - mediatek,mt8186-vdecsys
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-mt6735-vdecsys.c | 12 #include <dt-bindings/clock/mediatek,mt6735-vdecsys.h> 13 #include <dt-bindings/reset/mediatek,mt6735-vdecsys.h> 63 { .compatible = "mediatek,mt6735-vdecsys", .data = &vdecsys_clks }, 71 .name = "clk-mt6735-vdecsys", 78 MODULE_DESCRIPTION("MediaTek MT6735 vdecsys clock and reset driver");
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| H A D | clk-mt8173-vdecsys.c | 42 { .compatible = "mediatek,mt8173-vdecsys", .data = &vdec_desc }, 51 .name = "clk-mt8173-vdecsys", 57 MODULE_DESCRIPTION("MediaTek MT8173 vdecsys clocks driver");
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| H A D | clk-mt6795-vdecsys.c | 40 { .compatible = "mediatek,mt6795-vdecsys", .data = &vdec_desc }, 49 .name = "clk-mt6795-vdecsys", 55 MODULE_DESCRIPTION("MediaTek MT6795 vdecsys clocks driver");
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| H A D | clk-mt8167-vdec.c | 49 { .compatible = "mediatek,mt8167-vdecsys", .data = &vdec_desc }, 58 .name = "clk-mt8167-vdecsys",
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| H A D | clk-mt8188-vdec.c | 76 { .compatible = "mediatek,mt8188-vdecsys-soc", .data = &vdec1_desc }, 77 { .compatible = "mediatek,mt8188-vdecsys", .data = &vdec2_desc },
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| H A D | clk-mt8196-vdec.c | 236 { .compatible = "mediatek,mt8196-vdecsys", .data = &vde2_mcd }, 237 { .compatible = "mediatek,mt8196-vdecsys-soc", .data = &vde1_mcd },
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| H A D | Makefile | 8 obj-$(CONFIG_COMMON_CLK_MT6735_VDECSYS) += clk-mt6735-vdecsys.o 30 obj-$(CONFIG_COMMON_CLK_MT6795_VDECSYS) += clk-mt6795-vdecsys.o 86 obj-$(CONFIG_COMMON_CLK_MT8173_VDECSYS) += clk-mt8173-vdecsys.o
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| H A D | clk-mt6795-vencsys.c | 50 MODULE_DESCRIPTION("MediaTek MT6795 vdecsys clocks driver");
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| H A D | clk-mt6779-vdec.c | 49 .compatible = "mediatek,mt6779-vdecsys",
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| H A D | clk-mt8365-vdec.c | 47 .compatible = "mediatek,mt8365-vdecsys",
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| H A D | clk-mt8173-img.c | 55 MODULE_DESCRIPTION("MediaTek MT8173 vdecsys clocks driver");
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| H A D | clk-mt8183-vdec.c | 48 .compatible = "mediatek,mt8183-vdecsys",
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| H A D | clk-mt6797-vdec.c | 47 .compatible = "mediatek,mt6797-vdecsys",
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| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8167.dtsi | 110 vdecsys: syscon@16000000 { label 111 compatible = "mediatek,mt8167-vdecsys", "syscon"; 166 clocks = <&vdecsys CLK_VDEC_CKEN>, 167 <&vdecsys CLK_VDEC_LARB1_CKEN>;
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | mediatek,smi-larb.yaml | 141 clocks = <&vdecsys CLK_VDEC_CKEN>, 142 <&vdecsys CLK_VDEC_LARB_CKEN>;
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| /linux/arch/arm/boot/dts/mediatek/ |
| H A D | mt2701.dtsi | 582 vdecsys: syscon@16000000 { label 583 compatible = "mediatek,mt2701-vdecsys", "syscon"; 593 clocks = <&vdecsys CLK_VDEC_CKGEN>, 594 <&vdecsys CLK_VDEC_LARB>;
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| H A D | mt7623n.dtsi | 77 clocks = <&vdecsys CLK_VDEC_CKGEN>, 78 <&vdecsys CLK_VDEC_LARB>;
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