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/linux/tools/memory-model/Documentation/
H A DREADME5 to expert both in kernel hacking and in understanding LKMM.
33 like a detailed intuitive understanding of LKMM, including
36 o You would like a detailed understanding of what your compiler can
/linux/Documentation/process/
H A Dembargoed-hardware-issues.rst80 Understanding instead.
83 Memorandum of Understanding
86 The Linux kernel community has a deep understanding of the requirement to
142 Memorandum of Understanding and the documented process. These developers
151 adhere to this documented process and the Memorandum of Understanding.
208 participation. The experts are covered by the Memorandum of Understanding
H A D8.Conclusion.rst38 Understanding the Linux Kernel (Daniel Bovet and Marco Cesati).
56 document. Hopefully it has provided a helpful understanding of how the
H A D7.AdvancedTopics.rst39 understanding of how git works before trying to use it to make patches
42 the tree, use branches, etc. An understanding of git's tools for the
/linux/drivers/hid/
H A Dhid-uclogic-params.h68 * understanding and maintain consistency.
112 * understanding and maintain consistency.
200 * understanding and maintain consistency.
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-vfio-mdev73 a particular <type-id> that can help in understanding the
86 a particular <type-id> that can help in understanding the
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Duncore-cache.json1350 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
1360 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
1370 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
1380 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
1390 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
1400 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
1410 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
1420 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
1430 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
1440 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
[all …]
/linux/Documentation/bpf/libbpf/
H A Dindex.rst13 <libbpf_overview>` document, which provides a high-level understanding of the
/linux/Documentation/mm/
H A Dindex.rst5 This is a guide to understanding the memory management subsystem
/linux/drivers/media/usb/au0828/
H A Dau0828-reg.h9 * understanding of their meaning.
/linux/tools/memory-model/
H A DREADME117 people focusing on writing, understanding, and running LKMM litmus tests.
157 It is not intended for people focusing on writing, understanding, and
/linux/Documentation/translations/
H A Dindex.rst27 Translation's purpose is to ease reading and understanding in languages other
/linux/drivers/iommu/
H A Diommu-pages.h17 * understanding of the issues.
/linux/Documentation/mm/damon/
H A Dindex.rst21 their workloads can write personalized applications for better understanding
/linux/kernel/gcov/
H A Dgcov.h7 * understanding, refer to gcc source: gcc/gcov-io.h.
/linux/Documentation/fb/
H A Dcmap_xfbdev.rst2 Understanding fbdev's cmap
/linux/arch/sparc/boot/
H A DMakefile41 # flash programmer understanding ELF.
/linux/Documentation/translations/it_IT/process/
H A D8.Conclusion.rst46 Understanding the Linux Kernel (Daniel Bovet and Marco Cesati).
/linux/Documentation/gpu/nova/core/
H A Ddevinit.rst8 overview of the process to aid in understanding the corresponding kernel code.
/linux/drivers/gpu/drm/msm/
H A DNOTES78 state of understanding the registers is given in the envytools rnndb
/linux/Documentation/driver-api/
H A Dswitchtec.rst101 understanding of the Linux NTB stack. ntb_hw_switchtec works as an NTB
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Duncore-cache.json2665 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
2675 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
2685 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
2695 … not interesting for general IA workloads, but may be of interest for understanding the characteri…
2855 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
2865 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
2875 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
2885 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
2895 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
2905 …e TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applicatio…
[all …]
/linux/Documentation/driver-api/memory-devices/
H A Dti-gpmc.rst49 on understanding of gpmc timings, peripheral timings, available
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Duncore-cache.json2722 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 0 only.",
2732 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 1 only.",
2742 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 2 only.",
2752 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 3 only.",
3102 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 0",
3112 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 1",
3122 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 2",
3132 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 3",
3142 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 4",
3152 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding ho
[all...]
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Duncore-cache.json2917 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 0 only.",
2927 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 1 only.",
2937 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 2 only.",
2947 "PublicDescription": "Counts the number of cycles when there are no special credits available for posting reads from the HA into the iMC. In order to send reads into the memory controller, the HA must first acquire a credit for the iMC's RPQ (read pending queue). This queue is broken into regular credits/buffers that are used by general reads, and special requests such as ISOCH reads. This count only tracks the special credits. This statistic is generally not interesting for general IA workloads, but may be of interest for understanding the characteristics of systems using ISOCH. One can filter based on the memory controller channel. One or more channels can be tracked at a given time.; Filter for memory controller channel 3 only.",
3301 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 0",
3311 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 1",
3321 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 2",
3331 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 3",
3341 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding how applications are using the memory that is spread across the different memory regions. It is particularly useful for Monroe systems that use the TAD to enable individual channels to enter self-refresh to save power.; Filters request made to TAD Region 4",
3351 "PublicDescription": "Counts the number of HA requests to a given TAD region. There are up to 11 TAD (target address decode) regions in each home agent. All requests destined for the memory controller must first be decoded to determine which TAD region they are in. This event is filtered based on the TAD region ID, and covers regions 0 to 7. This event is useful for understanding ho
[all...]

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