xref: /linux/Documentation/gpu/nova/core/devinit.rst (revision 220994d61cebfc04f071d69049127657c7e8191b)
1*952e6224SJoel Fernandes.. SPDX-License-Identifier: GPL-2.0
2*952e6224SJoel Fernandes
3*952e6224SJoel Fernandes==================================
4*952e6224SJoel FernandesDevice Initialization (devinit)
5*952e6224SJoel Fernandes==================================
6*952e6224SJoel FernandesThe devinit process is complex and subject to change. This document provides a high-level
7*952e6224SJoel Fernandesoverview using the Ampere GPU family as an example. The goal is to provide a conceptual
8*952e6224SJoel Fernandesoverview of the process to aid in understanding the corresponding kernel code.
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10*952e6224SJoel FernandesDevice initialization (devinit) is a crucial sequence of register read/write operations
11*952e6224SJoel Fernandesthat occur after a GPU reset. The devinit sequence is essential for properly configuring
12*952e6224SJoel Fernandesthe GPU hardware before it can be used.
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14*952e6224SJoel FernandesThe devinit engine is an interpreter program that typically runs on the PMU (Power Management
15*952e6224SJoel FernandesUnit) microcontroller of the GPU. This interpreter executes a "script" of initialization
16*952e6224SJoel Fernandescommands. The devinit engine itself is part of the VBIOS ROM in the same ROM image as the
17*952e6224SJoel FernandesFWSEC (Firmware Security) image (see fwsec.rst and vbios.rst) and it runs before the
18*952e6224SJoel Fernandesnova-core driver is even loaded. On an Ampere GPU, the devinit ucode is separate from the
19*952e6224SJoel FernandesFWSEC ucode. It is launched by FWSEC, which runs on the GSP in 'heavy-secure' mode, while
20*952e6224SJoel Fernandesdevinit runs on the PMU in 'light-secure' mode.
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22*952e6224SJoel FernandesKey Functions of devinit
23*952e6224SJoel Fernandes------------------------
24*952e6224SJoel Fernandesdevinit performs several critical tasks:
25*952e6224SJoel Fernandes
26*952e6224SJoel Fernandes1. Programming VRAM memory controller timings
27*952e6224SJoel Fernandes2. Power sequencing
28*952e6224SJoel Fernandes3. Clock and PLL (Phase-Locked Loop) configuration
29*952e6224SJoel Fernandes4. Thermal management
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31*952e6224SJoel FernandesLow-level Firmware Initialization Flow
32*952e6224SJoel Fernandes--------------------------------------
33*952e6224SJoel FernandesUpon reset, several microcontrollers on the GPU (such as PMU, SEC2, GSP, etc.) run GPU
34*952e6224SJoel Fernandesfirmware (gfw) code to set up the GPU and its core parameters. Most of the GPU is
35*952e6224SJoel Fernandesconsidered unusable until this initialization process completes.
36*952e6224SJoel Fernandes
37*952e6224SJoel FernandesThese low-level GPU firmware components are typically:
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39*952e6224SJoel Fernandes1. Located in the VBIOS ROM in the same ROM partition (see vbios.rst and fwsec.rst).
40*952e6224SJoel Fernandes2. Executed in sequence on different microcontrollers:
41*952e6224SJoel Fernandes
42*952e6224SJoel Fernandes  - The devinit engine typically but not necessarily runs on the PMU.
43*952e6224SJoel Fernandes  - On an Ampere GPU, the FWSEC typically runs on the GSP (GPU System Processor) in
44*952e6224SJoel Fernandes    heavy-secure mode.
45*952e6224SJoel Fernandes
46*952e6224SJoel FernandesBefore the driver can proceed with further initialization, it must wait for a signal
47*952e6224SJoel Fernandesindicating that core initialization is complete (known as GFW_BOOT). This signal is
48*952e6224SJoel Fernandesasserted by the FWSEC running on the GSP in heavy-secure mode.
49*952e6224SJoel Fernandes
50*952e6224SJoel FernandesRuntime Considerations
51*952e6224SJoel Fernandes----------------------
52*952e6224SJoel FernandesIt's important to note that the devinit sequence also needs to run during suspend/resume
53*952e6224SJoel Fernandesoperations at runtime, not just during initial boot, as it is critical to power management.
54*952e6224SJoel Fernandes
55*952e6224SJoel FernandesSecurity and Access Control
56*952e6224SJoel Fernandes---------------------------
57*952e6224SJoel FernandesThe initialization process involves careful privilege management. For example, before
58*952e6224SJoel Fernandesaccessing certain completion status registers, the driver must check privilege level
59*952e6224SJoel Fernandesmasks. Some registers are only accessible after secure firmware (FWSEC) lowers the
60*952e6224SJoel Fernandesprivilege level to allow CPU (LS/low-secure) access. This is the case, for example,
61*952e6224SJoel Fernandeswhen receiving the GFW_BOOT signal.