/linux/Documentation/devicetree/bindings/usb/ |
H A D | snps,dwc3-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 vendor-specific implementation or as a standalone component. 17 - $ref: usb-drd.yaml# 18 - if: 24 - dr_mode 28 $ref: usb-xhci.yaml# [all …]
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H A D | chipidea,usb2-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Xu Yang <xu.yang_2@nxp.com> 25 clock-names: 31 power-domains: 37 reset-names: 40 "#reset-cells": 48 itc-setting: [all …]
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/linux/Documentation/devicetree/bindings/dma/ |
H A D | renesas,nbpfaxi.txt | 1 * Renesas "Type-AXI" NBPFAXI* DMA controllers 7 - compatible: must be one of 17 - #dma-cells: must be 2: the first integer is a terminal number, to which this 26 - max-burst-mem-read: limit burst size for memory reads 28 than using the maximum burst size allowed by the hardware's buffer size. 29 - max-burst-mem-write: limit burst size for memory writes 31 than using the maximum burst size allowed by the hardware's buffer size. 32 If both max-burst-mem-read and max-burst-mem-write are set, DMA_MEM_TO_MEM 35 You can use dma-channels and dma-requests as described in dma.txt, although they 40 dma: dma-controller@48000000 { [all …]
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H A D | img-mdc-dma.txt | 1 * IMG Multi-threaded DMA Controller (MDC) 4 - compatible: Must be "img,pistachio-mdc-dma". 5 - reg: Must contain the base address and length of the MDC registers. 6 - interrupts: Must contain all the per-channel DMA interrupts. 7 - clocks: Must contain an entry for each entry in clock-names. 8 See ../clock/clock-bindings.txt for details. 9 - clock-names: Must include the following entries: 10 - sys: MDC system interface clock. 11 - img,cr-periph: Must contain a phandle to the peripheral control syscon 13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier. [all …]
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/linux/Documentation/networking/ |
H A D | pktgen.rst | 1 .. SPDX-License-Identifier: GPL-2.0 7 Enable CONFIG_NET_PKTGEN to compile and build pktgen either in-kernel 27 Tuning NIC for max performance 31 overload type of benchmarking, as this could hurt the normal use-case. 33 Specifically increasing the TX ring buffer in the NIC:: 35 # ethtool -G ethX tx 1024 37 A larger TX ring can improve pktgen's performance, while it can hurt 38 in the general case, 1) because the TX ring buffer might get larger 43 TX ring cause delay. Drivers usually delay cleaning up the 44 ring-buffers for various performance reasons, and packets stalling [all …]
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/linux/drivers/net/ethernet/broadcom/ |
H A D | bcm63xx_enet.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 19 /* maximum burst len for dma (4 bytes unit) */ 23 /* tx transmit threshold (4 bytes unit), fifo is 256 bytes, the value 24 * must be low enough so that a DMA transfer of above burst length can 29 * hardware maximum rx/tx packet size including FCS, max mtu is 30 * actually 2047, but if we set max rx size register to 2047 we won't 204 /* hw view of rx & tx dma ring */ 208 /* allocated size (in bytes) for rx & tx dma ring */ 253 /* dma channel id for tx */ 256 /* number of dma desc in tx ring */ [all …]
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H A D | bcm4908_enet.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 60 #define ENET_DMA_CH1_CFG 0xa10 /* TX */ 62 #define ENET_DMA_CH1_STATE_RAM 0xc10 /* TX */ 67 #define ENET_DMA_CH_CFG_BURST_HALT 0x00000004 /* idle after finish current memory burst */ 74 #define ENET_DMA_CH_CFG_MAX_BURST 0x0c /* max burst length permitted */ 86 #define DMA_CTL_STATUS_PRIO 0x00000C00 /* Prio for Tx */
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H A D | b44.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 17 #define B44_BIST_STAT 0x000CUL /* Built-In Self-Test Status */ 44 #define ISTAT_TX 0x01000000 /* TX Interrupt */ 56 #define B44_TXBURST 0x00A0UL /* TX Max Burst Length */ 57 #define B44_RXBURST 0x00A4UL /* RX Max Burst Length */ 71 #define B44_DMATX_CTRL 0x0200UL /* DMA TX Control */ 77 #define B44_DMATX_ADDR 0x0204UL /* DMA TX Descriptor Ring Address */ 78 #define B44_DMATX_PTR 0x0208UL /* DMA TX Last Posted Descriptor */ 79 #define B44_DMATX_STAT 0x020CUL /* DMA TX Current Active Desc. + Status */ 136 #define B44_RXMAXLEN 0x0404UL /* EMAC RX Max Packet Length */ [all …]
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/linux/samples/pktgen/ |
H A D | pktgen_sample03_burst_single_flow.sh | 2 # SPDX-License-Identifier: GPL-2.0 4 # Script for max single flow performance 5 # - If correctly tuned[1], single CPU 10G wirespeed small pkts is possible[2] 7 # Using pktgen "burst" option (use -b $N) 8 # - To boost max performance 9 # - Avail since: kernel v3.18 10 # * commit 38b2cf2982dc73 ("net: pktgen: packet bursting via skb->xmit_more") 11 # - This avoids writing the HW tailptr on every driver xmit 12 # - The performance boost is impressive, see commit and blog [2] 19 # [1] http://netoptimizer.blogspot.dk/2014/06/pktgen-for-network-overload-testing.html [all …]
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H A D | parameters.sh | 2 # SPDX-License-Identifier: GPL-2.0 8 echo "Usage: $0 [-vx] -i ethX" 9 echo " -i : (\$DEV) output interface/device (required)" 10 echo " -s : (\$PKT_SIZE) packet size" 11 echo " -d : (\$DEST_IP) destination IP. CIDR (e.g. 198.18.0.0/15) is also allowed" 12 echo " -m : (\$DST_MAC) destination MAC-addr" 13 echo " -p : (\$DST_PORT) destination PORT range (e.g. 433-444) is also allowed" 14 echo " -k : (\$UDP_CSUM) enable UDP tx checksum" 15 echo " -t : (\$THREADS) threads to start" 16 echo " -f : (\$F_THREAD) index of first thread (zero indexed CPU number)" [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | ibm,emac.txt | 8 correct clock-frequency property. 13 - device_type : "network" 15 - compatible : compatible list, contains 2 entries, first is 16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx, 18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon", 20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ> 21 - reg : <registers mapping> 22 - local-mac-address : 6 bytes, MAC address 23 - mal-device : phandle of the associated McMAL node 24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated [all …]
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/linux/drivers/net/wireless/ath/wil6210/ |
H A D | interrupt.c | 1 // SPDX-License-Identifier: ISC 3 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 15 * There is ISR pseudo-cause register, 16 * dma_rgf->DMA_RGF.PSEUDO_CAUSE.PSEUDO_CAUSE 18 * TX, RX, and MISC. 48 /* configure to Clear-On-Read mode */ 56 /* configure to Write-1-to-Clear mode */ 122 clear_bit(wil_status_irqen, wil->status); in wil6210_mask_irq_pseudo() 139 bool unmask_rx_htrsh = atomic_read(&wil->connected_vifs) > 0; in wil6210_unmask_irq_rx() [all …]
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H A D | wmi.h | 1 /* SPDX-License-Identifier: ISC */ 3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2012-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2006-2012 Wilocity 70 * Each ID maps to a bit in a 32-bit bitmask value provided by the FW to 444 * - WMI_RX_MGMT_PACKET_EVENTID - for every probe resp. 445 * - WMI_SCAN_COMPLETE_EVENTID 461 /* Max duration in the home channel(ms) */ 470 * 0 - 58320 MHz 471 * 1 - 60480 MHz [all …]
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/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp-zc1232-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2017 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 17 compatible = "xlnx,zynqmp-zc1232-revA", "xlnx,zynqmp-zc1232", "xlnx,zynqmp"; 27 stdout-path = "serial0:115200n8"; 43 compatible = "m25p80", "jedec,spi-nor"; /* 32MB */ 44 #address-cells = <1>; 45 #size-cells = <1>; 47 spi-tx-bus-width = <4>; [all …]
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H A D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/phy/phy.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 model = "ZynqMP zc1751-xm015-dc1 RevA"; [all …]
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/linux/drivers/net/ethernet/sun/ |
H A D | sungem.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 29 #define GREG_CFG_IBURST 0x00000001 /* Infinite Burst */ 30 #define GREG_CFG_TXDMALIM 0x0000003e /* TX DMA grant limit */ 33 * after infinite burst (Apple) */ 39 * This auto-clearing does not occur when the alias at GREG_STAT2 45 #define GREG_STAT_TXINTME 0x00000001 /* TX INTME frame transferred */ 46 #define GREG_STAT_TXALL 0x00000002 /* All TX frames transferred */ 47 #define GREG_STAT_TXDONE 0x00000004 /* One TX frame transferred */ 52 #define GREG_STAT_TXMAC 0x00004000 /* TX MAC signalled interrupt */ 69 * signalled to the cpu. GREG_IACK can be used to clear specific top-level [all …]
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/linux/drivers/spi/ |
H A D | spi-imx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 11 #include <linux/dma-mapping.h> 30 #include <linux/dma/imx-dma.h> 114 void (*tx)(struct spi_imx_data *spi_imx); member 118 unsigned int txfifo; /* number of words pushed in tx FIFO */ 138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi() 143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi() 148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi() 153 return d->devtype_data->devtype == IMX53_ECSPI; in is_imx53_ecspi() [all …]
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H A D | spi-meson-spicc.c | 7 * SPDX-License-Identifier: GPL-2.0+ 12 #include <linux/clk-provider.h> 24 #include <linux/dma-mapping.h> 31 * DMA achieves a transfer with one or more SPI bursts, each SPI burst is made 32 * up of one or more DMA bursts. The DMA burst implementation mechanism is, 33 * For TX, when the number of words in TXFIFO is less than the preset 34 * reading threshold, SPICC starts a reading DMA burst, which reads the preset 35 * number of words from TX buffer, then writes them into TXFIFO. 37 * writing threshold, SPICC starts a writing request burst, which reads the 40 * - 64 bits per word [all …]
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/linux/include/linux/ |
H A D | dmaengine.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. 18 * typedef dma_cookie_t - an opaque DMA cookie 31 * enum dma_status - DMA transaction status 46 * enum dma_transaction_type - DMA transaction types/indexes 73 * enum dma_transfer_direction - dma transfer mode and direction indicator 89 * ---------------------------- 91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). 96 * it is to be repeated and other per-transfer attributes. 103 * | Frame-1 | Frame-2 | ~ | Frame-'numf' | [all …]
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/linux/Documentation/networking/device_drivers/ethernet/stmicro/ |
H A D | stmmac.rst | 1 .. SPDX-License-Identifier: GPL-2.0+ 13 - In This Release 14 - Feature List 15 - Kernel Configuration 16 - Command Line Parameters 17 - Driver Information and Notes 18 - Debug Information 19 - Support 33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0 35 DesignWare(R) Cores XGMAC - 10G Ethernet MAC and DesignWare(R) Cores [all …]
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/linux/drivers/net/usb/ |
H A D | smsc95xx.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 4 * Copyright (C) 2007-2008 SMSC 11 /* Tx command words */ 17 #define TX_CMD_B_CSUM_ENABLE (0x00004000) /* TX Checksum Enable */ 38 /* SCSRs - System Control and Status Registers */ 53 #define INT_STS_TX_STOP_ (0x00020000) /* TX Stopped */ 57 #define INT_STS_TDFU_ (0x00002000) /* TX Data FIFO Underrun */ 58 #define INT_STS_TDFO_ (0x00001000) /* TX Data FIFO Overrun */ 85 #define HW_CFG_BCE_ (0x00000002) /* Burst Cap Enable */ 94 #define TX_FIFO_INF_FREE_ (0x0000FFFF) /* TX Data FIFO Free Space */ [all …]
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/linux/arch/arm/boot/dts/ti/omap/ |
H A D | am335x-nano.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Newflow Ltd - https://www.newflow.co.uk/ 5 /dts-v1/; 15 cpu0-supply = <&dcdc2_reg>; 25 compatible = "gpio-leds"; 30 default-state = "off"; 36 pinctrl-names = "default"; 37 pinctrl-0 = <&misc_pins>; 39 misc_pins: misc-pins { 40 pinctrl-single,pins = < [all …]
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/linux/drivers/net/wireless/ralink/rt2x00/ |
H A D | rt2x00queue.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com> 63 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX 87 * @tx_rate_idx: the index of the TX rate, used for TX status reporting 88 * @tx_rate_flags: the TX rate flags, used for TX status reporting 91 * of the scope of the skb->data pointer. 93 * @skb_dma: (PCI-only) the DMA address associated with the sk buffer. 112 * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff. 119 return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data; in get_skb_frame_desc() 131 * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary. [all …]
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/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 37 compatible = "fixed-clock"; 38 clock-frequency = <24000000>; 39 #clock-cells = <0>; [all …]
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/linux/drivers/leds/ |
H A D | leds-sun50i-a100.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2021-2023 Samuel Holland <samuel@sholland.org> 5 * Partly based on drivers/leds/leds-turris-omnia.c, which is: 12 #include <linux/dma-mapping.h> 16 #include <linux/led-class-multicolor.h> 103 desc = dmaengine_prep_slave_single(priv->dma_chan, priv->dma_handle, in sun50i_a100_ledc_dma_xfer() 106 return -ENOMEM; in sun50i_a100_ledc_dma_xfer() 110 return -EIO; in sun50i_a100_ledc_dma_xfer() 112 dma_async_issue_pending(priv->dma_chan); in sun50i_a100_ledc_dma_xfer() 119 unsigned int burst, length, offset; in sun50i_a100_ledc_pio_xfer() local [all …]
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