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/linux/drivers/net/phy/
H A Dlinkmode.c1 // SPDX-License-Identifier: GPL-2.0+
5 * linkmode_resolve_pause - resolve the allowable pause modes
19 * 0 1 1 1 TX
21 * 1 X 1 X TX+RX
28 __ETHTOOL_DECLARE_LINK_MODE_MASK(m); in linkmode_resolve_pause()
30 linkmode_and(m, local_adv, partner_adv); in linkmode_resolve_pause()
31 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, m)) { in linkmode_resolve_pause()
34 } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, m)) { in linkmode_resolve_pause()
47 * linkmode_set_pause - set the pause mode advertisement
49 * @tx: boolean from ethtool struct ethtool_pauseparam tx_pause member
[all …]
/linux/net/tipc/
H A Dcrypto.h1 /* SPDX-License-Identifier: GPL-2.0 */
58 * - CLUSTER_KEY:
59 * One single key is used for both TX & RX in all nodes in the cluster.
60 * - PER_NODE_KEY:
61 * Each nodes in the cluster has one TX key, for RX a node needs to know
62 * its peers' TX key for the decryption of messages from those nodes.
77 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
78 * w0:|Ver=7| User |D|TX |RX |K|M|N| Rsvd |
79 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
82 * +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
[all …]
/linux/drivers/net/ethernet/tehuti/
H A Dtehuti.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * 1) RX Free Fifo - RXF - holds descriptors of empty buffers to accept incoming
16 * 2) RX Data Fifo - RXD - holds descriptors of full buffers. This Fifo is
23 * One holds 1.5K packets and another - 26K packets. Depending on incoming
30 * skb db - used to keep track of all skbs owned by SW and their dma addresses.
34 * fifo - keeps info about fifo's size and location, relevant HW registers,
45 * NAPI - interrupt-driven mixed with polling
46 * interrupt-driven only
48 * Interrupt-driven only flow is following. When buffer is ready, HW raises
107 nic->port_num == 1 ? "" : ", 2-Port"); in print_hw_id()
[all …]
H A Dtn40.c1 // SPDX-License-Identifier: GPL-2.0+
23 tn40_write_reg(priv, TN40_REG_IMR, priv->isr_mask); in tn40_enable_interrupts()
43 f->va = dma_alloc_coherent(&priv->pdev->dev, in tn40_fifo_alloc()
44 memsz + TN40_FIFO_EXTRA_SPACE, &f->da, in tn40_fifo_alloc()
46 if (!f->va) in tn40_fifo_alloc()
47 return -ENOMEM; in tn40_fifo_alloc()
49 f->reg_cfg0 = reg_cfg0; in tn40_fifo_alloc()
50 f->reg_cfg1 = reg_cfg1; in tn40_fifo_alloc()
51 f->reg_rptr = reg_rptr; in tn40_fifo_alloc()
52 f->reg_wptr = reg_wptr; in tn40_fifo_alloc()
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
25 - rockchip,rk3308-i2s-tdm
26 - rockchip,rk3568-i2s-tdm
[all …]
/linux/net/nfc/nci/
H A Dspi.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/crc-ccitt.h>
33 struct spi_message m; in __nci_spi_send() local
39 t.tx_buf = skb->data; in __nci_spi_send()
40 t.len = skb->len; in __nci_spi_send()
47 t.delay.value = nspi->xfer_udelay; in __nci_spi_send()
49 t.speed_hz = nspi->xfer_speed_hz; in __nci_spi_send()
51 spi_message_init(&m); in __nci_spi_send()
52 spi_message_add_tail(&t, &m); in __nci_spi_send()
54 return spi_sync(nspi->spi, &m); in __nci_spi_send()
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_zec12/
H A Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
[all …]
/linux/drivers/net/ethernet/3com/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 To compile this driver as a module, choose M here. The module
42 To compile this driver as a module, choose M here. The module
50 (PC-card) Fast Ethernet card to your computer.
52 To compile this driver as a module, choose M here: the module will be
60 (PC-card) Ethernet card to your computer.
62 To compile this driver as a module, choose M here: the module will be
84 To compile this support as a module, choose M here.
93 3C990-TX, 3CR990-TX-95, 3CR990-TX-97, 3CR990-FX-95, 3CR990-FX-97,
94 3CR990SVR, 3CR990SVR95, 3CR990SVR97, 3CR990-FX-95 Server,
[all …]
/linux/net/atm/
H A Dmpoa_proc.c1 // SPDX-License-Identifier: GPL-2.0
101 * FIXME: mpcs (and per-mpc lists) have no locking whatsoever.
104 static void *mpc_start(struct seq_file *m, loff_t *pos) in mpc_start() argument
109 if (!l--) in mpc_start()
111 for (mpc = mpcs; mpc; mpc = mpc->next) in mpc_start()
112 if (!l--) in mpc_start()
117 static void *mpc_next(struct seq_file *m, void *v, loff_t *pos) in mpc_next() argument
121 return v == SEQ_START_TOKEN ? mpcs : p->next; in mpc_next()
124 static void mpc_stop(struct seq_file *m, void *v) in mpc_stop() argument
129 * READING function - called when the /proc/atm/mpoa file is read from.
[all …]
/linux/drivers/phy/starfive/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
9 tristate "StarFive JH7110 D-PHY RX support"
14 Choose this option if you have a StarFive D-PHY in your
15 system. If M is selected, the module will be called
16 phy-jh7110-dphy-rx.ko.
19 tristate "StarFive JH7110 D-PHY TX Support"
24 Choose this option if you have a StarFive D-PHY TX in your
25 system. If M is selected, the module will be called
26 phy-jh7110-dphy-tx.ko.
35 If M is selected, the module will be called
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-mcp23s08_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include "pinctrl-mcp23s08.h"
18 * Driver data holds all the per-chip data.
29 struct spi_device *spi = to_spi_device(mcp->dev); in mcp23sxx_spi_write()
30 struct spi_message m; in mcp23sxx_spi_write() local
31 struct spi_transfer t[2] = { { .tx_buf = &mcp->addr, .len = 1, }, in mcp23sxx_spi_write()
34 spi_message_init(&m); in mcp23sxx_spi_write()
35 spi_message_add_tail(&t[0], &m); in mcp23sxx_spi_write()
36 spi_message_add_tail(&t[1], &m); in mcp23sxx_spi_write()
38 return spi_sync(spi, &m); in mcp23sxx_spi_write()
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z14/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux/drivers/net/fddi/skfp/
H A Drmt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
52 #define GO_STATE(x) (smc->mib.m[MAC0].fddiMACRMTState = (x)|AFLAG)
53 #define ACTIONS_DONE() (smc->mib.m[MAC0].fddiMACRMTState &= ~AFLAG)
117 smc->mib.m[MAC0].fddiMACRMTState = ACTIONS(RM0_ISOLATED) ; in rmt_init()
118 smc->r.dup_addr_test = DA_NONE ; in rmt_init()
119 smc->r.da_flag = 0 ; in rmt_init()
120 smc->mib.m[MAC0].fddiMACMA_UnitdataAvailable = FALSE ; in rmt_init()
121 smc->r.sm_ma_avail = FALSE ; in rmt_init()
122 smc->r.loop_avail = 0 ; in rmt_init()
123 smc->r.bn_flag = 0 ; in rmt_init()
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z15/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux/tools/perf/pmu-events/arch/s390/cf_z13/
H A Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
/linux/drivers/staging/most/net/
H A Dnet.c1 // SPDX-License-Identifier: GPL-2.0
3 * net.c - Networking component for Mostcore
22 #define MAMAC_DATA_LEN (1024 - MDP_HDR_LEN)
66 struct net_dev_channel tx; member
71 static DEFINE_MUTEX(probe_disc_mt); /* ch->linked = true, most_nd_open */
72 static DEFINE_SPINLOCK(list_lock); /* list_head, ch->linked = false, dev_hold */
77 u8 *buff = mbo->virt_address; in skb_to_mamac()
79 const u8 *dest_addr = skb->data + 4; in skb_to_mamac()
80 const u8 *eth_type = skb->data + 12; in skb_to_mamac()
81 unsigned int payload_len = skb->len - ETH_HLEN; in skb_to_mamac()
[all …]
/linux/drivers/net/ethernet/chelsio/inline_crypto/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
23 Enable inline TLS support for Tx and Rx.
25 To compile this driver as a module, choose M here: the module
29 tristate "Chelsio IPSec XFRM Tx crypto offload"
35 Enable inline IPsec support for Tx.
37 To compile this driver as a module, choose M here: the module
51 To compile this driver as a module, choose M here: the module
/linux/sound/soc/atmel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
6 Say Y or M if you want to add support for codecs attached to
30 Say Y or M if you want to add support for Atmel SSC interface
31 in PDC mode configured using audio-graph-card in device-tree.
39 Say Y or M if you want to add support for Atmel SSC interface
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
49 Say Y if you want to add support for SoC audio on WM8731-based
63 tristate "SoC Audio support for WM8731-based at91sam9x5 board"
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,qca8k-nsscc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,qca8k-nsscc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Luo Jie <quic_luoj@quicinc.com>
18 include/dt-bindings/clock/qcom,qca8k-nsscc.h
19 include/dt-bindings/reset/qcom,qca8k-nsscc.h
24 - const: qcom,qca8084-nsscc
25 - items:
[all …]
/linux/drivers/spi/
H A Dspi-mpc512x-psc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Hongjun Chen <hong-jun.chen@freescale.com>
37 switch (mps->type) { \
39 struct mpc52xx_psc __iomem *psc = mps->psc; \
40 __ret = &psc->regname; \
44 struct mpc5125_psc __iomem *psc = mps->psc; \
45 __ret = &psc->regname; \
75 struct mpc512x_psc_spi_cs *cs = spi->controller_state; in mpc512x_psc_spi_transfer_setup()
77 cs->speed_hz = (t && t->speed_hz) in mpc512x_psc_spi_transfer_setup()
78 ? t->speed_hz : spi->max_speed_hz; in mpc512x_psc_spi_transfer_setup()
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dnvidia,tegra234-mgbe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 stdout-path = "serial0:115200n8";
14 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
27 * during TX anyway and that it only controls drive enable DE
30 rs485-rx-en-hog {
31 gpio-hog;
33 line-name = "rs485-rx-en";
34 output-low;
39 gpio-line-names =
[all …]
/linux/drivers/gpu/drm/meson/
H A Dmeson_vclk.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 * - CVBS 27MHz generator via the VCLK2 to the VENCI and VDAC blocks
22 * - HDMI Pixel Clocks generation
26 * - Genenate Pixel clocks for 2K/4K 10bit formats
33 * | | | | | |--ENCI
34 * | HDMI PLL |-| PLL_DIV |--- VCLK--| |--ENCL
35 * |__________| |_________| \ | MUX |--ENCP
36 * --VCLK2-| |--VDAC
37 * |_____|--HDMI-TX
140 regmap_update_bits(priv->hhi, HHI_VID_PLL_CLK_DIV, VID_PLL_EN, 0); in meson_vid_pll_set()
[all …]
/linux/net/smc/
H A Dsmc_stats.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Shared Memory Communications over RDMA (SMC-R) and RoCE
99 int m = SMC_BUF_MAX - 1; \
103 _pos = fls64((l - 1) >> 13); \
104 _pos = (_pos <= m) ? _pos : m; \
113 struct net *_net = sock_net(&__smc->sk); \
114 struct smc_stats __percpu *_smc_stats = _net->smc.smc_stats; \
117 bool is_smcd = !__smc->conn.lnk; \
119 SMC_STAT_PAYLOAD_SUB(_smc_stats, SMC_TYPE_D, tx, _len, _rc); \
121 SMC_STAT_PAYLOAD_SUB(_smc_stats, SMC_TYPE_R, tx, _len, _rc); \
[all …]
/linux/drivers/atm/
H A Dlanai.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* lanai.c -- Copyright 1999-2003 by Mitchell Blank Jr <mitch@sfgoth.com>
5 * chipset such as the Speedstream 3010 and the ENI-25p. The
7 * have the code to drive the on-board Alcatel DSL chipset (yet).
14 * o We don't support the Speedstream 3060 yet - this card has
15 * an on-board DSL modem chip by Alcatel and the driver will
24 * enable it yet - bugs in that code may actually damage your
28 * o AAL0 is stubbed in but the actual rx/tx path isn't written yet:
32 * This isn't too much work - I just wanted to get other things
37 * o There aren't any ioctl's yet -- I'd like to eventually support
[all …]

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