/linux/arch/arm64/boot/dts/microchip/ |
H A D | sparx5_pcb134_board.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 10 gpio-restart { 11 compatible = "gpio-restart"; 12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>; 16 i2c0_imux: i2c-mux-0 { 17 compatible = "i2c-mux-pinctrl"; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 i2c-parent = <&i2c0>; [all …]
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H A D | sparx5_pcb135_board.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 10 gpio-restart { 11 compatible = "gpio-restart"; 12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>; 16 i2c0_imux: i2c-mux { 17 compatible = "i2c-mux-pinctrl"; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 i2c-parent = <&i2c0>; [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | sff,sfp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP) 11 - Russell King <linux@armlinux.org.uk> 16 - sff,sfp # for SFP modules 17 - sff,sff # for soldered down SFF modules 19 i2c-bus: 24 maximum-power-milliwatt: 29 allowable by a module in the slot, in milli-Watts. Presently, modules can [all …]
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/linux/arch/arm/boot/dts/microchip/ |
H A D | lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS 6 /dts-v1/; 7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi" 10 model = "Kontron KSwitch D10 MMT 6G-2GS"; 11 compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921", 21 i2c-bus = <&i2c4>; 22 los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>; 23 mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>; 24 maximum-power-milliwatt = <2500>; [all …]
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H A D | lan966x-pcb8309.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * lan966x_pcb8309.dts - Device Tree file for PCB8309 5 /dts-v1/; 7 #include "dt-bindings/phy/phy-lan966x-serdes.h" 10 model = "Microchip EVB - LAN9662"; 11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966"; 20 stdout-path = "serial0:115200n8"; 23 gpio-restart { 24 compatible = "gpio-restart"; 25 gpios = <&gpio 56 GPIO_ACTIVE_LOW>; [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | microchip,spi-pic32.txt | 4 - compatible: Should be "microchip,pic32mzda-spi". 5 - reg: Address and length of register space for the device. 6 - interrupts: Should contain all three spi interrupts in sequence 7 of <fault-irq>, <receive-irq>, <transmit-irq>. 8 - interrupt-names: Should be "fault", "rx", "tx" in order. 9 - clocks: Phandle of the clock generating SPI clock on the bus. 10 - clock-names: Should be "mck0". 11 - cs-gpios: Specifies the gpio pins to be used for chipselects. 12 See: Documentation/devicetree/bindings/spi/spi-bus.txt 15 - dmas: Two or more DMA channel specifiers following the convention outlined [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | tqmls1088a-mbls10xxa-mc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 10 #include <dt-bindings/net/ti-dp83867.h> 15 i2c-bus = <&sfp1_i2c>; 16 mod-def0-gpios = <&gpioexp2 2 GPIO_ACTIVE_LOW>; 17 los-gpios = <&gpioexp2 3 GPIO_ACTIVE_HIGH>; 18 tx-fault-gpios = <&gpioexp2 0 GPIO_ACTIVE_HIGH>; 19 tx-disable-gpios = <&gpioexp2 1 GPIO_ACTIVE_HIGH>; 24 i2c-bus = <&sfp2_i2c>; [all …]
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H A D | fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/net/ti-dp83867.h> 14 #include "fsl-lx2160a-tqmlx2160a.dtsi" 18 compatible = "tq,lx2160a-tqmlx2160a-mblx2160a", "tq,lx2160a-tqmlx2160a", 31 stdout-path = &uart0; [all …]
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H A D | fsl-ls1088a-ten64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Based on fsl-ls1088a-rdb.dts 5 * Copyright 2017-2020 NXP 6 * Copyright 2019-2021 Traverse Technologies 11 /dts-v1/; 13 #include "fsl-ls1088a.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 28 stdout-path = "serial0:115200n8"; 32 compatible = "gpio-keys"; [all …]
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/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-8040-mcbin.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include "armada-8040.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040", 15 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 18 stdout-path = "serial0:115200n8"; 34 v_3_3: regulator-3-3v { 35 compatible = "regulator-fixed"; 36 regulator-name = "v_3_3"; 37 regulator-min-microvolt = <3300000>; [all …]
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H A D | armada-3720-uDPU.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include "armada-3720-uDPU.dtsi" 11 sfp_eth0: sfp-eth0 { 13 i2c-bus = <&i2c0>; 14 los-gpios = <&gpiosb 2 GPIO_ACTIVE_HIGH>; 15 mod-def0-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; 16 tx-disable-gpios = <&gpiosb 4 GPIO_ACTIVE_HIGH>; 17 tx-fault-gpios = <&gpiosb 5 GPIO_ACTIVE_HIGH>; 18 maximum-power-milliwatt = <3000>; [all …]
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H A D | armada-7040-mochabin.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include "armada-7040.dtsi" 17 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 20 stdout-path = "serial0:115200n8"; 34 sfp_eth0: sfp-eth0 { 36 i2c-bus = <&cp0_i2c1>; 37 los-gpios = <&sfp_gpio 3 GPIO_ACTIVE_HIGH>; 38 mod-def0-gpios = <&sfp_gpio 2 GPIO_ACTIVE_LOW>; [all …]
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H A D | armada-3720-uDPU.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) 12 /dts-v1/; 14 #include <dt-bindings/gpio/gpio.h> 15 #include "armada-372x.dtsi" 19 stdout-path = "serial0:115200n8"; 28 compatible = "gpio-leds"; 30 led-power1 { 32 gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; 35 led-power2 { [all …]
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H A D | armada-8040-puzzle-m801.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 * Device Tree file for IEI Puzzle-M801 9 #include "armada-8040.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/leds/common.h> 15 model = "IEI-Puzzle-M801"; 16 compatible = "marvell,armada8040", "marvell,armada-ap806-quad", "marvell,armada-ap806"; 28 stdout-path = "serial0:115200n8"; 37 v_3_3: regulator-3-3v { 38 compatible = "regulator-fixed"; [all …]
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H A D | cn9130-cf.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com> 19 reg_usb3_vbus0: regulator-usb3-vbus0 { 20 compatible = "regulator-fixed"; 21 regulator-name = "vbus0"; 22 regulator-min-microvolt = <5000000>; 23 regulator-max-microvolt = <5000000>; 24 gpios = <&expander0 6 GPIO_ACTIVE_LOW>; 29 i2c-bus = <&cp0_i2c1>; 30 los-gpios = <&expander0 12 GPIO_ACTIVE_HIGH>; [all …]
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H A D | cn9131-cf-solidwan.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com> 9 /dts-v1/; 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 15 #include "cn9130-sr-som.dtsi" 29 #include "armada-cp115.dtsi" 41 compatible = "solidrun,cn9131-solidwan", 42 "solidrun,cn9130-sr-som", "marvell,cn9130"; 67 compatible = "gpio-leds"; [all …]
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H A D | cn9131-db.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Device tree for the CN9131-DB board. 8 #include "cn9130-db.dtsi" 12 "marvell,armada-ap807-quad", "marvell,armada-ap807"; 21 cp1_reg_usb3_vbus0: regulator-6 { 22 compatible = "regulator-fixed"; 23 pinctrl-names = "default"; 24 pinctrl-0 = <&cp1_xhci0_vbus_pins>; 25 regulator-name = "cp1-xhci0-vbus"; 26 regulator-min-microvolt = <5000000>; [all …]
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H A D | cn9132-db.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Device tree for the CN9132-DB board. 8 #include "cn9131-db.dtsi" 12 "marvell,armada-ap807-quad", "marvell,armada-ap807"; 20 cp2_reg_usb3_vbus0: regulator-7 { 21 compatible = "regulator-fixed"; 22 regulator-name = "cp2-xhci0-vbus"; 23 regulator-min-microvolt = <5000000>; 24 regulator-max-microvolt = <5000000>; 25 enable-active-high; [all …]
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H A D | cn9130-crb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 8 #include <dt-bindings/gpio/gpio.h> 12 stdout-path = "serial0:115200n8"; 29 ap0_reg_mmc_vccq: regulator-1 { 30 compatible = "regulator-gpio"; 31 regulator-name = "ap0_mmc_vccq"; 32 regulator-min-microvolt = <1800000>; 33 regulator-max-microvolt = <3300000>; 34 gpios = <&expander0 5 GPIO_ACTIVE_HIGH>; 39 cp0_reg_usb3_vbus1: regulator-2 { [all …]
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/linux/drivers/iio/resolver/ |
H A D | ad2s1210.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2010 Analog Devices Inc. 11 * ----------------------------|------|------------------------------------------- 23 * Resolution | D1:0 | *device tree: assigned-resolution-bits* 25 * Fault | 0xFF | *not implemented* 31 * Fault to event mapping: 33 * Fault | | Channel | Type | Direction 34 * ----------------------------------------|----|--------------------------------- 44 * [3]: The chip does not differentiate between fault on sine vs. cosine so 77 /* fault register flags */ [all …]
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/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt7986a-bananapi-bpi-r3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Frank Wunderlich <frank-w@public-files.de> 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/pinctrl/mt65xx.h> 18 model = "Bananapi BPI-R3"; 19 chassis-type = "embedded"; 20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; [all …]
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/linux/arch/arm/boot/dts/broadcom/ |
H A D | bcm958625hr.dts | 33 /dts-v1/; 35 #include "bcm-nsp.dtsi" 36 #include <dt-bindings/gpio/gpio.h> 43 stdout-path = "serial0:115200n8"; 51 gpio-restart { 52 compatible = "gpio-restart"; 53 gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; 54 open-source; 60 i2c-bus = <&i2c0>; 61 mod-def0-gpios = <&gpioa 28 GPIO_ACTIVE_LOW>; [all …]
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/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-388-clearfog.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include "armada-388.dtsi" 9 #include "armada-38x-solidrun-microsom.dtsi" 13 /* So that mvebu u-boot can update the MAC addresses */ 20 stdout-path = "serial0:115200n8"; 23 reg_3p3v: regulator-3p3v { 24 compatible = "regulator-fixed"; 25 regulator-name = "3P3V"; 26 regulator-min-microvolt = <3300000>; 27 regulator-max-microvolt = <3300000>; [all …]
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H A D | armada-385-clearfog-gtr-s4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 #include "armada-385-clearfog-gtr.dtsi" 7 compatible = "solidrun,clearfog-gtr-s4", "marvell,armada385", 12 tx-fault-gpio = <&gpio0 24 GPIO_ACTIVE_HIGH>; 16 switch0: ethernet-switch@4 { 19 pinctrl-names = "default"; 20 pinctrl-0 = <&cf_gtr_switch_reset_pins>; 21 reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; 23 ethernet-ports { 24 #address-cells = <1>; [all …]
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H A D | armada-385-clearfog-gtr.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work 9 SERDES mapping - 10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0 12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1 14 4. mini PCIe CON2 - PCIe2 17 USB 2.0 mapping - 18 0. USB 2.0 - 0 USB pins header CON12 19 1. USB 2.0 - 1 mini PCIe CON2 20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3) [all …]
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