xref: /linux/arch/arm64/boot/dts/freescale/fsl-lx2160a-tqmlx2160a-mblx2160a.dts (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5) 
1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
5 * Author: Gregor Herburger
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/input/input.h>
11#include <dt-bindings/leds/common.h>
12#include <dt-bindings/net/ti-dp83867.h>
13
14#include "fsl-lx2160a-tqmlx2160a.dtsi"
15
16/ {
17	model = "TQ Systems GmbH MBLX2160A Starterkit";
18	compatible = "tq,lx2160a-tqmlx2160a-mblx2160a", "tq,lx2160a-tqmlx2160a",
19		     "fsl,lx2160a";
20
21	aliases {
22		mmc0 = &esdhc0;
23		mmc1 = &esdhc1;
24		serial0 = &uart0;
25		serial1 = &uart1;
26		serial2 = &uart2;
27		serial3 = &uart3;
28	};
29
30	chosen {
31		stdout-path = &uart0;
32	};
33
34	gpio-keys {
35		compatible = "gpio-keys";
36
37		button-user1 {
38			label = "button:user1";
39			gpios = <&gpio2 9 GPIO_ACTIVE_LOW>;
40			linux,code = <KEY_F1>;
41		};
42
43		button-user2 {
44			label = "button:user2";
45			gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
46			linux,code = <KEY_F2>;
47		};
48	};
49
50	leds {
51		compatible = "gpio-leds";
52
53		led-user1 {
54			gpios = <&gpioex1 15 GPIO_ACTIVE_LOW>;
55			color = <LED_COLOR_ID_BLUE>;
56			function = LED_FUNCTION_HEARTBEAT;
57			function-enumerator = <0>;
58			linux,default-trigger = "heartbeat";
59		};
60
61		led-user2 {
62			gpios = <&gpio2 8 GPIO_ACTIVE_LOW>;
63			color = <LED_COLOR_ID_BLUE>;
64			function = LED_FUNCTION_HEARTBEAT;
65			function-enumerator = <1>;
66			linux,default-trigger = "heartbeat";
67		};
68	};
69
70	sfp_xfi1: sfp-xfi1 {
71		compatible = "sff,sfp";
72		i2c-bus = <&xfi1_i2c>;
73		mod-def0-gpios = <&gpioex2 2 GPIO_ACTIVE_LOW>;
74		los-gpios = <&gpioex2 3 GPIO_ACTIVE_HIGH>;
75		tx-fault-gpios = <&gpioex2 0 GPIO_ACTIVE_HIGH>;
76		tx-disable-gpios = <&gpioex2 1 GPIO_ACTIVE_HIGH>;
77		status = "disabled";
78	};
79
80	sfp_xfi2: sfp-xfi2 {
81		compatible = "sff,sfp";
82		i2c-bus = <&xfi2_i2c>;
83		mod-def0-gpios = <&gpioex2 6 GPIO_ACTIVE_LOW>;
84		los-gpios = <&gpioex2 7 GPIO_ACTIVE_HIGH>;
85		tx-fault-gpios = <&gpioex2 4 GPIO_ACTIVE_HIGH>;
86		tx-disable-gpios = <&gpioex2 5 GPIO_ACTIVE_HIGH>;
87		status = "disabled";
88	};
89};
90
91&can0 {
92	status = "okay";
93};
94
95&can1 {
96	status = "okay";
97};
98
99&dpmac17 {
100	phy-handle = <&dp83867_2_3>;
101	phy-connection-type = "rgmii-id";
102};
103
104&dpmac18 {
105	phy-handle = <&dp83867_2_4>;
106	phy-connection-type = "rgmii-id";
107};
108
109&emdio1 {
110	status = "okay";
111
112	dp83867_1_1: ethernet-phy@1 {
113		reg = <1>;
114		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
115	};
116
117	dp83867_1_2: ethernet-phy@2 {
118		reg = <2>;
119		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
120	};
121
122	dp83867_1_3: ethernet-phy@3 {
123		reg = <3>;
124		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
125	};
126
127	dp83867_1_4: ethernet-phy@4 {
128		reg = <4>;
129		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
130	};
131
132	dp83867_1_5: ethernet-phy@5 {
133		reg = <5>;
134		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
135	};
136
137	dp83867_1_6: ethernet-phy@6 {
138		reg = <6>;
139		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
140	};
141};
142
143&emdio2 {
144	status = "okay";
145
146	dp83867_2_1: ethernet-phy@1 {
147		reg = <1>;
148		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
149	};
150
151	dp83867_2_2: ethernet-phy@2 {
152		reg = <2>;
153		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
154	};
155
156	dp83867_2_3: ethernet-phy@3 {
157		reg = <3>;
158		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
159		ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
160		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
161	};
162
163	dp83867_2_4: ethernet-phy@4 {
164		reg = <4>;
165		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
166		ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
167		ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
168	};
169};
170
171&esdhc0 {
172	sd-uhs-sdr104;
173	sd-uhs-sdr50;
174	sd-uhs-sdr25;
175	sd-uhs-sdr12;
176	no-mmc;
177	no-sdio;
178	wp-gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
179	cd-gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
180	status = "okay";
181};
182
183&i2c0 {
184	gpioex3: gpio@20 {
185		compatible = "nxp,pca9555";
186		reg = <0x20>;
187		#gpio-cells = <2>;
188		gpio-controller;
189		vcc-supply = <&reg_vcc3v3>;
190	};
191};
192
193&i2c4 {
194	status = "okay";
195
196	mux@70 {
197		compatible = "nxp,pca9544";
198		reg = <0x70>;
199		#address-cells = <1>;
200		#size-cells = <0>;
201		vdd-supply = <&reg_vcc3v3>;
202
203		i2c@0 {
204			reg = <0>;
205			#address-cells = <1>;
206			#size-cells = <0>;
207		};
208
209		i2c@1 {
210			reg = <1>;
211			#address-cells = <1>;
212			#size-cells = <0>;
213		};
214
215		i2c@2 {
216			reg = <2>;
217			#address-cells = <1>;
218			#size-cells = <0>;
219
220			gpioex0: gpio@20 {
221				compatible = "nxp,pca9555";
222				reg = <0x20>;
223				#gpio-cells = <2>;
224				gpio-controller;
225				vcc-supply = <&reg_vcc3v3>;
226			};
227
228			gpioex1: gpio@21 {
229				compatible = "nxp,pca9555";
230				reg = <0x21>;
231				#gpio-cells = <2>;
232				gpio-controller;
233				vcc-supply = <&reg_vcc3v3>;
234			};
235
236			gpioex2: gpio@22 {
237				compatible = "nxp,pca9555";
238				reg = <0x22>;
239				#gpio-cells = <2>;
240				gpio-controller;
241				vcc-supply = <&reg_vcc3v3>;
242			};
243		};
244
245		i2c@3 {
246			reg = <3>;
247			#address-cells = <1>;
248			#size-cells = <0>;
249		};
250	};
251};
252
253&i2c5 {
254	status = "okay";
255
256	mux@70 {
257		compatible = "nxp,pca9544";
258		reg = <0x70>;
259		#address-cells = <1>;
260		#size-cells = <0>;
261		vdd-supply = <&reg_vcc3v3>;
262
263		i2c@0 {
264			reg = <0>;
265			#address-cells = <1>;
266			#size-cells = <0>;
267		};
268
269		xfi1_i2c: i2c@1 {
270			reg = <1>;
271			#address-cells = <1>;
272			#size-cells = <0>;
273		};
274
275		xfi2_i2c: i2c@2 {
276			reg = <2>;
277			#address-cells = <1>;
278			#size-cells = <0>;
279		};
280
281		i2c@3 {
282			reg = <3>;
283			#address-cells = <1>;
284			#size-cells = <0>;
285		};
286	};
287};
288
289&pcs_mdio17 {
290	status = "okay";
291};
292
293&pcs_mdio18 {
294	status = "okay";
295};
296
297&uart0 {
298	status = "okay";
299};
300
301&uart1 {
302	status = "okay";
303};
304
305&uart2 {
306	status = "okay";
307};
308
309&uart3 {
310	status = "okay";
311};
312
313&usb0 {
314	#address-cells = <1>;
315	#size-cells = <0>;
316	status = "okay";
317
318	hub_2_0: hub@1 {
319		compatible = "usb451,8142";
320		reg = <1>;
321		peer-hub = <&hub_3_0>;
322		reset-gpios = <&gpioex1 0 GPIO_ACTIVE_LOW>;
323		vdd-supply = <&reg_vcc3v3>;
324	};
325
326	hub_3_0: hub@2 {
327		compatible = "usb451,8140";
328		reg = <2>;
329		peer-hub = <&hub_2_0>;
330		reset-gpios = <&gpioex1 0 GPIO_ACTIVE_LOW>;
331		vdd-supply = <&reg_vcc3v3>;
332	};
333};
334
335&usb1 {
336	dr_mode = "otg";
337	status = "okay";
338};
339