/linux/arch/arm64/boot/dts/microchip/ |
H A D | sparx5_pcb134_board.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 10 gpio-restart { 11 compatible = "gpio-restart"; 12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>; 16 i2c0_imux: i2c-mux-0 { 17 compatible = "i2c-mux-pinctrl"; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 i2c-parent = <&i2c0>; [all …]
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H A D | sparx5_pcb135_board.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 10 gpio-restart { 11 compatible = "gpio-restart"; 12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>; 16 i2c0_imux: i2c-mux { 17 compatible = "i2c-mux-pinctrl"; 18 #address-cells = <1>; 19 #size-cells = <0>; 20 i2c-parent = <&i2c0>; [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | sff,sfp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP) 11 - Russell King <linux@armlinux.org.uk> 16 - sff,sfp # for SFP modules 17 - sff,sff # for soldered down SFF modules 19 i2c-bus: 24 maximum-power-milliwatt: 29 allowable by a module in the slot, in milli-Watts. Presently, modules can [all …]
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/linux/arch/arm/boot/dts/microchip/ |
H A D | lan966x-kontron-kswitch-d10-mmt-6g-2gs.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree file for the Kontron KSwitch D10 MMT 6G-2GS 6 /dts-v1/; 7 #include "lan966x-kontron-kswitch-d10-mmt.dtsi" 10 model = "Kontron KSwitch D10 MMT 6G-2GS"; 11 compatible = "kontron,kswitch-d10-mmt-6g-2gs", "kontron,s1921", 21 i2c-bus = <&i2c4>; 22 los-gpios = <&sgpio_in 1 0 GPIO_ACTIVE_HIGH>; 23 mod-def0-gpios = <&sgpio_in 1 1 GPIO_ACTIVE_LOW>; 24 maximum-power-milliwatt = <2500>; [all …]
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H A D | at91-sama5d27_wlsom1_ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d27_wlsom1_ek.dts - Device Tree file for SAMA5D27 WLSOM1 EK 9 /dts-v1/; 10 #include "at91-sama5d27_wlsom1.dtsi" 11 #include <dt-bindings/input/input.h> 15 …compatible = "microchip,sama5d27-wlsom1-ek", "microchip,sama5d27-wlsom1", "atmel,sama5d27", "atmel… 26 stdout-path = "serial0:115200n8"; 29 gpio-keys { 30 compatible = "gpio-keys"; 32 pinctrl-names = "default"; [all …]
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H A D | at91-sama5d29_curiosity.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d29_curiosity.dts - Device Tree file for SAMA5D29 Curiosity board 10 /dts-v1/; 12 #include "sama5d2-pinfunc.h" 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/mfd/atmel-flexcom.h> 19 compatible = "microchip,sama5d29-curiosity", "atmel,sama5d29", "atmel,sama5d2", "atmel,sama5"; 33 stdout-path = "serial0:115200n8"; 38 clock-frequency = <32768>; [all …]
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H A D | at91-sama5d27_som1_ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d27_som1_ek.dts - Device Tree file for SAMA5D27-SOM1-EK board 10 /dts-v1/; 11 #include "at91-sama5d27_som1.dtsi" 12 #include <dt-bindings/mfd/atmel-flexcom.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 18 …compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "… 29 stdout-path = "serial0:115200n8"; 34 atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>; [all …]
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H A D | lan966x-pcb8309.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * lan966x_pcb8309.dts - Device Tree file for PCB8309 5 /dts-v1/; 7 #include "dt-bindings/phy/phy-lan966x-serdes.h" 10 model = "Microchip EVB - LAN9662"; 11 compatible = "microchip,lan9662-pcb8309", "microchip,lan9662", "microchip,lan966"; 20 stdout-path = "serial0:115200n8"; 23 gpio-restart { 24 compatible = "gpio-restart"; 25 gpios = <&gpio 56 GPIO_ACTIVE_LOW>; [all …]
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H A D | at91-sama5d2_icp.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d2_icp.dts - Device Tree file for SAMA5D2-ICP board 11 /dts-v1/; 13 #include "sama5d2-pinfunc.h" 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/mfd/atmel-flexcom.h> 19 model = "Microchip SAMA5D2-ICP"; 20 compatible = "microchip,sama5d2-icp", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; 32 stdout-path = "serial0:115200n8"; [all …]
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H A D | at91-sama5d2_ptc_ek.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR X11) 3 * at91-sama5d2_ptc_ek.dts - Device Tree file for SAMA5D2 PTC EK board 9 /dts-v1/; 11 #include "sama5d2-pinfunc.h" 12 #include <dt-bindings/mfd/atmel-flexcom.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/pinctrl/at91.h> 19 compatible = "atmel,sama5d2-ptc_ek", "atmel,sama5d2", "atmel,sama5"; 29 stdout-path = "serial0:115200n8"; [all …]
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H A D | at91-sama5d2_xplained.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board 8 /dts-v1/; 10 #include "sama5d2-pinfunc.h" 11 #include <dt-bindings/mfd/atmel-flexcom.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/regulator/active-semi,8945a-regulator.h> 18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5"; 28 stdout-path = "serial0:115200n8"; [all …]
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/linux/arch/arm/boot/dts/nxp/vf/ |
H A D | vf610-zii-scu4-aib.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 // Copyright (C) 2016-2018 Zodiac Inflight Innovations 5 /dts-v1/; 10 compatible = "zii,vf610scu4-aib", "zii,vf610dev", "fsl,vf610"; 13 stdout-path = &uart0; 21 gpio-leds { 22 compatible = "gpio-leds"; 23 pinctrl-0 = <&pinctrl_leds_debug>; 24 pinctrl-names = "default"; 26 led-debug { [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | tqmls1088a-mbls10xxa-mc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 10 #include <dt-bindings/net/ti-dp83867.h> 15 i2c-bus = <&sfp1_i2c>; 16 mod-def0-gpios = <&gpioexp2 2 GPIO_ACTIVE_LOW>; 17 los-gpios = <&gpioexp2 3 GPIO_ACTIVE_HIGH>; 18 tx-fault-gpios = <&gpioexp2 0 GPIO_ACTIVE_HIGH>; 19 tx-disable-gpios = <&gpioexp2 1 GPIO_ACTIVE_HIGH>; 24 i2c-bus = <&sfp2_i2c>; [all …]
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H A D | fsl-lx2160a-tqmlx2160a-mblx2160a.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 * Copyright (c) 2020-2023 TQ-Systems GmbH <linux@ew.tq-group.com>, 4 * D-82229 Seefeld, Germany. 8 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/net/ti-dp83867.h> 14 #include "fsl-lx2160a-tqmlx2160a.dtsi" 18 compatible = "tq,lx2160a-tqmlx2160a-mblx2160a", "tq,lx2160a-tqmlx2160a", 31 stdout-path = &uart0; [all …]
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H A D | fsl-ls1088a-ten64.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 4 * Based on fsl-ls1088a-rdb.dts 5 * Copyright 2017-2020 NXP 6 * Copyright 2019-2021 Traverse Technologies 11 /dts-v1/; 13 #include "fsl-ls1088a.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 28 stdout-path = "serial0:115200n8"; 32 compatible = "gpio-keys"; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sc7280-idp.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 9 #include <dt-bindings/input/linux-event-codes.h> 15 #include "sc7280-chrome-common.dtsi" 16 #include "sc7280-herobrine-lte-sku.dtsi" 25 max98360a: audio-codec-0 { 27 pinctrl-names = "default"; 28 pinctrl-0 = <&_en>; 29 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>; 30 #sound-dai-cells = <0>; [all …]
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/linux/arch/arm64/boot/dts/marvell/ |
H A D | armada-8040-mcbin.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include "armada-8040.dtsi" 10 #include <dt-bindings/gpio/gpio.h> 14 compatible = "marvell,armada8040-mcbin", "marvell,armada8040", 15 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 18 stdout-path = "serial0:115200n8"; 34 v_3_3: regulator-3-3v { 35 compatible = "regulator-fixed"; 36 regulator-name = "v_3_3"; 37 regulator-min-microvolt = <3300000>; [all …]
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H A D | armada-3720-uDPU.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 5 #include "armada-3720-uDPU.dtsi" 11 sfp_eth0: sfp-eth0 { 13 i2c-bus = <&i2c0>; 14 los-gpios = <&gpiosb 2 GPIO_ACTIVE_HIGH>; 15 mod-def0-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; 16 tx-disable-gpios = <&gpiosb 4 GPIO_ACTIVE_HIGH>; 17 tx-fault-gpios = <&gpiosb 5 GPIO_ACTIVE_HIGH>; 18 maximum-power-milliwatt = <3000>; [all …]
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H A D | cn9130-cf.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2024 Josua Mayer <josua@solid-run.com> 19 reg_usb3_vbus0: regulator-usb3-vbus0 { 20 compatible = "regulator-fixed"; 21 regulator-name = "vbus0"; 22 regulator-min-microvolt = <5000000>; 23 regulator-max-microvolt = <5000000>; 24 gpios = <&expander0 6 GPIO_ACTIVE_LOW>; 29 i2c-bus = <&cp0_i2c1>; 30 los-gpios = <&expander0 12 GPIO_ACTIVE_HIGH>; [all …]
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/linux/arch/arm64/boot/dts/xilinx/ |
H A D | zynqmp-zcu100-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2022, Xilinx, Inc. 6 * (C) Copyright 2022 - 2023, Advanced Micro Devices, Inc. 12 /dts-v1/; 15 #include "zynqmp-clk-ccf.dtsi" 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/interrupt-controller/irq.h> 18 #include <dt-bindings/gpio/gpio.h> 19 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 #include <dt-bindings/phy/phy.h> [all …]
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H A D | zynqmp-zc1751-xm019-dc5.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm019-dc5 5 * (C) Copyright 2015 - 2021, Xilinx, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm019-dc5 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; 33 stdout-path = "serial0:115200n8"; [all …]
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/linux/arch/arm/boot/dts/xilinx/ |
H A D | zynq-zc702.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2011 - 2014 Xilinx 6 /dts-v1/; 7 #include "zynq-7000.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 12 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; 28 stdout-path = "serial0:115200n8"; 31 gpio-keys { 32 compatible = "gpio-keys"; 34 switch-14 { [all …]
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/linux/arch/arm64/boot/dts/amlogic/ |
H A D | meson-gxbb-nanopi-k2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-gxbb.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/sound/meson-aiu.h> 13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; 22 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 33 led-stat { 34 label = "nanopi-k2:blue:stat"; [all …]
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/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-clearfog-gtr.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work 9 SERDES mapping - 10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0 12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1 14 4. mini PCIe CON2 - PCIe2 17 USB 2.0 mapping - 18 0. USB 2.0 - 0 USB pins header CON12 19 1. USB 2.0 - 1 mini PCIe CON2 20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3) [all …]
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6qdl-dhcom-drc02.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 8 stdout-path = "serial0:115200n8"; 14 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2 15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD 27 * during TX anyway and that it only controls drive enable DE 30 rs485-rx-en-hog { 31 gpio-hog; 32 gpios = <18 0>; /* GPIO Q */ 33 line-name = "rs485-rx-en"; 34 output-low; [all …]
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