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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dlantiq,etop-xway.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
14 pattern: "^ethernet@[0-9a-f]+$"
17 const: lantiq,etop-xway
24 - description: TX interrupt
25 - description: RX interrupt
27 interrupt-names:
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H A Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jos
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H A Dsnps,dwc-qos-ethernet.txt13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qo
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/freebsd/sys/contrib/device-tree/Bindings/usb/
H A Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
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H A Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specific
18 -
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H A Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
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H A Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdr
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_udma_regs_m2s.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
84 * 00 - No pending tasks
98 * 0 - Log is enabled.
99 * 1 - Log is masked.
159 /* [0x54] M2S packet length configuration */
173 /* [0x10] Data burst read configuration */
178 /* [0x0] Tx DMA DWRR scheduler configuration */
213 * 0 - Rate limit is active.
214 * 1 - Rate limit is masked.
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H A Dal_hal_udma_config.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
81 uint8_t burst; member
95 uint8_t min_axi_beats; /* Minimum burst for writing completion desc. */
108 uint8_t min_axi_beats; /* Minimum burst for writing completion desc. */
137 /* in one burst (5b) */
139 uint8_t min_burst_above_thr; /* min burst size when fifo above
142 uint8_t min_burst_below_thr; /* min burst size when fifo below
168 uint8_t min_burst_above_thr; /* min burst size when fifo above
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/freebsd/sys/contrib/device-tree/Bindings/spi/
H A Dfsl-imx-cspi.txt5 - compatible :
6 - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13 - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8MQ
14 - "fsl,imx8mm-ecspi" for SPI compatible with the one integrated on i.MX8MM
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/freebsd/sys/contrib/device-tree/Bindings/dma/
H A Dimg-mdc-dma.txt1 * IMG Multi-threaded DMA Controller (MDC)
4 - compatible: Must be "img,pistachio-mdc-dma".
5 - reg: Must contain the base address and length of the MDC registers.
6 - interrupts: Must contain all the per-channel DMA interrupts.
7 - clocks: Must contain an entry for each entry in clock-names.
8 See ../clock/clock-bindings.txt for details.
9 - clock-names: Must include the following entries:
10 - sys: MDC system interface clock.
11 - img,cr-periph: Must contain a phandle to the peripheral control syscon
13 - img,max-burst-multiplier: Must be the maximum supported burst size multiplier.
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H A Darm-pl330.txt7 - compatible: should include both "arm,pl330" and "arm,primecell".
8 - reg: physical base address of the controller and length of memory mapped
10 - interrupts: interrupt number to the cpu.
13 - dma-coherent : Present if dma operations are coherent
14 - #dma-cells: must be <1>. used to represent the number of integer
16 - dma-channels: contains the total number of DMA channels supported by the DMAC
17 - dma-requests: contains the total number of DMA requests supported by the DMAC
18 - arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP
19 - arm,pl330-periph-burst: quirk for performing burst transfer only
20 - resets: contains an entry for each entry in reset-names.
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/freebsd/tools/tools/netmap/
H A Dbridge.c2 * (C) 2011-2014 Luigi Rizzo, Matteo Landi
45 for (i = d->first_rx_ring; i <= d->last_rx_ring; i++) { in rx_slots_avail()
46 tot += nm_ring_space(NETMAP_RXRING(d->nifp, i)); in rx_slots_avail()
57 for (i = d->first_tx_ring; i <= d->last_tx_ring; i++) { in tx_slots_avail()
58 tot += nm_ring_space(NETMAP_TXRING(d->nifp, i)); in tx_slots_avail()
75 if (rxring->flags || txring->flags) in rings_move()
77 msg, rxring->flags, txring->flags); in rings_move()
78 j = rxring->head; /* RX */ in rings_move()
79 k = txring->head; /* TX */ in rings_move()
87 while (limit-- > 0) { in rings_move()
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H A Dnmreplay.c49 * --- Main functions of the program ---
59 * q->cur_pkt points to the buffer containing the packet
60 * q->cur_len packet length, excluding CRC
61 * q->cur_caplen available packet length (may be shorter than cur_len)
62 * q->cur_tt transmission time for the packet, computed from the trace.
66 * q->c_loss (set with the -L command line option) decides
69 * The function is supposed to set q->c_drop = 1 if the
72 * q->c_bw (set with the -B command line option) is used to
74 * in q->cur_tt the transmission time (in nanoseconds) of
75 * the packet, which is typically proportional to the length
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H A Dpkt-gen.c2 * Copyright (C) 2011-2014 Matteo Landi, Luigi Rizzo. All rights reserved.
3 * Copyright (C) 2013-2015 Universita` di Pisa. All rights reserved.
28 * $Id: pkt-gen.c 12346 2013-06-12 17:36:25Z luigi $
133 n->octet[0], n->octet[1], n->octet[2], in ether_ntoa()
134 n->octet[3], n->octet[4], n->octet[5]); in ether_ntoa()
184 static const char *default_payload = "netmap pkt-gen DIRECT payload\n"
187 static const char *indirect_payload = "netmap pkt-gen indirect payload\n"
193 #define VIRT_HDR_1 10 /* length of a base vnet-hdr */
194 #define VIRT_HDR_2 12 /* length of the extenede vnet-hdr */
220 ((af) == AF_INET ? (p)->ipv4.f: (p)->ipv6.f)
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/freebsd/sys/contrib/device-tree/src/arm/axis/
H A Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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/freebsd/sys/dev/ath/
H A Dif_ath_tx_ht.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
100 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
105 * returns delimiter padding required given the packet length
109 (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
111 #define PADBYTES(_len) ((4 - ((_len) % 4)) % 4)
170 #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18)
178 { 104, 216 }, // 3: 16-QAM 1/2
179 { 156, 324 }, // 4: 16-QAM 3/4
180 { 208, 432 }, // 5: 64-QAM 2/3
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/freebsd/sys/dev/ste/
H A Dif_stereg.h1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
44 * D-Link PCI device/vendor ID for the DL10050[AB] chip
53 * There are 32-bit, 16-bit and 8-bit registers.
136 * TX DMA burst thresh is the number of 32-byte blocks that
137 * must be loaded into the TX Fifo before a TXDMA burst request
143 * The number of 32-byte blocks in the TX FIFO falls below the
144 * TX DMA urgent threshold, a TX DMA urgent request will be
167 * RX DMA burst thresh is the number of 32-byte blocks that
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/freebsd/sys/contrib/dev/athk/ath11k/
H A Ddebugfs_htt_stats.h1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
146 /* Length should be multiple of DWORD */
148 /* Can be variable length */
154 /* == TX PDEV STATS == */
209 /* NOTE: Variable length TLV, use length spec to infer array size */
215 /* NOTE: Variable length TLV, use length spec to infer array size */
221 /* NOTE: Variable length TLV, use length spec to infer array size */
227 /* NOTE: Variable length TLV, use length spec to infer array size */
233 /* NOTE: Variable length TLV, use length spec to infer array size */
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/freebsd/sys/dev/le/
H A Dlancereg.h3 /*-
4 * SPDX-License-Identifier: BSD-2-Clause
34 /*-
70 * - Am7990 Local Area Network Controller for Ethernet (LANCE)
71 * (and its descendent Am79c90 C-LANCE).
73 * - Am79c900 Integrated Local Area Communications Controller (ILACC)
75 * - Am79c960 PCnet-ISA Single-Chip Ethernet Controller for ISA
77 * - Am79c961 PCnet-ISA+ Jumperless Single-Chip Ethernet Controller
80 * - Am79c961A PCnet-ISA II Jumperless Full-Duplex Single-Chip
83 * - Am79c965A PCnet-32 Single-Chip 32-bit Ethernet Controller
[all …]
/freebsd/sys/dev/ath/ath_hal/ar5210/
H A Dar5210reg.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
5 * Copyright (c) 2002-2004 Atheros Communications, Inc.
24 * Processor for IEEE 802.11a 5-GHz Wireless LANs.
34 #define AR_TXDP0 0x0000 /* TX queue pointer 0 register */
35 #define AR_TXDP1 0x0004 /* TX queue pointer 1 register */
44 #define AR_TXCFG 0x0030 /* TX configuration register */
49 #define AR_TXNOFRM 0x004c /* TX no frame timeout register */
72 #define AR_SLOT_TIME 0x8010 /* Length of a back-off */
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/freebsd/sys/dev/cas/
H A Dif_casreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * from: FreeBSD: if_gemreg.h 174987 2007-12-30 01:32:03Z marius
43 #define CAS_INF_BURST 0x0008 /* infinite burst enable */
84 * Bits 0-9 of CAS_STATUS auto-clear when read. CAS_CLEAR_ALIAS specifies
85 * which of bits 0-9 auto-clear when reading CAS_STATUS_ALIAS.
88 #define CAS_INTR_TX_ALL 0x00000002 /* TX frames trans. to FIFO. */
89 #define CAS_INTR_TX_DONE 0x00000004 /* Any TX frame transferred. */
90 #define CAS_INTR_TX_TAG_ERR 0x00000008 /* TX FIFO tag corrupted. */
97 #define CAS_INTR_RX_LEN_MMATCH 0x00000400 /* length field mismatch */
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/freebsd/sys/contrib/dev/iwlwifi/fw/api/
H A Dlocation.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2015-2017 Intel Deutschland GmbH
4 * Copyright (C) 2018-2022 Intel Corporation
11 * enum iwl_location_subcmd_ids - location group command IDs
86 * struct iwl_tof_config_cmd - ToF configuration
88 * @one_sided_disabled: indicates if one-side
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/freebsd/sys/dev/eqos/
H A Dif_eqos.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 * $Id: eqos.c 1059 2022-12-08 19:32:32Z sos $
33 * DesignWare Ethernet Quality-of-Service controller
84 #define TX_QUEUED(h, t) ((((h) - (t)) + TX_DESC_COUNT) % TX_DESC_COUNT)
93 #define EQOS_LOCK(sc) mtx_lock(&(sc)->lock)
94 #define EQOS_UNLOCK(sc) mtx_unlock(&(sc)->lock)
95 #define EQOS_ASSERT_LOCKED(sc) mtx_assert(&(sc)->lock, MA_OWNED)
97 #define RD4(sc, o) bus_read_4(sc->res[EQOS_RES_MEM], (o))
98 #define WR4(sc, o, v) bus_write_4(sc->res[EQOS_RES_MEM], (o), (v))
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/freebsd/sys/dev/ale/
H A Dif_ale.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
78 /* For more information about Tx checksum offload issues see ale_encap(). */
182 { -1, 0, 0 }
187 { -1, 0, 0 }
192 { -1, 0, 0 }
197 { -1, 0, 0 }
211 for (i = ALE_PHY_TIMEOUT; i > 0; i--) { in ale_miibus_readreg()
219 device_printf(sc->ale_dev, "phy read timeout : %d\n", reg); in ale_miibus_readreg()
238 for (i = ALE_PHY_TIMEOUT; i > 0; i--) { in ale_miibus_writereg()
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