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/linux/Documentation/devicetree/bindings/thermal/
H A Drzg2l-thermal.yaml10 On RZ/G2L SoCs, the thermal sensor unit (TSU) measures the
22 - renesas,r9a07g043-tsu # RZ/G2UL and RZ/Five
23 - renesas,r9a07g044-tsu # RZ/G2{L,LC}
24 - renesas,r9a07g054-tsu # RZ/V2L
25 - const: renesas,rzg2l-tsu
55 tsu: thermal@10059400 {
56 compatible = "renesas,r9a07g044-tsu",
57 "renesas,rzg2l-tsu";
69 thermal-sensors = <&tsu 0>;
/linux/drivers/net/ethernet/cadence/
H A Dmacb_ptp.c249 struct timespec64 tsu; in gem_hw_timestamp() local
255 /* TSU overlapping workaround in gem_hw_timestamp()
259 gem_tsu_get_time(&bp->ptp_clock_info, &tsu, NULL); in gem_hw_timestamp()
261 ts->tv_sec |= ((~GEM_DMA_SEC_MASK) & tsu.tv_sec); in gem_hw_timestamp()
268 !(tsu.tv_sec & (GEM_DMA_SEC_TOP >> 1))) in gem_hw_timestamp()
H A Dmacb.h437 #define MACB_SRI_OFFSET 26 /* TSU Seconds Register Increment */
588 #define GEM_TSH_OFFSET 0 /* TSU timer value (s). MSB [47:32] of seconds timer count */
592 #define GEM_TSL_OFFSET 0 /* TSU timer value (s). LSB [31:0] of seconds timer count */
596 #define GEM_TN_OFFSET 0 /* TSU timer value (ns) */
1322 spinlock_t tsu_clk_lock; /* gem tsu clock locking */
H A Dmacb_main.c3962 if (!GEM_BFEXT(TSU, gem_readl(bp, DCFG5))) in macb_configure_caps()
/linux/drivers/net/ethernet/renesas/
H A Dsh_eth.h97 /* TSU Absolute address */
510 unsigned tsu:1; /* EtherC has TSU */ member
558 int port; /* for TSU */
/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas,r9a09g011-sys.yaml23 - Temperature sensor (TSU) monitor
H A Drenesas,r9a09g057-sys.yaml18 - Control of settings and states of SRAM/PCIe/CM33/CA55/CR8/xSPI/ADC/TSU
/linux/arch/sh/boards/
H A Dboard-espt.c67 .start = 0xFEE01800, /* TSU */
H A Dboard-sh7757lcr.c133 /* TSU */
166 /* TSU */
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a07g043.dtsi551 tsu: thermal@10059400 { label
552 compatible = "renesas,r9a07g043-tsu",
553 "renesas,rzg2l-tsu";
890 thermal-sensors = <&tsu 0>;
H A Dr9a07g054.dtsi669 tsu: thermal@10059400 { label
670 compatible = "renesas,r9a07g054-tsu",
671 "renesas,rzg2l-tsu";
1317 thermal-sensors = <&tsu 0>;
H A Dr9a07g044.dtsi664 tsu: thermal@10059400 { label
665 compatible = "renesas,r9a07g044-tsu",
666 "renesas,rzg2l-tsu";
1309 thermal-sensors = <&tsu 0>;
/linux/arch/sh/boards/mach-sh7763rdp/
H A Dsetup.c76 .start = 0xFEE01800, /* TSU */
/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-gated-clock.txt162 5 tsu Transp. Stream Unit
/linux/drivers/clk/mvebu/
H A Dkirkwood.c226 { "tsu", NULL, 5, 0 },
/linux/drivers/clk/renesas/
H A Dr9a07g043-cpg.c134 DEF_FIXED("TSU", R9A07G043_CLK_TSU, CLK_PLL2_DIV2_10, 1, 1),
H A Dr9a07g044-cpg.c170 DEF_FIXED("TSU", R9A07G044_CLK_TSU, CLK_PLL2_DIV2_10, 1, 1),
/linux/drivers/net/ethernet/3com/
H A Dtyphoon.h14 exported from the United States under License Exception "TSU"
H A Dtyphoon.c16 exported from the United States under License Exception "TSU"
/linux/drivers/i2c/busses/
H A Di2c-jz4780.c307 * tSU:DAT in jz4780_i2c_set_speed()
/linux/drivers/clk/
H A Dclk-eyeq.c625 .name = "div-tsu",
/linux/drivers/i2c/
H A Di2c-core-base.c237 * for details. Note that we must honour tsu:sto, 4us, but lets use 5us in i2c_generic_scl_recovery()
264 /* Honour minimum tsu:sto */ in i2c_generic_scl_recovery()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_psr.c413 drm_dbg_kms(display->drm, "\tSU dirty FIFO underrun\n"); in psr_event_print()
415 drm_dbg_kms(display->drm, "\tSU CRC FIFO underrun\n"); in psr_event_print()
/linux/
H A DCREDITS3912 N: Tsu-Sheng Tsao
/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c5194 /* It seems we must also release the TX reset when enabling the TSU */ in mvpp2_set_ts_config()