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/linux/sound/isa/gus/
H A Dgus_timer.c100 struct snd_timer *timer = gus->gf1.timer2; in snd_gf1_interrupt_timer2()
138 gus->gf1.timer2 = NULL; in snd_gf1_timer2_free()
146 if (gus->gf1.timer1 != NULL || gus->gf1.timer2 != NULL) in snd_gf1_timers_init()
174 gus->gf1.timer2 = timer; in snd_gf1_timers_init()
184 if (gus->gf1.timer2) { in snd_gf1_timers_done()
185 snd_device_free(gus->card, gus->gf1.timer2); in snd_gf1_timers_done()
186 gus->gf1.timer2 = NULL; in snd_gf1_timers_done()
/linux/drivers/clocksource/
H A Dtimer-zevio.c51 void __iomem *timer1, *timer2; member
132 timer->timer2 = timer->base + IO_TIMER2; in zevio_timer_add()
186 writel(CNTL_STOP_TIMER, timer->timer2 + IO_CONTROL); in zevio_timer_add()
187 writel(0, timer->timer2 + IO_CURRENT_VAL); in zevio_timer_add()
188 writel(0, timer->timer2 + IO_DIVIDER); in zevio_timer_add()
190 timer->timer2 + IO_CONTROL); in zevio_timer_add()
192 clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL, in zevio_timer_add()
/linux/arch/mips/boot/dts/mobileye/
H A Deyeq5-pins.dtsi17 timer2_pins: timer2-pins {
18 function = "timer2";
22 function = "timer2";
26 function = "timer2";
/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray.dtsi347 clock-names = "timer1", "timer2", "apb_pclk";
358 clock-names = "timer1", "timer2", "apb_pclk";
361 timer2: timer@50000 { label
368 clock-names = "timer1", "timer2", "apb_pclk";
379 clock-names = "timer1", "timer2", "apb_pclk";
390 clock-names = "timer1", "timer2", "apb_pclk";
401 clock-names = "timer1", "timer2", "apb_pclk";
412 clock-names = "timer1", "timer2", "apb_pclk";
423 clock-names = "timer1", "timer2", "apb_pclk";
/linux/Documentation/devicetree/bindings/timer/
H A Drealtek,otto-timer.yaml30 - description: timer2 registers
41 - description: timer2 interrupt
H A Dingenic,tcu.yaml179 - const: timer2
289 clock-names = "timer0", "timer1", "timer2", "timer3",
H A Dimg,pistachio-gptimer.yaml23 - description: Timer2 interrupt
H A Darm,sp804.yaml96 clock-names = "timer1", "timer2", "apb_pclk";
/linux/arch/m68k/coldfire/
H A Dtimers.c62 /* Timer2 is to be used as a high speed profile timer */ in init_timer_irq()
145 * By default use timer2 as the profiler clock timer.
160 /* Reset ColdFire timer2 */ in coldfire_profile_tick()
173 printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n", in coldfire_profile_init()
/linux/drivers/net/wireless/ath/ath5k/
H A Dpcu.c650 u32 timer1, timer2, timer3; in ath5k_hw_init_beacon_timers() local
659 * timer and timer2 as next CFP duration start in ath5k_hw_init_beacon_timers()
664 timer2 = 0xffffffff; in ath5k_hw_init_beacon_timers()
667 timer2 = 0x0007ffff; in ath5k_hw_init_beacon_timers()
677 * beacon alert (DBA) timer and timer2 as next in ath5k_hw_init_beacon_timers()
680 timer2 = (next_beacon - AR5K_TUNE_SW_BEACON_RESP) << 3; in ath5k_hw_init_beacon_timers()
699 ath5k_hw_reg_write(ah, timer2, AR5K_TIMER2); in ath5k_hw_init_beacon_timers()
/linux/include/dt-bindings/pinctrl/
H A Dk210-fpioa.h212 #define K210_PCF_TIMER2_TOGGLE1 198 /* TIMER2 Toggle Output 1 */
213 #define K210_PCF_TIMER2_TOGGLE2 199 /* TIMER2 Toggle Output 2 */
214 #define K210_PCF_TIMER2_TOGGLE3 200 /* TIMER2 Toggle Output 3 */
215 #define K210_PCF_TIMER2_TOGGLE4 201 /* TIMER2 Toggle Output 4 */
/linux/arch/arm/boot/dts/cirrus/
H A Dep7209.dtsi24 timer1 = &timer2;
124 timer2: timer@80000340 { label
/linux/drivers/clk/
H A Dclk-clps711x.c101 /* Timer2 in prescale mode. in clps711x_clk_init_dt()
123 clk_hw_register_divider_table(NULL, "timer2", "timer_ref", 0, in clps711x_clk_init_dt()
/linux/Documentation/devicetree/bindings/soc/mobileye/
H A Dmobileye,eyeq5-olb.yaml65 timer0, timer1, timer2, timer5, uart0, uart1, can0, can1, spi0,
107 const: timer2
/linux/drivers/pinctrl/
H A Dpinctrl-lpc18xx.c172 [FUNC_TIMER2] = "timer2",
306 LPC_P(6,1, GPIO, EMC, UART0, I2S0_RX_WS, R, TIMER2, R, R, 0, ND);
307 LPC_P(6,2, GPIO, EMC, UART0, I2S0_RX_SDA, R, TIMER2, R, R, 0, ND);
308 LPC_P(6,3, GPIO, USB0, SGPIO, EMC, R, TIMER2, R, R, 0, ND);
311 LPC_P(6,6, GPIO, EMC, SGPIO, USB0, R, TIMER2, R, R, 0, ND);
312 LPC_P(6,7, R, EMC, SGPIO, USB0, GPIO, TIMER2, R, R, 0, ND);
313 LPC_P(6,8, R, EMC, SGPIO, USB0, GPIO, TIMER2, R, R, 0, ND);
314 LPC_P(6,9, GPIO, R, R, EMC, R, TIMER2, R, R, 0, ND);
316 LPC_P(6,11, GPIO, R, R, EMC, R, TIMER2, R, R, 0, ND);
/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_vt.dts52 timer2@ffd00000 {
H A Dsocfpga.dtsi17 timer2 = &timer2;
888 timer2: timer2@ffd00000 { label
/linux/arch/arm/boot/dts/arm/
H A Dintegratorcp.dts160 timer2: timer@13000200 { label
161 /* TIMER2 runs @ 1MHz */
H A Dintegratorap.dts51 arm,timer-primary = &timer2;
144 timer2: timer@13000200 { label
/linux/arch/mips/include/asm/sgi/
H A Dpi1.h62 volatile u8 timer2; member
/linux/Documentation/devicetree/bindings/reset/
H A Dnxp,lpc1850-rgu.txt35 34 Timer2
/linux/net/tipc/
H A Dcrypto.c195 * @timer2: general timer 2 (jiffies)
224 unsigned long timer2; member
1413 tx->timer2 = jiffies; in tipc_crypto_key_synch()
1506 c->timer2 = jiffies; in tipc_crypto_start()
1586 rx->timer2 = jiffies; in tipc_crypto_timeout()
1614 rx->timer2 = jiffies; in tipc_crypto_timeout()
1624 if (time_before(jiffies, rx->timer2 + TIPC_RX_PASSIVE_LIM) && in tipc_crypto_timeout()
1638 if (time_after(jiffies, tx->timer2 + TIPC_TX_GRACE_PERIOD)) in tipc_crypto_timeout()
1738 time_before(jiffies, tx->timer2 + TIPC_TX_GRACE_PERIOD)) { in tipc_crypto_xmit()
1968 rx->timer2 = jiffies; in tipc_crypto_rcv_complete()
[all …]
/linux/drivers/watchdog/
H A Di6300esb.c50 #define ESB_TIMER2_REG(w) ((w)->base + 0x04)/* Timer2 value after each reset */
261 * timer2 results in a reboot. We set it to not generate in esb_initdevice()
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dbrcm,bcm2835-armctrl-ic.yaml37 2: TIMER2
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dcirrus,madera.yaml70 spk-overheat-warn, timer1-sts, timer2-sts,

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