1b2441318SGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
2f86b9e03SGreg Ungerer /***************************************************************************/
3f86b9e03SGreg Ungerer
4f86b9e03SGreg Ungerer /*
5f86b9e03SGreg Ungerer * timers.c -- generic ColdFire hardware timer support.
6f86b9e03SGreg Ungerer *
7f86b9e03SGreg Ungerer * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
8f86b9e03SGreg Ungerer */
9f86b9e03SGreg Ungerer
10f86b9e03SGreg Ungerer /***************************************************************************/
11f86b9e03SGreg Ungerer
12f86b9e03SGreg Ungerer #include <linux/kernel.h>
13f86b9e03SGreg Ungerer #include <linux/init.h>
14f86b9e03SGreg Ungerer #include <linux/sched.h>
15f86b9e03SGreg Ungerer #include <linux/interrupt.h>
16f86b9e03SGreg Ungerer #include <linux/irq.h>
17f86b9e03SGreg Ungerer #include <linux/profile.h>
18f86b9e03SGreg Ungerer #include <linux/clocksource.h>
19f86b9e03SGreg Ungerer #include <asm/io.h>
20f86b9e03SGreg Ungerer #include <asm/traps.h>
21f86b9e03SGreg Ungerer #include <asm/machdep.h>
22f86b9e03SGreg Ungerer #include <asm/coldfire.h>
23f86b9e03SGreg Ungerer #include <asm/mcftimer.h>
24f86b9e03SGreg Ungerer #include <asm/mcfsim.h>
25f86b9e03SGreg Ungerer
26f86b9e03SGreg Ungerer /***************************************************************************/
27f86b9e03SGreg Ungerer
28f86b9e03SGreg Ungerer /*
29f86b9e03SGreg Ungerer * By default use timer1 as the system clock timer.
30f86b9e03SGreg Ungerer */
31f86b9e03SGreg Ungerer #define FREQ (MCF_BUSCLK / 16)
32f86b9e03SGreg Ungerer #define TA(a) (MCFTIMER_BASE1 + (a))
33f86b9e03SGreg Ungerer
34f86b9e03SGreg Ungerer /*
35f86b9e03SGreg Ungerer * These provide the underlying interrupt vector support.
36f86b9e03SGreg Ungerer * Unfortunately it is a little different on each ColdFire.
37f86b9e03SGreg Ungerer */
38f86b9e03SGreg Ungerer void coldfire_profile_init(void);
39f86b9e03SGreg Ungerer
40f86b9e03SGreg Ungerer #if defined(CONFIG_M53xx) || defined(CONFIG_M5441x)
41f86b9e03SGreg Ungerer #define __raw_readtrr __raw_readl
42f86b9e03SGreg Ungerer #define __raw_writetrr __raw_writel
43f86b9e03SGreg Ungerer #else
44f86b9e03SGreg Ungerer #define __raw_readtrr __raw_readw
45f86b9e03SGreg Ungerer #define __raw_writetrr __raw_writew
46f86b9e03SGreg Ungerer #endif
47f86b9e03SGreg Ungerer
48f86b9e03SGreg Ungerer static u32 mcftmr_cycles_per_jiffy;
49f86b9e03SGreg Ungerer static u32 mcftmr_cnt;
50f86b9e03SGreg Ungerer
51f86b9e03SGreg Ungerer /***************************************************************************/
52f86b9e03SGreg Ungerer
init_timer_irq(void)53f86b9e03SGreg Ungerer static void init_timer_irq(void)
54f86b9e03SGreg Ungerer {
55f86b9e03SGreg Ungerer #ifdef MCFSIM_ICR_AUTOVEC
56f86b9e03SGreg Ungerer /* Timer1 is always used as system timer */
57f86b9e03SGreg Ungerer writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
58f86b9e03SGreg Ungerer MCFSIM_TIMER1ICR);
59f86b9e03SGreg Ungerer mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
60f86b9e03SGreg Ungerer
61f86b9e03SGreg Ungerer #ifdef CONFIG_HIGHPROFILE
62f86b9e03SGreg Ungerer /* Timer2 is to be used as a high speed profile timer */
63f86b9e03SGreg Ungerer writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
64f86b9e03SGreg Ungerer MCFSIM_TIMER2ICR);
65f86b9e03SGreg Ungerer mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
66f86b9e03SGreg Ungerer #endif
67f86b9e03SGreg Ungerer #endif /* MCFSIM_ICR_AUTOVEC */
68f86b9e03SGreg Ungerer }
69f86b9e03SGreg Ungerer
70f86b9e03SGreg Ungerer /***************************************************************************/
71f86b9e03SGreg Ungerer
mcftmr_tick(int irq,void * dummy)72f86b9e03SGreg Ungerer static irqreturn_t mcftmr_tick(int irq, void *dummy)
73f86b9e03SGreg Ungerer {
74f86b9e03SGreg Ungerer /* Reset the ColdFire timer */
75f86b9e03SGreg Ungerer __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
76f86b9e03SGreg Ungerer
77f86b9e03SGreg Ungerer mcftmr_cnt += mcftmr_cycles_per_jiffy;
78275e70e4SArnd Bergmann legacy_timer_tick(1);
79275e70e4SArnd Bergmann return IRQ_HANDLED;
80f86b9e03SGreg Ungerer }
81f86b9e03SGreg Ungerer
82f86b9e03SGreg Ungerer /***************************************************************************/
83f86b9e03SGreg Ungerer
mcftmr_read_clk(struct clocksource * cs)84a5a1d1c2SThomas Gleixner static u64 mcftmr_read_clk(struct clocksource *cs)
85f86b9e03SGreg Ungerer {
86f86b9e03SGreg Ungerer unsigned long flags;
87f86b9e03SGreg Ungerer u32 cycles;
88f86b9e03SGreg Ungerer u16 tcn;
89f86b9e03SGreg Ungerer
90f86b9e03SGreg Ungerer local_irq_save(flags);
91f86b9e03SGreg Ungerer tcn = __raw_readw(TA(MCFTIMER_TCN));
92f86b9e03SGreg Ungerer cycles = mcftmr_cnt;
93f86b9e03SGreg Ungerer local_irq_restore(flags);
94f86b9e03SGreg Ungerer
95f86b9e03SGreg Ungerer return cycles + tcn;
96f86b9e03SGreg Ungerer }
97f86b9e03SGreg Ungerer
98f86b9e03SGreg Ungerer /***************************************************************************/
99f86b9e03SGreg Ungerer
100f86b9e03SGreg Ungerer static struct clocksource mcftmr_clk = {
101f86b9e03SGreg Ungerer .name = "tmr",
102f86b9e03SGreg Ungerer .rating = 250,
103f86b9e03SGreg Ungerer .read = mcftmr_read_clk,
104f86b9e03SGreg Ungerer .mask = CLOCKSOURCE_MASK(32),
105f86b9e03SGreg Ungerer .flags = CLOCK_SOURCE_IS_CONTINUOUS,
106f86b9e03SGreg Ungerer };
107f86b9e03SGreg Ungerer
108f86b9e03SGreg Ungerer /***************************************************************************/
109f86b9e03SGreg Ungerer
hw_timer_init(void)110*f9a01539SArnd Bergmann void hw_timer_init(void)
111f86b9e03SGreg Ungerer {
112ba000760Safzal mohammed int r;
113ba000760Safzal mohammed
114f86b9e03SGreg Ungerer __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
115f86b9e03SGreg Ungerer mcftmr_cycles_per_jiffy = FREQ / HZ;
116f86b9e03SGreg Ungerer /*
117f86b9e03SGreg Ungerer * The coldfire timer runs from 0 to TRR included, then 0
118f86b9e03SGreg Ungerer * again and so on. It counts thus actually TRR + 1 steps
119f86b9e03SGreg Ungerer * for 1 tick, not TRR. So if you want n cycles,
120f86b9e03SGreg Ungerer * initialize TRR with n - 1.
121f86b9e03SGreg Ungerer */
122f86b9e03SGreg Ungerer __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
123f86b9e03SGreg Ungerer __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
124f86b9e03SGreg Ungerer MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
125f86b9e03SGreg Ungerer
126f86b9e03SGreg Ungerer clocksource_register_hz(&mcftmr_clk, FREQ);
127f86b9e03SGreg Ungerer
128f86b9e03SGreg Ungerer init_timer_irq();
129ba000760Safzal mohammed r = request_irq(MCF_IRQ_TIMER, mcftmr_tick, IRQF_TIMER, "timer", NULL);
130ba000760Safzal mohammed if (r) {
131ba000760Safzal mohammed pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
132ba000760Safzal mohammed ERR_PTR(r));
133ba000760Safzal mohammed }
134f86b9e03SGreg Ungerer
135f86b9e03SGreg Ungerer #ifdef CONFIG_HIGHPROFILE
136f86b9e03SGreg Ungerer coldfire_profile_init();
137f86b9e03SGreg Ungerer #endif
138f86b9e03SGreg Ungerer }
139f86b9e03SGreg Ungerer
140f86b9e03SGreg Ungerer /***************************************************************************/
141f86b9e03SGreg Ungerer #ifdef CONFIG_HIGHPROFILE
142f86b9e03SGreg Ungerer /***************************************************************************/
143f86b9e03SGreg Ungerer
144f86b9e03SGreg Ungerer /*
145f86b9e03SGreg Ungerer * By default use timer2 as the profiler clock timer.
146f86b9e03SGreg Ungerer */
147f86b9e03SGreg Ungerer #define PA(a) (MCFTIMER_BASE2 + (a))
148f86b9e03SGreg Ungerer
149f86b9e03SGreg Ungerer /*
150f86b9e03SGreg Ungerer * Choose a reasonably fast profile timer. Make it an odd value to
151f86b9e03SGreg Ungerer * try and get good coverage of kernel operations.
152f86b9e03SGreg Ungerer */
153f86b9e03SGreg Ungerer #define PROFILEHZ 1013
154f86b9e03SGreg Ungerer
155f86b9e03SGreg Ungerer /*
156f86b9e03SGreg Ungerer * Use the other timer to provide high accuracy profiling info.
157f86b9e03SGreg Ungerer */
coldfire_profile_tick(int irq,void * dummy)158f86b9e03SGreg Ungerer irqreturn_t coldfire_profile_tick(int irq, void *dummy)
159f86b9e03SGreg Ungerer {
160f86b9e03SGreg Ungerer /* Reset ColdFire timer2 */
161f86b9e03SGreg Ungerer __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
162f86b9e03SGreg Ungerer if (current->pid)
163f86b9e03SGreg Ungerer profile_tick(CPU_PROFILING);
164f86b9e03SGreg Ungerer return IRQ_HANDLED;
165f86b9e03SGreg Ungerer }
166f86b9e03SGreg Ungerer
167f86b9e03SGreg Ungerer /***************************************************************************/
168f86b9e03SGreg Ungerer
coldfire_profile_init(void)169f86b9e03SGreg Ungerer void coldfire_profile_init(void)
170f86b9e03SGreg Ungerer {
171ba000760Safzal mohammed int ret;
172ba000760Safzal mohammed
173f86b9e03SGreg Ungerer printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
174f86b9e03SGreg Ungerer PROFILEHZ);
175f86b9e03SGreg Ungerer
176f86b9e03SGreg Ungerer /* Set up TIMER 2 as high speed profile clock */
177f86b9e03SGreg Ungerer __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
178f86b9e03SGreg Ungerer
179f86b9e03SGreg Ungerer __raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
180f86b9e03SGreg Ungerer __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
181f86b9e03SGreg Ungerer MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
182f86b9e03SGreg Ungerer
183ba000760Safzal mohammed ret = request_irq(MCF_IRQ_PROFILER, coldfire_profile_tick, IRQF_TIMER,
184ba000760Safzal mohammed "profile timer", NULL);
185ba000760Safzal mohammed if (ret) {
186ba000760Safzal mohammed pr_err("Failed to request irq %d (profile timer): %pe\n",
187ba000760Safzal mohammed MCF_IRQ_PROFILER, ERR_PTR(ret));
188ba000760Safzal mohammed }
189f86b9e03SGreg Ungerer }
190f86b9e03SGreg Ungerer
191f86b9e03SGreg Ungerer /***************************************************************************/
192f86b9e03SGreg Ungerer #endif /* CONFIG_HIGHPROFILE */
193f86b9e03SGreg Ungerer /***************************************************************************/
194