/freebsd/sys/contrib/device-tree/Bindings/soc/microchip/ |
H A D | atmel,at91rm9200-tcb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Atmel Timer Counter Block 10 - Alexandre Belloni <alexandre.belloni@bootlin.com> 13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each 14 timer has three channels with two counters each. 19 - enum: 20 - atmel,at91rm9200-tcb [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 52 clk_hse: clk-hs [all...] |
H A D | stm32mp131.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-binding [all...] |
H A D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 #include "../armv7-m.dtsi" 49 #include <dt-bindings/clock/stm32fx-clock.h> 50 #include <dt-bindings/mfd/stm32f4-rcc.h> 53 #address-cells = <1>; 54 #size-cells = <1>; 57 clk_hse: clk-hse { 58 #clock-cells = <0>; [all …]
|
H A D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-binding [all...] |
/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 This hardware block provides 3 types of timer along with PWM functionality: 11 - advanced-control timers consist of a 16-bit auto-reload counter driven 12 by a programmable prescaler, break input feature, PWM outputs and 13 complementary PWM outputs channels. 14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter 15 driven by a programmable prescaler and PWM outputs. [all …]
|
H A D | st,stm32-lptimer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Low-Power Timers 10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several 12 - PWM output (with programmable prescaler, configurable polarity) 13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT) 14 - Several counter modes: 15 - quadrature encoder to detect angular position and direction of rotary [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/pwm/ |
H A D | pwm-samsung.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml# 5 $schema: http://devicetree.org/meta-schema [all...] |
H A D | pwm-omap-dmtimer.txt | 1 * OMAP PWM for dual-mode timers 4 - compatible: Shall contain "ti,omap-dmtimer-pwm". 5 - ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer-dm.yaml for info 7 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of 11 - ti,prescaler: Should be a value between 0 and 7, see the timers datasheet 12 - ti,clock-source: Set dmtimer parent clock, values between 0 and 2: 13 - 0x00 - high-frequency system clock (timer_sys_ck) 14 - 0x01 - 32-kHz always-on clock (timer_32k_ck) 15 - 0x02 - external clock (timer_ext_ck, OMAP2 only) 18 pwm9: dmtimer-pwm@9 { [all …]
|
H A D | snps,dw-apb-timers-pwm2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pwm/snp [all...] |
/freebsd/sys/contrib/device-tree/Bindings/timer/ |
H A D | renesas,rz-mtu3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/renesa [all...] |
H A D | ingenic,tcu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/ingeni [all...] |
H A D | ti,timer-dm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI dual-mode timer 10 - Tony Lindgren <tony@atomide.com> 13 The TI dual-mode timer is a general purpose timer with PWM capabilities. 18 - items: 19 - enum: 20 - ti,am335x-timer [all …]
|
H A D | andestech,atcpit100-timer.txt | 1 Andestech ATCPIT100 timer 2 ------------------------------------------------------------------ 6 This timer is a set of compact multi-function timers, which can be 7 used as pulse width modulators (PWM) as well as simple timers. 10 multi-function timer and provide the following usage scenarios: 11 One 32-bit timer 12 Two 16-bit timers 13 Four 8-bit timers 14 One 16-bit PWM 15 One 16-bit timer and one 8-bit PWM [all …]
|
H A D | xlnx,xps-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/timer/xlnx,xps-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Xilinx LogiCORE IP AXI Timer 10 - Sean Anderson <sean.anderson@seco.com> 15 const: xlnx,xps-timer-1.00.a 20 clock-names: 29 '#pwm-cells': true 31 xlnx,count-width: [all …]
|
H A D | ti,timer.txt | 1 OMAP Timer bindings 4 - compatible: Should be set to one of the below. Please note that 5 OMAP44xx devices have timer instances that are 100% 8 So for OMAP44xx devices timer instances may use 11 ti,omap2420-timer (applicable to OMAP24xx devices) 12 ti,omap3430-timer (applicable to OMAP3xxx/44xx devices) 13 ti,omap4430-timer (applicable to OMAP44xx devices) 14 ti,omap5430-timer (applicable to OMAP543x devices) 15 ti,am335x-timer (applicable to AM335x devices) 16 ti,am335x-timer-1ms (applicable to AM335x devices) [all …]
|
/freebsd/sys/contrib/device-tree/src/arm/microchip/ |
H A D | at91-kizbox.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91-kizbox.dts - Device Tree file for Overkiz Kizbox board 5 * Copyright (C) 2012-2014 Boris BREZILLON <b.brezillon@overkiz.com> 6 * 2014-2015 Gaël PORTAY <g.portay@overkiz.com> 8 /dts-v1/; 10 #include <dt-bindings/pwm/pwm.h> 18 stdout-path = &dbgu; 27 clock-frequency = <18432000>; 31 gpio-keys { 32 compatible = "gpio-keys"; [all …]
|
/freebsd/sys/contrib/device-tree/src/arm64/ti/ |
H A D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cell [all...] |
H A D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefcl [all...] |
H A D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 bootph-all; 11 compatible = "pinctrl-single"; 13 #pinctrl-cells = <1>; 14 pinctrl-single,register-widt [all...] |
H A D | k3-am62a-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "pinctrl-single"; 12 #pinctrl-cells = <1>; 13 pinctrl-single,register-width = <32>; 14 pinctrl-singl [all...] |
H A D | k3-am64-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 10 * The MCU domain timer interrupts are routed only to the ESM module, 14 mcu_timer0: timer@4800000 { 15 compatible = "ti,am654-timer"; 18 clock-name [all...] |
H A D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v [all...] |
H A D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cell [all...] |
/freebsd/sys/contrib/device-tree/src/arm/rockchip/ |
H A D | rk3128.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <dt-bindings/clock/rk3128-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-binding [all...] |