Lines Matching +full:timer +full:- +full:pwm
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
24 #size-cells = <1>;
27 tfa-sram@1c0000 {
31 dmsc-sram@1e0000 {
35 sproxy-sram@1fc000 {
41 bootph-all;
42 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
44 #address-cells = <1>;
45 #size-cells = <1>;
49 bootph-all;
50 compatible = "ti,am654-chipid";
54 serdes_ln_ctrl: mux-controller {
55 compatible = "mmio-mux";
56 #mux-control-cells = <1>;
57 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */
61 compatible = "ti,am654-phy-gmii-sel";
63 #phy-cells = <1>;
66 epwm_tbclk: clock-controller@4130 {
67 compatible = "ti,am64-epwm-tbclk";
69 #clock-cells = <1>;
73 gic500: interrupt-controller@1800000 {
74 compatible = "arm,gic-v3";
75 #address-cells = <2>;
76 #size-cells = <2>;
78 #interrupt-cells = <3>;
79 interrupt-controller;
91 gic_its: msi-controller@1820000 {
92 compatible = "arm,gic-v3-its";
94 socionext,synquacer-pre-its = <0x1000000 0x400000>;
95 msi-controller;
96 #msi-cells = <1>;
101 bootph-all;
102 compatible = "simple-bus";
103 #address-cells = <2>;
104 #size-cells = <2>;
105 dma-ranges;
108 ti,sci-dev-id = <25>;
111 bootph-all;
112 compatible = "ti,am654-secure-proxy";
113 #mbox-cells = <1>;
114 reg-names = "target_data", "rt", "scfg";
118 interrupt-names = "rx_012";
122 inta_main_dmss: interrupt-controller@48000000 {
123 compatible = "ti,sci-inta";
125 #interrupt-cells = <0>;
126 interrupt-controller;
127 interrupt-parent = <&gic500>;
128 msi-controller;
130 ti,sci-dev-id = <28>;
131 ti,interrupt-ranges = <4 68 36>;
132 ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
135 main_bcdma: dma-controller@485c0100 {
136 compatible = "ti,am64-dmss-bcdma";
146 reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
148 msi-parent = <&inta_main_dmss>;
149 #dma-cells = <3>;
152 ti,sci-dev-id = <26>;
153 ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
154 ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
155 ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
158 main_pktdma: dma-controller@485c0000 {
159 compatible = "ti,am64-dmss-pktdma";
168 reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
170 msi-parent = <&inta_main_dmss>;
171 #dma-cells = <2>;
174 ti,sci-dev-id = <30>;
175 ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
181 ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
187 ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
195 ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
204 dmsc: system-controller@44043000 {
205 bootph-all;
206 compatible = "ti,k2g-sci";
207 ti,host-id = <12>;
208 mbox-names = "rx", "tx";
211 reg-names = "debug_messages";
214 k3_pds: power-controller {
215 bootph-all;
216 compatible = "ti,sci-pm-domain";
217 #power-domain-cells = <2>;
220 k3_clks: clock-controller {
221 bootph-all;
222 compatible = "ti,k2g-sci-clk";
223 #clock-cells = <2>;
226 k3_reset: reset-controller {
227 bootph-all;
228 compatible = "ti,sci-reset";
229 #reset-cells = <2>;
234 bootph-all;
235 compatible = "pinctrl-single";
237 #pinctrl-cells = <1>;
238 pinctrl-single,register-width = <32>;
239 pinctrl-single,function-mask = <0xffffffff>;
242 main_timer0: timer@2400000 {
243 bootph-all;
244 compatible = "ti,am654-timer";
248 clock-names = "fck";
249 assigned-clocks = <&k3_clks 36 1>;
250 assigned-clock-parents = <&k3_clks 36 2>;
251 power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
252 ti,timer-pwm;
255 main_timer1: timer@2410000 {
256 compatible = "ti,am654-timer";
260 clock-names = "fck";
261 assigned-clocks = <&k3_clks 37 1>;
262 assigned-clock-parents = <&k3_clks 37 2>;
263 power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
264 ti,timer-pwm;
267 main_timer2: timer@2420000 {
268 compatible = "ti,am654-timer";
272 clock-names = "fck";
273 assigned-clocks = <&k3_clks 38 1>;
274 assigned-clock-parents = <&k3_clks 38 2>;
275 power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
276 ti,timer-pwm;
279 main_timer3: timer@2430000 {
280 compatible = "ti,am654-timer";
284 clock-names = "fck";
285 assigned-clocks = <&k3_clks 39 1>;
286 assigned-clock-parents = <&k3_clks 39 2>;
287 power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
288 ti,timer-pwm;
291 main_timer4: timer@2440000 {
292 compatible = "ti,am654-timer";
296 clock-names = "fck";
297 assigned-clocks = <&k3_clks 40 1>;
298 assigned-clock-parents = <&k3_clks 40 2>;
299 power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
300 ti,timer-pwm;
303 main_timer5: timer@2450000 {
304 compatible = "ti,am654-timer";
308 clock-names = "fck";
309 assigned-clocks = <&k3_clks 41 1>;
310 assigned-clock-parents = <&k3_clks 41 2>;
311 power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
312 ti,timer-pwm;
315 main_timer6: timer@2460000 {
316 compatible = "ti,am654-timer";
320 clock-names = "fck";
321 assigned-clocks = <&k3_clks 42 1>;
322 assigned-clock-parents = <&k3_clks 42 2>;
323 power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
324 ti,timer-pwm;
327 main_timer7: timer@2470000 {
328 compatible = "ti,am654-timer";
332 clock-names = "fck";
333 assigned-clocks = <&k3_clks 43 1>;
334 assigned-clock-parents = <&k3_clks 43 2>;
335 power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
336 ti,timer-pwm;
339 main_timer8: timer@2480000 {
340 compatible = "ti,am654-timer";
344 clock-names = "fck";
345 assigned-clocks = <&k3_clks 44 1>;
346 assigned-clock-parents = <&k3_clks 44 2>;
347 power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
348 ti,timer-pwm;
351 main_timer9: timer@2490000 {
352 compatible = "ti,am654-timer";
356 clock-names = "fck";
357 assigned-clocks = <&k3_clks 45 1>;
358 assigned-clock-parents = <&k3_clks 45 2>;
359 power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
360 ti,timer-pwm;
363 main_timer10: timer@24a0000 {
364 compatible = "ti,am654-timer";
368 clock-names = "fck";
369 assigned-clocks = <&k3_clks 46 1>;
370 assigned-clock-parents = <&k3_clks 46 2>;
371 power-domains = <&k3_pds 46 TI_SCI_PD_EXCLUSIVE>;
372 ti,timer-pwm;
375 main_timer11: timer@24b0000 {
376 compatible = "ti,am654-timer";
380 clock-names = "fck";
381 assigned-clocks = <&k3_clks 47 1>;
382 assigned-clock-parents = <&k3_clks 47 2>;
383 power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
384 ti,timer-pwm;
388 bootph-pre-ram;
389 compatible = "ti,j721e-esm";
391 ti,esm-pins = <160>, <161>;
395 compatible = "ti,am64-uart", "ti,am654-uart";
398 clock-frequency = <48000000>;
399 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
401 clock-names = "fclk";
406 compatible = "ti,am64-uart", "ti,am654-uart";
409 clock-frequency = <48000000>;
410 power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
412 clock-names = "fclk";
417 compatible = "ti,am64-uart", "ti,am654-uart";
420 clock-frequency = <48000000>;
421 power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
423 clock-names = "fclk";
428 compatible = "ti,am64-uart", "ti,am654-uart";
431 clock-frequency = <48000000>;
432 power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
434 clock-names = "fclk";
439 compatible = "ti,am64-uart", "ti,am654-uart";
442 clock-frequency = <48000000>;
443 power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
445 clock-names = "fclk";
450 compatible = "ti,am64-uart", "ti,am654-uart";
453 clock-frequency = <48000000>;
454 power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
456 clock-names = "fclk";
461 compatible = "ti,am64-uart", "ti,am654-uart";
464 clock-frequency = <48000000>;
465 power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
467 clock-names = "fclk";
472 compatible = "ti,am64-i2c", "ti,omap4-i2c";
475 #address-cells = <1>;
476 #size-cells = <0>;
477 power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
479 clock-names = "fck";
484 compatible = "ti,am64-i2c", "ti,omap4-i2c";
487 #address-cells = <1>;
488 #size-cells = <0>;
489 power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
491 clock-names = "fck";
496 compatible = "ti,am64-i2c", "ti,omap4-i2c";
499 #address-cells = <1>;
500 #size-cells = <0>;
501 power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
503 clock-names = "fck";
508 compatible = "ti,am64-i2c", "ti,omap4-i2c";
511 #address-cells = <1>;
512 #size-cells = <0>;
513 power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
515 clock-names = "fck";
520 compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
523 #address-cells = <1>;
524 #size-cells = <0>;
525 power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
528 dma-names = "tx0", "rx0";
533 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
536 #address-cells = <1>;
537 #size-cells = <0>;
538 power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
544 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
547 #address-cells = <1>;
548 #size-cells = <0>;
549 power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
555 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
558 #address-cells = <1>;
559 #size-cells = <0>;
560 power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
566 compatible = "ti,am654-mcspi","ti,omap4-mcspi";
569 #address-cells = <1>;
570 #size-cells = <0>;
571 power-domains = <&k3_pds 145 TI_SCI_PD_EXCLUSIVE>;
576 main_gpio_intr: interrupt-controller@a00000 {
577 compatible = "ti,sci-intr";
579 ti,intr-trigger-type = <1>;
580 interrupt-controller;
581 interrupt-parent = <&gic500>;
582 #interrupt-cells = <1>;
584 ti,sci-dev-id = <3>;
585 ti,interrupt-ranges = <0 32 16>;
589 compatible = "ti,am64-gpio", "ti,keystone-gpio";
591 gpio-controller;
592 #gpio-cells = <2>;
593 interrupt-parent = <&main_gpio_intr>;
596 interrupt-controller;
597 #interrupt-cells = <2>;
599 ti,davinci-gpio-unbanked = <0>;
600 power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
602 clock-names = "gpio";
606 compatible = "ti,am64-gpio", "ti,keystone-gpio";
608 gpio-controller;
609 #gpio-cells = <2>;
610 interrupt-parent = <&main_gpio_intr>;
613 interrupt-controller;
614 #interrupt-cells = <2>;
616 ti,davinci-gpio-unbanked = <0>;
617 power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
619 clock-names = "gpio";
623 compatible = "ti,am64-sdhci-8bit";
626 power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
628 clock-names = "clk_ahb", "clk_xin";
629 mmc-ddr-1_8v;
630 mmc-hs200-1_8v;
631 ti,trm-icp = <0x2>;
632 ti,otap-del-sel-legacy = <0x0>;
633 ti,otap-del-sel-mmc-hs = <0x0>;
634 ti,otap-del-sel-ddr52 = <0x6>;
635 ti,otap-del-sel-hs200 = <0x7>;
640 compatible = "ti,am64-sdhci-4bit";
643 power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
645 clock-names = "clk_ahb", "clk_xin";
646 ti,trm-icp = <0x2>;
647 ti,otap-del-sel-legacy = <0x0>;
648 ti,otap-del-sel-sd-hs = <0xf>;
649 ti,otap-del-sel-sdr12 = <0xf>;
650 ti,otap-del-sel-sdr25 = <0xf>;
651 ti,otap-del-sel-sdr50 = <0xc>;
652 ti,otap-del-sel-sdr104 = <0x6>;
653 ti,otap-del-sel-ddr50 = <0x9>;
654 ti,clkbuf-sel = <0x7>;
659 compatible = "ti,am642-cpsw-nuss";
660 #address-cells = <2>;
661 #size-cells = <2>;
663 reg-names = "cpsw_nuss";
666 assigned-clocks = <&k3_clks 13 1>;
667 assigned-clock-parents = <&k3_clks 13 9>;
668 clock-names = "fck";
669 power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
680 dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
683 ethernet-ports {
684 #address-cells = <1>;
685 #size-cells = <0>;
689 ti,mac-only;
692 mac-address = [00 00 00 00 00 00];
693 ti,syscon-efuse = <&main_conf 0x200>;
698 ti,mac-only;
701 mac-address = [00 00 00 00 00 00];
706 compatible = "ti,cpsw-mdio","ti,davinci_mdio";
708 #address-cells = <1>;
709 #size-cells = <0>;
711 clock-names = "fck";
717 compatible = "ti,j721e-cpts";
720 clock-names = "cpts";
721 interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
722 interrupt-names = "cpts";
723 ti,cpts-ext-ts-inputs = <4>;
724 ti,cpts-periodic-outputs = <2>;
729 compatible = "ti,j721e-cpts";
731 reg-names = "cpts";
732 power-domains = <&k3_pds 84 TI_SCI_PD_EXCLUSIVE>;
734 clock-names = "cpts";
735 assigned-clocks = <&k3_clks 84 0>;
736 assigned-clock-parents = <&k3_clks 84 8>;
738 interrupt-names = "cpts";
739 ti,cpts-periodic-outputs = <6>;
740 ti,cpts-ext-ts-inputs = <8>;
744 compatible = "pinctrl-single";
746 #pinctrl-cells = <1>;
747 pinctrl-single,register-width = <32>;
748 pinctrl-single,function-mask = <0x000107ff>;
751 usbss0: cdns-usb@f900000 {
752 compatible = "ti,am64-usb";
754 power-domains = <&k3_pds 161 TI_SCI_PD_EXCLUSIVE>;
756 clock-names = "ref", "lpm";
757 assigned-clocks = <&k3_clks 161 9>; /* USB2_REFCLK */
758 assigned-clock-parents = <&k3_clks 161 10>; /* HF0SC0 */
759 #address-cells = <2>;
760 #size-cells = <2>;
767 reg-names = "otg",
773 interrupt-names = "host",
776 maximum-speed = "super-speed";
782 compatible = "ti,am654-tscadc", "ti,am3359-tscadc";
785 power-domains = <&k3_pds 0 TI_SCI_PD_EXCLUSIVE>;
787 assigned-clocks = <&k3_clks 0 0>;
788 assigned-clock-parents = <&k3_clks 0 3>;
789 assigned-clock-rates = <60000000>;
790 clock-names = "fck";
794 #io-channel-cells = <1>;
795 compatible = "ti,am654-adc", "ti,am3359-adc";
800 compatible = "simple-bus";
802 #address-cells = <2>;
803 #size-cells = <2>;
807 compatible = "ti,am654-ospi", "cdns,qspi-nor";
811 cdns,fifo-depth = <256>;
812 cdns,fifo-width = <4>;
813 cdns,trigger-address = <0x0>;
814 #address-cells = <0x1>;
815 #size-cells = <0x0>;
817 assigned-clocks = <&k3_clks 75 6>;
818 assigned-clock-parents = <&k3_clks 75 7>;
819 assigned-clock-rates = <166666666>;
820 power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
826 compatible = "ti,am64-hwspinlock";
828 #hwlock-cells = <1>;
832 compatible = "ti,am64-mailbox";
836 #mbox-cells = <1>;
837 ti,mbox-num-users = <4>;
838 ti,mbox-num-fifos = <16>;
843 compatible = "ti,am64-mailbox";
847 #mbox-cells = <1>;
848 ti,mbox-num-users = <4>;
849 ti,mbox-num-fifos = <16>;
854 compatible = "ti,am64-mailbox";
858 #mbox-cells = <1>;
859 ti,mbox-num-users = <4>;
860 ti,mbox-num-fifos = <16>;
865 compatible = "ti,am64-mailbox";
869 #mbox-cells = <1>;
870 ti,mbox-num-users = <4>;
871 ti,mbox-num-fifos = <16>;
876 compatible = "ti,am64-mailbox";
879 #mbox-cells = <1>;
880 ti,mbox-num-users = <4>;
881 ti,mbox-num-fifos = <16>;
886 compatible = "ti,am64-mailbox";
889 #mbox-cells = <1>;
890 ti,mbox-num-users = <4>;
891 ti,mbox-num-fifos = <16>;
896 compatible = "ti,am64-r5fss";
897 ti,cluster-mode = <0>;
898 #address-cells = <1>;
899 #size-cells = <1>;
904 power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
907 compatible = "ti,am64-r5f";
910 reg-names = "atcm", "btcm";
912 ti,sci-dev-id = <121>;
913 ti,sci-proc-ids = <0x01 0xff>;
915 firmware-name = "am64-main-r5f0_0-fw";
916 ti,atcm-enable = <1>;
917 ti,btcm-enable = <1>;
922 compatible = "ti,am64-r5f";
925 reg-names = "atcm", "btcm";
927 ti,sci-dev-id = <122>;
928 ti,sci-proc-ids = <0x02 0xff>;
930 firmware-name = "am64-main-r5f0_1-fw";
931 ti,atcm-enable = <1>;
932 ti,btcm-enable = <1>;
938 compatible = "ti,am64-r5fss";
939 ti,cluster-mode = <0>;
940 #address-cells = <1>;
941 #size-cells = <1>;
946 power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
949 compatible = "ti,am64-r5f";
952 reg-names = "atcm", "btcm";
954 ti,sci-dev-id = <123>;
955 ti,sci-proc-ids = <0x06 0xff>;
957 firmware-name = "am64-main-r5f1_0-fw";
958 ti,atcm-enable = <1>;
959 ti,btcm-enable = <1>;
964 compatible = "ti,am64-r5f";
967 reg-names = "atcm", "btcm";
969 ti,sci-dev-id = <124>;
970 ti,sci-proc-ids = <0x07 0xff>;
972 firmware-name = "am64-main-r5f1_1-fw";
973 ti,atcm-enable = <1>;
974 ti,btcm-enable = <1>;
980 compatible = "ti,am64-wiz-10g";
981 #address-cells = <1>;
982 #size-cells = <1>;
983 power-domains = <&k3_pds 162 TI_SCI_PD_EXCLUSIVE>;
985 clock-names = "fck", "core_ref_clk", "ext_ref_clk";
986 num-lanes = <1>;
987 #reset-cells = <1>;
988 #clock-cells = <1>;
991 assigned-clocks = <&k3_clks 162 1>;
992 assigned-clock-parents = <&k3_clks 162 5>;
995 compatible = "ti,j721e-serdes-10g";
997 reg-names = "torrent_phy";
999 reset-names = "torrent_reset";
1002 clock-names = "refclk", "phy_en_refclk";
1003 assigned-clocks = <&serdes_wiz0 TI_WIZ_PLL0_REFCLK>,
1006 assigned-clock-parents = <&k3_clks 162 1>,
1009 #address-cells = <1>;
1010 #size-cells = <0>;
1011 #clock-cells = <1>;
1016 compatible = "ti,am64-pcie-host", "ti,j721e-pcie-host";
1021 reg-names = "intd_cfg", "user_cfg", "reg", "cfg";
1022 interrupt-names = "link_state";
1025 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
1026 max-link-speed = <2>;
1027 num-lanes = <1>;
1028 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
1030 clock-names = "fck", "pcie_refclk";
1031 #address-cells = <3>;
1032 #size-cells = <2>;
1033 bus-range = <0x0 0xff>;
1034 cdns,no-bar-match-nbits = <64>;
1035 vendor-id = <0x104c>;
1036 device-id = <0xb010>;
1037 msi-map = <0x0 &gic_its 0x0 0x10000>;
1040 dma-ranges = <0x02000000 0x0 0x0 0x0 0x0 0x00000010 0x0>;
1044 pcie0_ep: pcie-ep@f102000 {
1045 compatible = "ti,am64-pcie-ep", "ti,j721e-pcie-ep";
1050 reg-names = "intd_cfg", "user_cfg", "reg", "mem";
1051 interrupt-names = "link_state";
1053 ti,syscon-pcie-ctrl = <&main_conf 0x4070>;
1054 max-link-speed = <2>;
1055 num-lanes = <1>;
1056 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
1058 clock-names = "fck";
1059 max-functions = /bits/ 8 <1>;
1063 epwm0: pwm@23000000 {
1064 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1065 #pwm-cells = <3>;
1067 power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
1069 clock-names = "tbclk", "fck";
1073 epwm1: pwm@23010000 {
1074 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1075 #pwm-cells = <3>;
1077 power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
1079 clock-names = "tbclk", "fck";
1083 epwm2: pwm@23020000 {
1084 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1085 #pwm-cells = <3>;
1087 power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
1089 clock-names = "tbclk", "fck";
1093 epwm3: pwm@23030000 {
1094 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1095 #pwm-cells = <3>;
1097 power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
1099 clock-names = "tbclk", "fck";
1103 epwm4: pwm@23040000 {
1104 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1105 #pwm-cells = <3>;
1107 power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
1109 clock-names = "tbclk", "fck";
1113 epwm5: pwm@23050000 {
1114 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1115 #pwm-cells = <3>;
1117 power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
1119 clock-names = "tbclk", "fck";
1123 epwm6: pwm@23060000 {
1124 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1125 #pwm-cells = <3>;
1127 power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
1129 clock-names = "tbclk", "fck";
1133 epwm7: pwm@23070000 {
1134 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1135 #pwm-cells = <3>;
1137 power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
1139 clock-names = "tbclk", "fck";
1143 epwm8: pwm@23080000 {
1144 compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
1145 #pwm-cells = <3>;
1147 power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
1149 clock-names = "tbclk", "fck";
1153 ecap0: pwm@23100000 {
1154 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1155 #pwm-cells = <3>;
1157 power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
1159 clock-names = "fck";
1163 ecap1: pwm@23110000 {
1164 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1165 #pwm-cells = <3>;
1167 power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
1169 clock-names = "fck";
1173 ecap2: pwm@23120000 {
1174 compatible = "ti,am64-ecap", "ti,am3352-ecap";
1175 #pwm-cells = <3>;
1177 power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
1179 clock-names = "fck";
1184 compatible = "ti,j7-rti-wdt";
1187 power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
1188 assigned-clocks = <&k3_clks 125 0>;
1189 assigned-clock-parents = <&k3_clks 125 2>;
1193 compatible = "ti,j7-rti-wdt";
1196 power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
1197 assigned-clocks = <&k3_clks 126 0>;
1198 assigned-clock-parents = <&k3_clks 126 2>;
1202 compatible = "ti,am642-icssg";
1204 power-domains = <&k3_pds 81 TI_SCI_PD_EXCLUSIVE>;
1205 #address-cells = <1>;
1206 #size-cells = <1>;
1213 reg-names = "dram0", "dram1", "shrdram2";
1217 compatible = "ti,pruss-cfg", "syscon";
1219 #address-cells = <1>;
1220 #size-cells = <1>;
1224 #address-cells = <1>;
1225 #size-cells = <0>;
1227 icssg0_coreclk_mux: coreclk-mux@3c {
1229 #clock-cells = <0>;
1232 assigned-clocks = <&icssg0_coreclk_mux>;
1233 assigned-clock-parents = <&k3_clks 81 20>;
1236 icssg0_iepclk_mux: iepclk-mux@30 {
1238 #clock-cells = <0>;
1241 assigned-clocks = <&icssg0_iepclk_mux>;
1242 assigned-clock-parents = <&icssg0_coreclk_mux>;
1247 icssg0_mii_rt: mii-rt@32000 {
1248 compatible = "ti,pruss-mii", "syscon";
1252 icssg0_mii_g_rt: mii-g-rt@33000 {
1253 compatible = "ti,pruss-mii-g", "syscon";
1257 icssg0_intc: interrupt-controller@20000 {
1258 compatible = "ti,icssg-intc";
1260 interrupt-controller;
1261 #interrupt-cells = <3>;
1270 interrupt-names = "host_intr0", "host_intr1",
1277 compatible = "ti,am642-pru";
1281 reg-names = "iram", "control", "debug";
1282 firmware-name = "am64x-pru0_0-fw";
1286 compatible = "ti,am642-rtu";
1290 reg-names = "iram", "control", "debug";
1291 firmware-name = "am64x-rtu0_0-fw";
1295 compatible = "ti,am642-tx-pru";
1299 reg-names = "iram", "control", "debug";
1300 firmware-name = "am64x-txpru0_0-fw";
1304 compatible = "ti,am642-pru";
1308 reg-names = "iram", "control", "debug";
1309 firmware-name = "am64x-pru0_1-fw";
1313 compatible = "ti,am642-rtu";
1317 reg-names = "iram", "control", "debug";
1318 firmware-name = "am64x-rtu0_1-fw";
1322 compatible = "ti,am642-tx-pru";
1326 reg-names = "iram", "control", "debug";
1327 firmware-name = "am64x-txpru0_1-fw";
1334 clock-names = "fck";
1335 #address-cells = <1>;
1336 #size-cells = <0>;
1343 compatible = "ti,am642-icssg";
1345 power-domains = <&k3_pds 82 TI_SCI_PD_EXCLUSIVE>;
1346 #address-cells = <1>;
1347 #size-cells = <1>;
1354 reg-names = "dram0", "dram1", "shrdram2";
1358 compatible = "ti,pruss-cfg", "syscon";
1360 #address-cells = <1>;
1361 #size-cells = <1>;
1365 #address-cells = <1>;
1366 #size-cells = <0>;
1368 icssg1_coreclk_mux: coreclk-mux@3c {
1370 #clock-cells = <0>;
1373 assigned-clocks = <&icssg1_coreclk_mux>;
1374 assigned-clock-parents = <&k3_clks 82 20>;
1377 icssg1_iepclk_mux: iepclk-mux@30 {
1379 #clock-cells = <0>;
1382 assigned-clocks = <&icssg1_iepclk_mux>;
1383 assigned-clock-parents = <&icssg1_coreclk_mux>;
1388 icssg1_mii_rt: mii-rt@32000 {
1389 compatible = "ti,pruss-mii", "syscon";
1393 icssg1_mii_g_rt: mii-g-rt@33000 {
1394 compatible = "ti,pruss-mii-g", "syscon";
1398 icssg1_intc: interrupt-controller@20000 {
1399 compatible = "ti,icssg-intc";
1401 interrupt-controller;
1402 #interrupt-cells = <3>;
1411 interrupt-names = "host_intr0", "host_intr1",
1418 compatible = "ti,am642-pru";
1422 reg-names = "iram", "control", "debug";
1423 firmware-name = "am64x-pru1_0-fw";
1427 compatible = "ti,am642-rtu";
1431 reg-names = "iram", "control", "debug";
1432 firmware-name = "am64x-rtu1_0-fw";
1436 compatible = "ti,am642-tx-pru";
1440 reg-names = "iram", "control", "debug";
1441 firmware-name = "am64x-txpru1_0-fw";
1445 compatible = "ti,am642-pru";
1449 reg-names = "iram", "control", "debug";
1450 firmware-name = "am64x-pru1_1-fw";
1454 compatible = "ti,am642-rtu";
1458 reg-names = "iram", "control", "debug";
1459 firmware-name = "am64x-rtu1_1-fw";
1463 compatible = "ti,am642-tx-pru";
1467 reg-names = "iram", "control", "debug";
1468 firmware-name = "am64x-txpru1_1-fw";
1474 #address-cells = <1>;
1475 #size-cells = <0>;
1477 clock-names = "fck";
1487 reg-names = "m_can", "message_ram";
1488 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
1490 clock-names = "hclk", "cclk";
1493 interrupt-names = "int0", "int1";
1494 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1502 reg-names = "m_can", "message_ram";
1503 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
1505 clock-names = "hclk", "cclk";
1508 interrupt-names = "int0", "int1";
1509 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
1514 compatible = "ti,am64-sa2ul";
1516 power-domains = <&k3_pds 133 TI_SCI_PD_SHARED>;
1517 #address-cells = <2>;
1518 #size-cells = <2>;
1522 dma-names = "tx", "rx1", "rx2";
1525 compatible = "inside-secure,safexcel-eip76";
1528 status = "disabled"; /* Used by OP-TEE */
1532 gpmc0: memory-controller@3b000000 {
1533 compatible = "ti,am64-gpmc";
1534 power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
1536 clock-names = "fck";
1539 reg-names = "cfg", "data";
1541 gpmc,num-cs = <3>;
1542 gpmc,num-waitpins = <2>;
1543 #address-cells = <2>;
1544 #size-cells = <1>;
1545 interrupt-controller;
1546 #interrupt-cells = <2>;
1547 gpio-controller;
1548 #gpio-cells = <2>;
1553 compatible = "ti,am64-elm";
1556 power-domains = <&k3_pds 54 TI_SCI_PD_EXCLUSIVE>;
1558 clock-names = "fck";
1562 main_vtm0: temperature-sensor@b00000 {
1563 compatible = "ti,j7200-vtm";
1566 power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
1567 #thermal-sensor-cells = <1>;