Lines Matching +full:timer +full:- +full:pwm
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp1-clks.h>
8 #include <dt-bindings/reset/stm32mp1-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
20 clock-frequency = <650000000>;
26 arm-pmu {
27 compatible = "arm,cortex-a7-pmu";
29 interrupt-affinity = <&cpu0>;
30 interrupt-parent = <&intc>;
34 compatible = "arm,psci-1.0";
38 intc: interrupt-controller@a0021000 {
39 compatible = "arm,cortex-a7-gic";
40 #interrupt-cells = <3>;
41 interrupt-controller;
46 timer {
47 compatible = "arm,armv7-timer";
52 interrupt-parent = <&intc>;
56 clk_hse: clk-hse {
57 #clock-cells = <0>;
58 compatible = "fixed-clock";
59 clock-frequency = <24000000>;
62 clk_hsi: clk-hsi {
63 #clock-cells = <0>;
64 compatible = "fixed-clock";
65 clock-frequency = <64000000>;
68 clk_lse: clk-lse {
69 #clock-cells = <0>;
70 compatible = "fixed-clock";
71 clock-frequency = <32768>;
74 clk_lsi: clk-lsi {
75 #clock-cells = <0>;
76 compatible = "fixed-clock";
77 clock-frequency = <32000>;
80 clk_csi: clk-csi {
81 #clock-cells = <0>;
82 compatible = "fixed-clock";
83 clock-frequency = <4000000>;
87 thermal-zones {
88 cpu_thermal: cpu-thermal {
89 polling-delay-passive = <0>;
90 polling-delay = <0>;
91 thermal-sensors = <&dts>;
94 cpu_alert1: cpu-alert1 {
100 cpu-crit {
107 cooling-maps {
112 booster: regulator-booster {
113 compatible = "st,stm32mp1-booster";
119 compatible = "simple-bus";
120 #address-cells = <1>;
121 #size-cells = <1>;
122 interrupt-parent = <&intc>;
125 timers2: timer@40000000 {
126 #address-cells = <1>;
127 #size-cells = <0>;
128 compatible = "st,stm32-timers";
131 interrupt-names = "global";
133 clock-names = "int";
139 dma-names = "ch1", "ch2", "ch3", "ch4", "up";
142 pwm {
143 compatible = "st,stm32-pwm";
144 #pwm-cells = <3>;
148 timer@1 {
149 compatible = "st,stm32h7-timer-trigger";
155 compatible = "st,stm32-timer-counter";
160 timers3: timer@40001000 {
161 #address-cells = <1>;
162 #size-cells = <0>;
163 compatible = "st,stm32-timers";
166 interrupt-names = "global";
168 clock-names = "int";
175 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
178 pwm {
179 compatible = "st,stm32-pwm";
180 #pwm-cells = <3>;
184 timer@2 {
185 compatible = "st,stm32h7-timer-trigger";
191 compatible = "st,stm32-timer-counter";
196 timers4: timer@40002000 {
197 #address-cells = <1>;
198 #size-cells = <0>;
199 compatible = "st,stm32-timers";
202 interrupt-names = "global";
204 clock-names = "int";
209 dma-names = "ch1", "ch2", "ch3", "ch4";
212 pwm {
213 compatible = "st,stm32-pwm";
214 #pwm-cells = <3>;
218 timer@3 {
219 compatible = "st,stm32h7-timer-trigger";
225 compatible = "st,stm32-timer-counter";
230 timers5: timer@40003000 {
231 #address-cells = <1>;
232 #size-cells = <0>;
233 compatible = "st,stm32-timers";
236 interrupt-names = "global";
238 clock-names = "int";
245 dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig";
248 pwm {
249 compatible = "st,stm32-pwm";
250 #pwm-cells = <3>;
254 timer@4 {
255 compatible = "st,stm32h7-timer-trigger";
261 compatible = "st,stm32-timer-counter";
266 timers6: timer@40004000 {
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "st,stm32-timers";
272 interrupt-names = "global";
274 clock-names = "int";
276 dma-names = "up";
279 timer@5 {
280 compatible = "st,stm32h7-timer-trigger";
286 timers7: timer@40005000 {
287 #address-cells = <1>;
288 #size-cells = <0>;
289 compatible = "st,stm32-timers";
292 interrupt-names = "global";
294 clock-names = "int";
296 dma-names = "up";
299 timer@6 {
300 compatible = "st,stm32h7-timer-trigger";
306 timers12: timer@40006000 {
307 #address-cells = <1>;
308 #size-cells = <0>;
309 compatible = "st,stm32-timers";
312 interrupt-names = "global";
314 clock-names = "int";
317 pwm {
318 compatible = "st,stm32-pwm";
319 #pwm-cells = <3>;
323 timer@11 {
324 compatible = "st,stm32h7-timer-trigger";
330 timers13: timer@40007000 {
331 #address-cells = <1>;
332 #size-cells = <0>;
333 compatible = "st,stm32-timers";
336 interrupt-names = "global";
338 clock-names = "int";
341 pwm {
342 compatible = "st,stm32-pwm";
343 #pwm-cells = <3>;
347 timer@12 {
348 compatible = "st,stm32h7-timer-trigger";
354 timers14: timer@40008000 {
355 #address-cells = <1>;
356 #size-cells = <0>;
357 compatible = "st,stm32-timers";
360 interrupt-names = "global";
362 clock-names = "int";
365 pwm {
366 compatible = "st,stm32-pwm";
367 #pwm-cells = <3>;
371 timer@13 {
372 compatible = "st,stm32h7-timer-trigger";
378 lptimer1: timer@40009000 {
379 #address-cells = <1>;
380 #size-cells = <0>;
381 compatible = "st,stm32-lptimer";
383 interrupts-extended = <&exti 47 IRQ_TYPE_LEVEL_HIGH>;
385 clock-names = "mux";
386 wakeup-source;
389 pwm {
390 compatible = "st,stm32-pwm-lp";
391 #pwm-cells = <3>;
396 compatible = "st,stm32-lptimer-trigger";
402 compatible = "st,stm32-lptimer-counter";
408 #address-cells = <1>;
409 #size-cells = <0>;
410 compatible = "st,stm32h7-spi";
417 dma-names = "rx", "tx";
421 i2s2: audio-controller@4000b000 {
422 compatible = "st,stm32h7-i2s";
423 #sound-dai-cells = <0>;
428 dma-names = "rx", "tx";
433 #address-cells = <1>;
434 #size-cells = <0>;
435 compatible = "st,stm32h7-spi";
442 dma-names = "rx", "tx";
446 i2s3: audio-controller@4000c000 {
447 compatible = "st,stm32h7-i2s";
448 #sound-dai-cells = <0>;
453 dma-names = "rx", "tx";
457 spdifrx: audio-controller@4000d000 {
458 compatible = "st,stm32h7-spdifrx";
459 #sound-dai-cells = <0>;
462 clock-names = "kclk";
466 dma-names = "rx", "rx-ctrl";
471 compatible = "st,stm32h7-uart";
473 interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>;
475 wakeup-source;
478 dma-names = "rx", "tx";
483 compatible = "st,stm32h7-uart";
485 interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>;
487 wakeup-source;
490 dma-names = "rx", "tx";
495 compatible = "st,stm32h7-uart";
497 interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>;
499 wakeup-source;
502 dma-names = "rx", "tx";
507 compatible = "st,stm32h7-uart";
509 interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>;
511 wakeup-source;
514 dma-names = "rx", "tx";
519 compatible = "st,stm32mp15-i2c";
521 interrupt-names = "event", "error";
526 #address-cells = <1>;
527 #size-cells = <0>;
528 st,syscfg-fmp = <&syscfg 0x4 0x1>;
529 wakeup-source;
530 i2c-analog-filter;
535 compatible = "st,stm32mp15-i2c";
537 interrupt-names = "event", "error";
542 #address-cells = <1>;
543 #size-cells = <0>;
544 st,syscfg-fmp = <&syscfg 0x4 0x2>;
545 wakeup-source;
546 i2c-analog-filter;
551 compatible = "st,stm32mp15-i2c";
553 interrupt-names = "event", "error";
558 #address-cells = <1>;
559 #size-cells = <0>;
560 st,syscfg-fmp = <&syscfg 0x4 0x4>;
561 wakeup-source;
562 i2c-analog-filter;
567 compatible = "st,stm32mp15-i2c";
569 interrupt-names = "event", "error";
574 #address-cells = <1>;
575 #size-cells = <0>;
576 st,syscfg-fmp = <&syscfg 0x4 0x10>;
577 wakeup-source;
578 i2c-analog-filter;
583 compatible = "st,stm32-cec";
587 clock-names = "cec", "hdmi-cec";
592 compatible = "st,stm32h7-dac-core";
595 clock-names = "pclk";
596 #address-cells = <1>;
597 #size-cells = <0>;
601 compatible = "st,stm32-dac";
602 #io-channel-cells = <1>;
608 compatible = "st,stm32-dac";
609 #io-channel-cells = <1>;
616 compatible = "st,stm32h7-uart";
618 interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>;
620 wakeup-source;
623 dma-names = "rx", "tx";
628 compatible = "st,stm32h7-uart";
630 interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>;
632 wakeup-source;
635 dma-names = "rx", "tx";
639 timers1: timer@44000000 {
640 #address-cells = <1>;
641 #size-cells = <0>;
642 compatible = "st,stm32-timers";
648 interrupt-names = "brk", "up", "trg-com", "cc";
650 clock-names = "int";
658 dma-names = "ch1", "ch2", "ch3", "ch4",
662 pwm {
663 compatible = "st,stm32-pwm";
664 #pwm-cells = <3>;
668 timer@0 {
669 compatible = "st,stm32h7-timer-trigger";
675 compatible = "st,stm32-timer-counter";
680 timers8: timer@44001000 {
681 #address-cells = <1>;
682 #size-cells = <0>;
683 compatible = "st,stm32-timers";
689 interrupt-names = "brk", "up", "trg-com", "cc";
691 clock-names = "int";
699 dma-names = "ch1", "ch2", "ch3", "ch4",
703 pwm {
704 compatible = "st,stm32-pwm";
705 #pwm-cells = <3>;
709 timer@7 {
710 compatible = "st,stm32h7-timer-trigger";
716 compatible = "st,stm32-timer-counter";
722 compatible = "st,stm32h7-uart";
724 interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>;
726 wakeup-source;
729 dma-names = "rx", "tx";
734 #address-cells = <1>;
735 #size-cells = <0>;
736 compatible = "st,stm32h7-spi";
743 dma-names = "rx", "tx";
747 i2s1: audio-controller@44004000 {
748 compatible = "st,stm32h7-i2s";
749 #sound-dai-cells = <0>;
754 dma-names = "rx", "tx";
759 #address-cells = <1>;
760 #size-cells = <0>;
761 compatible = "st,stm32h7-spi";
768 dma-names = "rx", "tx";
772 timers15: timer@44006000 {
773 #address-cells = <1>;
774 #size-cells = <0>;
775 compatible = "st,stm32-timers";
778 interrupt-names = "global";
780 clock-names = "int";
785 dma-names = "ch1", "up", "trig", "com";
788 pwm {
789 compatible = "st,stm32-pwm";
790 #pwm-cells = <3>;
794 timer@14 {
795 compatible = "st,stm32h7-timer-trigger";
801 timers16: timer@44007000 {
802 #address-cells = <1>;
803 #size-cells = <0>;
804 compatible = "st,stm32-timers";
807 interrupt-names = "global";
809 clock-names = "int";
812 dma-names = "ch1", "up";
815 pwm {
816 compatible = "st,stm32-pwm";
817 #pwm-cells = <3>;
820 timer@15 {
821 compatible = "st,stm32h7-timer-trigger";
827 timers17: timer@44008000 {
828 #address-cells = <1>;
829 #size-cells = <0>;
830 compatible = "st,stm32-timers";
833 interrupt-names = "global";
835 clock-names = "int";
838 dma-names = "ch1", "up";
841 pwm {
842 compatible = "st,stm32-pwm";
843 #pwm-cells = <3>;
847 timer@16 {
848 compatible = "st,stm32h7-timer-trigger";
855 #address-cells = <1>;
856 #size-cells = <0>;
857 compatible = "st,stm32h7-spi";
864 dma-names = "rx", "tx";
869 compatible = "st,stm32h7-sai";
870 #address-cells = <1>;
871 #size-cells = <1>;
878 sai1a: audio-controller@4400a004 {
879 #sound-dai-cells = <0>;
881 compatible = "st,stm32-sai-sub-a";
884 clock-names = "sai_ck";
889 sai1b: audio-controller@4400a024 {
890 #sound-dai-cells = <0>;
891 compatible = "st,stm32-sai-sub-b";
894 clock-names = "sai_ck";
901 compatible = "st,stm32h7-sai";
902 #address-cells = <1>;
903 #size-cells = <1>;
910 sai2a: audio-controller@4400b004 {
911 #sound-dai-cells = <0>;
912 compatible = "st,stm32-sai-sub-a";
915 clock-names = "sai_ck";
920 sai2b: audio-controller@4400b024 {
921 #sound-dai-cells = <0>;
922 compatible = "st,stm32-sai-sub-b";
925 clock-names = "sai_ck";
932 compatible = "st,stm32h7-sai";
933 #address-cells = <1>;
934 #size-cells = <1>;
941 sai3a: audio-controller@4400c004 {
942 #sound-dai-cells = <0>;
943 compatible = "st,stm32-sai-sub-a";
946 clock-names = "sai_ck";
951 sai3b: audio-controller@4400c024 {
952 #sound-dai-cells = <0>;
953 compatible = "st,stm32-sai-sub-b";
956 clock-names = "sai_ck";
963 compatible = "st,stm32mp1-dfsdm";
966 clock-names = "dfsdm";
967 #address-cells = <1>;
968 #size-cells = <0>;
972 compatible = "st,stm32-dfsdm-adc";
973 #io-channel-cells = <1>;
977 dma-names = "rx";
982 compatible = "st,stm32-dfsdm-adc";
983 #io-channel-cells = <1>;
987 dma-names = "rx";
992 compatible = "st,stm32-dfsdm-adc";
993 #io-channel-cells = <1>;
997 dma-names = "rx";
1002 compatible = "st,stm32-dfsdm-adc";
1003 #io-channel-cells = <1>;
1007 dma-names = "rx";
1012 compatible = "st,stm32-dfsdm-adc";
1013 #io-channel-cells = <1>;
1017 dma-names = "rx";
1022 compatible = "st,stm32-dfsdm-adc";
1023 #io-channel-cells = <1>;
1027 dma-names = "rx";
1032 dma1: dma-controller@48000000 {
1033 compatible = "st,stm32-dma";
1045 #dma-cells = <4>;
1047 dma-requests = <8>;
1050 dma2: dma-controller@48001000 {
1051 compatible = "st,stm32-dma";
1063 #dma-cells = <4>;
1065 dma-requests = <8>;
1068 dmamux1: dma-router@48002000 {
1069 compatible = "st,stm32h7-dmamux";
1071 #dma-cells = <3>;
1072 dma-requests = <128>;
1073 dma-masters = <&dma1 &dma2>;
1074 dma-channels = <16>;
1080 compatible = "st,stm32mp1-adc-core";
1085 clock-names = "bus", "adc";
1086 interrupt-controller;
1088 #interrupt-cells = <1>;
1089 #address-cells = <1>;
1090 #size-cells = <0>;
1094 compatible = "st,stm32mp1-adc";
1095 #io-channel-cells = <1>;
1096 #address-cells = <1>;
1097 #size-cells = <0>;
1099 interrupt-parent = <&adc>;
1102 dma-names = "rx";
1107 compatible = "st,stm32mp1-adc";
1108 #io-channel-cells = <1>;
1109 #address-cells = <1>;
1110 #size-cells = <0>;
1112 interrupt-parent = <&adc>;
1115 dma-names = "rx";
1116 nvmem-cells = <&vrefint>;
1117 nvmem-cell-names = "vrefint";
1131 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1132 arm,primecell-periphid = <0x00253180>;
1136 clock-names = "apb_pclk";
1138 cap-sd-highspeed;
1139 cap-mmc-highspeed;
1140 max-frequency = <120000000>;
1144 usbotg_hs: usb-otg@49000000 {
1145 compatible = "st,stm32mp15-hsotg", "snps,dwc2";
1148 clock-names = "otg", "utmi";
1150 reset-names = "dwc2";
1152 g-rx-fifo-size = <512>;
1153 g-np-tx-fifo-size = <32>;
1154 g-tx-fifo-size = <256 16 16 16 16 16 16 16>;
1156 otg-rev = <0x200>;
1157 usb33d-supply = <&usb33>;
1162 compatible = "st,stm32mp1-ipcc";
1163 #mbox-cells = <1>;
1165 st,proc-id = <0>;
1166 interrupts-extended =
1169 interrupt-names = "rx", "tx";
1171 wakeup-source;
1176 compatible = "st,stm32-dcmi";
1181 clock-names = "mclk";
1183 dma-names = "tx";
1188 compatible = "st,stm32mp1-rcc", "syscon";
1190 #clock-cells = <1>;
1191 #reset-cells = <1>;
1195 compatible = "st,stm32mp1,pwr-reg";
1199 regulator-name = "reg11";
1200 regulator-min-microvolt = <1100000>;
1201 regulator-max-microvolt = <1100000>;
1205 regulator-name = "reg18";
1206 regulator-min-microvolt = <1800000>;
1207 regulator-max-microvolt = <1800000>;
1211 regulator-name = "usb33";
1212 regulator-min-microvolt = <3300000>;
1213 regulator-max-microvolt = <3300000>;
1218 compatible = "st,stm32mp151-pwr-mcu", "syscon";
1222 exti: interrupt-controller@5000d000 {
1223 compatible = "st,stm32mp1-exti", "syscon";
1224 interrupt-controller;
1225 #interrupt-cells = <2>;
1230 compatible = "st,stm32mp157-syscfg", "syscon";
1235 lptimer2: timer@50021000 {
1236 #address-cells = <1>;
1237 #size-cells = <0>;
1238 compatible = "st,stm32-lptimer";
1240 interrupts-extended = <&exti 48 IRQ_TYPE_LEVEL_HIGH>;
1242 clock-names = "mux";
1243 wakeup-source;
1246 pwm {
1247 compatible = "st,stm32-pwm-lp";
1248 #pwm-cells = <3>;
1253 compatible = "st,stm32-lptimer-trigger";
1259 compatible = "st,stm32-lptimer-counter";
1264 lptimer3: timer@50022000 {
1265 #address-cells = <1>;
1266 #size-cells = <0>;
1267 compatible = "st,stm32-lptimer";
1269 interrupts-extended = <&exti 50 IRQ_TYPE_LEVEL_HIGH>;
1271 clock-names = "mux";
1272 wakeup-source;
1275 pwm {
1276 compatible = "st,stm32-pwm-lp";
1277 #pwm-cells = <3>;
1282 compatible = "st,stm32-lptimer-trigger";
1288 lptimer4: timer@50023000 {
1289 compatible = "st,stm32-lptimer";
1291 interrupts-extended = <&exti 52 IRQ_TYPE_LEVEL_HIGH>;
1293 clock-names = "mux";
1294 wakeup-source;
1297 pwm {
1298 compatible = "st,stm32-pwm-lp";
1299 #pwm-cells = <3>;
1304 lptimer5: timer@50024000 {
1305 compatible = "st,stm32-lptimer";
1307 interrupts-extended = <&exti 53 IRQ_TYPE_LEVEL_HIGH>;
1309 clock-names = "mux";
1310 wakeup-source;
1313 pwm {
1314 compatible = "st,stm32-pwm-lp";
1315 #pwm-cells = <3>;
1321 compatible = "st,stm32-vrefbuf";
1323 regulator-min-microvolt = <1500000>;
1324 regulator-max-microvolt = <2500000>;
1330 compatible = "st,stm32h7-sai";
1331 #address-cells = <1>;
1332 #size-cells = <1>;
1339 sai4a: audio-controller@50027004 {
1340 #sound-dai-cells = <0>;
1341 compatible = "st,stm32-sai-sub-a";
1344 clock-names = "sai_ck";
1349 sai4b: audio-controller@50027024 {
1350 #sound-dai-cells = <0>;
1351 compatible = "st,stm32-sai-sub-b";
1354 clock-names = "sai_ck";
1361 compatible = "st,stm32-thermal";
1365 clock-names = "pclk";
1366 #thermal-sensor-cells = <0>;
1371 compatible = "st,stm32f756-hash";
1377 dma-names = "in";
1378 dma-maxburst = <2>;
1383 compatible = "st,stm32-rng";
1390 mdma1: dma-controller@58000000 {
1391 compatible = "st,stm32h7-mdma";
1396 #dma-cells = <5>;
1397 dma-channels = <32>;
1398 dma-requests = <48>;
1401 fmc: memory-controller@58002000 {
1402 #address-cells = <2>;
1403 #size-cells = <1>;
1404 compatible = "st,stm32mp1-fmc2-ebi";
1416 nand-controller@4,0 {
1417 #address-cells = <1>;
1418 #size-cells = <0>;
1419 compatible = "st,stm32mp1-fmc2-nfc";
1430 dma-names = "tx", "rx", "ecc";
1436 compatible = "st,stm32f469-qspi";
1438 reg-names = "qspi", "qspi_mm";
1442 dma-names = "tx", "rx";
1445 #address-cells = <1>;
1446 #size-cells = <0>;
1451 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1452 arm,primecell-periphid = <0x00253180>;
1456 clock-names = "apb_pclk";
1458 cap-sd-highspeed;
1459 cap-mmc-highspeed;
1460 max-frequency = <120000000>;
1465 compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell";
1466 arm,primecell-periphid = <0x00253180>;
1470 clock-names = "apb_pclk";
1472 cap-sd-highspeed;
1473 cap-mmc-highspeed;
1474 max-frequency = <120000000>;
1479 compatible = "st,stm32f7-crc";
1486 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
1488 reg-names = "stmmaceth";
1489 interrupts-extended = <&intc GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
1490 interrupt-names = "macirq";
1491 clock-names = "stmmaceth",
1492 "mac-clk-tx",
1493 "mac-clk-rx",
1494 "eth-ck",
1504 snps,mixed-burst;
1506 snps,en-tx-lpi-clockgating;
1507 snps,axi-config = <&stmmac_axi_config_0>;
1511 stmmac_axi_config_0: stmmac-axi-config {
1519 compatible = "generic-ohci";
1525 phy-names = "usb";
1530 compatible = "generic-ehci";
1537 phy-names = "usb";
1541 ltdc: display-controller@5a001000 {
1542 compatible = "st,stm32-ltdc";
1547 clock-names = "lcd";
1553 compatible = "st,stm32mp1-iwdg";
1556 clock-names = "pclk", "lsi";
1561 #address-cells = <1>;
1562 #size-cells = <0>;
1563 #clock-cells = <0>;
1564 compatible = "st,stm32mp1-usbphyc";
1568 vdda1v1-supply = <®11>;
1569 vdda1v8-supply = <®18>;
1572 usbphyc_port0: usb-phy@0 {
1573 #phy-cells = <0>;
1577 usbphyc_port1: usb-phy@1 {
1578 #phy-cells = <1>;
1584 compatible = "st,stm32h7-uart";
1586 interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>;
1588 wakeup-source;
1593 #address-cells = <1>;
1594 #size-cells = <0>;
1595 compatible = "st,stm32h7-spi";
1602 dma-names = "rx", "tx";
1607 compatible = "st,stm32mp15-i2c";
1609 interrupt-names = "event", "error";
1614 #address-cells = <1>;
1615 #size-cells = <0>;
1616 st,syscfg-fmp = <&syscfg 0x4 0x8>;
1617 wakeup-source;
1618 i2c-analog-filter;
1623 compatible = "st,stm32mp1-rtc";
1626 clock-names = "pclk", "rtc_ck";
1627 interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
1632 compatible = "st,stm32mp15-bsec";
1634 #address-cells = <1>;
1635 #size-cells = <1>;
1636 part_number_otp: part-number-otp@4 {
1639 vrefint: vrefin-cal@52 {
1651 compatible = "st,stm32mp15-i2c";
1653 interrupt-names = "event", "error";
1658 #address-cells = <1>;
1659 #size-cells = <0>;
1660 st,syscfg-fmp = <&syscfg 0x4 0x20>;
1661 wakeup-source;
1662 i2c-analog-filter;
1667 compatible = "st,stm32-tamp", "syscon", "simple-mfd";
1676 #address-cells = <1>;
1677 #size-cells = <1>;
1678 compatible = "st,stm32mp157-pinctrl";
1680 interrupt-parent = <&exti>;
1684 gpio-controller;
1685 #gpio-cells = <2>;
1686 interrupt-controller;
1687 #interrupt-cells = <2>;
1690 st,bank-name = "GPIOA";
1695 gpio-controller;
1696 #gpio-cells = <2>;
1697 interrupt-controller;
1698 #interrupt-cells = <2>;
1701 st,bank-name = "GPIOB";
1706 gpio-controller;
1707 #gpio-cells = <2>;
1708 interrupt-controller;
1709 #interrupt-cells = <2>;
1712 st,bank-name = "GPIOC";
1717 gpio-controller;
1718 #gpio-cells = <2>;
1719 interrupt-controller;
1720 #interrupt-cells = <2>;
1723 st,bank-name = "GPIOD";
1728 gpio-controller;
1729 #gpio-cells = <2>;
1730 interrupt-controller;
1731 #interrupt-cells = <2>;
1734 st,bank-name = "GPIOE";
1739 gpio-controller;
1740 #gpio-cells = <2>;
1741 interrupt-controller;
1742 #interrupt-cells = <2>;
1745 st,bank-name = "GPIOF";
1750 gpio-controller;
1751 #gpio-cells = <2>;
1752 interrupt-controller;
1753 #interrupt-cells = <2>;
1756 st,bank-name = "GPIOG";
1761 gpio-controller;
1762 #gpio-cells = <2>;
1763 interrupt-controller;
1764 #interrupt-cells = <2>;
1767 st,bank-name = "GPIOH";
1772 gpio-controller;
1773 #gpio-cells = <2>;
1774 interrupt-controller;
1775 #interrupt-cells = <2>;
1778 st,bank-name = "GPIOI";
1783 gpio-controller;
1784 #gpio-cells = <2>;
1785 interrupt-controller;
1786 #interrupt-cells = <2>;
1789 st,bank-name = "GPIOJ";
1794 gpio-controller;
1795 #gpio-cells = <2>;
1796 interrupt-controller;
1797 #interrupt-cells = <2>;
1800 st,bank-name = "GPIOK";
1806 #address-cells = <1>;
1807 #size-cells = <1>;
1808 compatible = "st,stm32mp157-z-pinctrl";
1810 interrupt-parent = <&exti>;
1814 gpio-controller;
1815 #gpio-cells = <2>;
1816 interrupt-controller;
1817 #interrupt-cells = <2>;
1820 st,bank-name = "GPIOZ";
1821 st,bank-ioport = <11>;
1828 compatible = "st,mlahb", "simple-bus";
1829 #address-cells = <1>;
1830 #size-cells = <1>;
1832 dma-ranges = <0x00000000 0x38000000 0x10000>,
1837 compatible = "st,stm32mp1-m4";
1842 reset-names = "mcu_rst";
1843 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
1844 st,syscfg-pdds = <&pwr_mcu 0x0 0x1>;
1845 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
1846 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;