| /freebsd/share/man/man4/ |
| H A D | acpi_hp.4 | 20 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for ACPI-controlled features found on HP laptops
63 .Bl -tag -width "subsystem" -offset indent -compact
64 .It system
70 The value depends on the model.
77 .Bl -tag -width "0xc0" -offset indent -compact
79 WLAN on air status changed to 0 (not on air)
81 WLAN on air status changed to 1 (on air)
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| H A D | ahc.4 | 22 .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 .Bd -ragged -offset indent
48 .Bd -literal -offset indent
60 fast, ultra or ultra2 synchronous transfers depending on controller type,
64 .Tn SCSI-Select
72 For systems that store non-volatile settings in a system specific manner
78 many chip-down motherboard configurations.
86 by a particular chip, may be disabled in a particular motherboard or card
88 .Bd -ragged -offset indent
89 .Bl -column "aic7895CX" "MIPSX" "PCI/64X" "MaxSyncX" "MaxWidthX" "SCBsX" "2 3 4 5 6 7 8X"
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| H A D | ltc430x.4 | 1 .\"-
2 .\" SPDX-License-Identifier: BSD-2-Clause
22 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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44 .Bd -literal -offset indent
52 buses as needed when slave devices on the downstream buses initiate I/O.
53 More information on the automatic switching behavior is available in
58 based system, an
69 .Bk -words
70 .Li i2c/i2c-mux-ltc4306.txt
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| H A D | rl.4 | 15 .\" 4. Neither the name of the author nor the names of any co-contributors
26 .\" INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
56 controllers based on the RealTek 8129 and 8139 Fast Ethernet controller
60 descriptor-based data transfer mechanism.
76 PHY chip.
78 Note: support for the 8139C+ chip is provided by the
85 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
89 supported if the PHY chip attached to the RealTek controller
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| H A D | spigen.4 | 21 .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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45 .Bd -literal -offset indent
51 driver provides direct access to a slave device on the SPI bus.
54 device is associated with a single chip-select
55 line on the bus, and all I/O performed through that instance is done
56 with that chip-select line asserted.
58 SPI data transfers are inherently bi-directional; there are no separate
63 Likewise on a read operation, whatever data is in the buffer at the start
75 .Bl -tag -width indent
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| H A D | iicbus.4 | 20 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 .Nd I2C bus system
41 system provides a uniform, modular and architecture-independent
42 system for the implementation of drivers to control various I2C devices
49 easy way to connect a CPU to peripheral chips in a TV-set.
57 is a CPU, LCD driver, memory, or complex function chip.
59 can act as a receiver and/or transmitter depending on its functionality.
60 Obviously an LCD driver is only a receiver, while a memory or I/O chip can
65 The BUS MASTER is the chip issuing the commands on the BUS.
67 specification it is stated that the IC that initiates a data transfer on the
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| H A D | mx25l.4 | 20 .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 .Nd driver for SpiFlash(tm) compatible non-volatile storage devices
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
72 .Bl -bullet -compact
131 based system, the
140 The most commonly-used ones are documented below.
145 .Bl -tag -width indent
147 Must be the string "jedec,spi-nor".
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| H A D | at45d.4 | 20 .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 .Nd driver for DataFlash(tm) non-volatile storage devices
35 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
48 driver provides support for the family of non-volatile storage
75 .Bl -bullet -compact
98 based system, the
107 The most commonly-used ones are documented below.
112 .Bl -tag -width indent
116 Chip select address of device.
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| /freebsd/lib/libpmc/pmu-events/arch/powerpc/power8/ |
| H A D | frontend.json | 47 "BriefDescription": "Number of I-ERAT reloads",
59 "BriefDescription": "IERAT Miss (Not implemented as DI on POWER6)",
71 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for an instru…
72 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
89 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
90 …oaded with Modified (M) data from another chip's L2 or L3 on a different Node or Group (Distant), …
95 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
96 …eloaded with Shared (S) data from another chip's L2 or L3 on a different Node or Group (Distant), …
101 …"BriefDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a di…
102 …"PublicDescription": "The processor's Instruction cache was reloaded from another chip's L4 on a d…
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| H A D | other.json | 11 …"BriefDescription": "Cycles in 2-lpar mode. Threads 0-3 belong to Lpar0 and threads 4-7 belong to …
17 …cles in 4 LPAR mode. Threads 0-1 belong to lpar0, threads 2-3 belong to lpar1, threads 4-5 belong …
23 …"BriefDescription": "Initial and Final Pump Scope was chip pump (prediction=correct) for all data …
24 …"PublicDescription": "Initial and Final Pump Scope and data sourced across this scope was chip pum…
36 … got data from source that was at smaller scope(Chip) Final pump was group pump and initial pump w…
41 …"BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a…
42 …urced, ended up larger than Initial Pump Scope (Chip) Final pump was group pump and initial pump w…
59 …"BriefDescription": "Initial and Final Pump Scope was system pump for all data types (demand load,…
60 …n": "Initial and Final Pump Scope and data sourced across this scope was system pump for all data …
65 …n": "Final Pump Scope (system) mispredicted. Either the original scope was too small (Chip/Group) …
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| /freebsd/lib/libpmc/pmu-events/arch/powerpc/power9/ |
| H A D | marked.json | 20 …was loaded into the TLB with Shared (S) data from another core's L3 on the same chip due to a data…
25 …"BriefDescription": "The processor's data cache was reloaded from another chip's memory on the sam…
30 …"BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or mem…
60 …"BriefDescription": "A Page Table Entry was loaded into the TLB from the local chip's L4 cache due…
70 …loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a mark…
95 …aded into the TLB with Modified (M) data from another core's ECO L3 on the same chip due to a mark…
100 …loaded into the TLB with Shared (S) data from another core's ECO L3 on the same chip due to a data…
120 …tion": "The processor's Instruction cache was reloaded from another chip's memory on the same Node…
130 …"BriefDescription": "The processor's data cache was reloaded from the local chip's Memory due to a…
145 …"BriefDescription": "Final Pump Scope (Group) ended up larger than Initial Pump Scope (Chip) for a…
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| /freebsd/sys/contrib/device-tree/Bindings/arm/ |
| H A D | syna.txt | 3 According to https://www.synaptics.com/company/news/conexant-marvell
7 ---------------------------------------------------------------
18 "marvell,berlin2cd" for Marvell Armada 1500-mini (BG2CD, 88DE3005)
20 "marvell,berlin2q" for Marvell Armada 1500-pro (BG2Q, 88DE3114)
26 model = "Sony NSZ-GS7";
27 compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";
34 CPU control register allows various operations on CPUs, like resetting them
38 - compatible: should be "marvell,berlin-cpu-ctrl"
39 - reg: address and length of the register set
43 cpu-ctrl@f7dd0000 {
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| H A D | atmel-sysregs.txt | 1 Atmel system registers
4 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
5 - reg : Should contain registers location and length
8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
11 shared across all System Controller members.
14 - compatible: Should be "microchip,sam9x60-pit64b" or
15 "microchip,sam9x7-pit64b", "microchip,sam9x60-pit64b"
16 - reg: Should contain registers location and length
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/fsl/ |
| H A D | pmc.txt | 4 - compatible: "fsl,<chip>-pmc".
6 "fsl,mpc8349-pmc" should be listed for any chip whose PMC is
7 compatible. "fsl,mpc8313-pmc" should also be listed for any chip
8 whose PMC is compatible, and implies deep-sleep capability.
10 "fsl,mpc8548-pmc" should be listed for any chip whose PMC is
11 compatible. "fsl,mpc8536-pmc" should also be listed for any chip
12 whose PMC is compatible, and implies deep-sleep capability.
14 "fsl,mpc8641d-pmc" should be listed for any chip whose PMC is
15 compatible; all statements below that apply to "fsl,mpc8548-pmc" also
16 apply to "fsl,mpc8641d-pmc".
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| /freebsd/sys/contrib/device-tree/Bindings/mtd/ |
| H A D | jedec,spi-nor.txt | 4 - #address-cells, #size-cells : Must be present if the device has sub-nodes
6 - compatible : May include a device-specific string consisting of the
7 manufacturer and name of the chip. A list of supported chip
9 Must also include "jedec,spi-nor" for any SPI NOR flash that can
12 Supported chip names:
50 The following chip names have been used historically to
53 m25p05-nonjedec
54 m25p10-nonjedec
55 m25p20-nonjedec
56 m25p40-nonjedec
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ddr/ |
| H A D | jedec,lpddr-channel.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ddr/jedec,lpddr-channel.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LPDDR channel with chip/rank topology description
11 CK, etc.) that connect one or more LPDDR chips to a host system. The main
12 purpose of this node is to overall LPDDR topology of the system, including the
13 amount of individual LPDDR chips and the ranks per chip.
16 - Julius Werner <jwerner@chromium.org>
21 - jedec,lpddr2-channel
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| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | socionext,uniphier-system-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/bus/socionext,uniphier-system-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier System Bus
10 The UniPhier System Bus is an external bus that connects on-board devices to
11 the UniPhier SoC. It is a simple (semi-)parallel bus with address, data, and
12 some control signals. It supports up to 8 banks (chip selects).
16 within each bank to the CPU-viewed address. The needed setup includes the
21 - Masahiro Yamada <yamada.masahiro@socionext.com>
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| /freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
| H A D | aspeed-wdt.txt | 4 - compatible: must be one of:
5 - "aspeed,ast2400-wdt"
6 - "aspeed,ast2500-wdt"
7 - "aspeed,ast2600-wdt"
9 - reg: physical base address of the controller and length of memory mapped
14 - aspeed,reset-typ
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| /freebsd/share/man/man4/man4.arm/ |
| H A D | imx6_snvs.4 | 21 .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 .Nd device driver for the NXP i.MX6 on-chip Realtime Clock
36 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
50 support for the i.MX6 on-chip realtime clock.
55 stands for Secure Non-Volatile Storage, and refers to the subsystem
56 within the chip that (optionally) remains powered by a battery when
57 the rest of the system is powered down.
58 The on-chip realtime clock is part of that subsystem.
67 provide time at all if the power is cycled. If the system provides an
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| H A D | mge.4 | 21 .\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
35 .Bd -ragged -offset indent
43 system-on-chip devices.
48 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
62 .Bl -tag -width xxxxxxxxxxxxxxxxxxxx
63 .It full-duplex
69 driver supports polled operation when the system is configured with
90 frame interrupt is delayed, if possible, until a threshold-defined period of
93 .Bl -tag -width indent
97 Value of 0 disables IC on the given path, value greater than zero corresponds
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| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | marvell-bt-8xxx.txt | 2 ------
3 The 8997 devices supports multiple interfaces. When used on SDIO interfaces,
4 the btmrvl driver is used and when used on USB interface, the btusb driver is
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
16 - marvell,cal-data: Calibration data downloaded to the device during
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
21 firmware will use the pin to wakeup host system (u16).
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
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| /freebsd/contrib/ntp/ntpd/ |
| H A D | ntpd-opts.def | 1 /* -*- Mode: Text -*- */
7 prog-name = "ntpd";
8 prog-title = "set clock via Network Time Protocol daemon";
11 #include ntpdbase-opts.def
14 explain = <<- _END_EXPLAIN
17 doc-section = {
18 ds-type = 'DESCRIPTION';
19 ds-format = 'mdoc';
20 ds-text = <<- _END_PROG_MDOC_DESCRIP
23 utility is an operating system daemon which sets
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| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-sprd-adi.txt | 3 ADI is the abbreviation of Anolog-Digital interface, which is used to access
4 analog chip (such as PMIC) from digital chip. ADI controller follows the SPI
9 48 hardware channels to access analog chip. For 2 software read/write channels,
10 users should set ADI registers to access analog chip. For hardware channels,
12 which means we can just link one analog chip address to one hardware channel,
13 then users can access the mapped analog chip address by this hardware channel
16 Thus we introduce one property named "sprd,hw-channels" to configure hardware
19 the analog chip address where user want to access by hardware components.
21 Since we have multi-subsystems will use unique ADI to access analog chip, when
22 one system is reading/writing data by ADI software channels, that should be under
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| /freebsd/sys/contrib/device-tree/Bindings/rtc/ |
| H A D | isil,isl12057.txt | 1 Intersil ISL12057 I2C RTC/Alarm chip
8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
38 that the pinctrl-related properties below are given for completeness and
39 may not be required or may be different depending on your system or
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| /freebsd/sys/contrib/device-tree/Bindings/powerpc/4xx/ |
| H A D | reboot.txt | 1 Reboot property to control system reboot on PPC4xx systems:
7 1 - PPC4xx core reset
8 2 - PPC4xx chip reset
9 3 - PPC4xx system reset (default)
17 reset-type = <2>; /* Use chip-reset */
|