xref: /freebsd/share/man/man4/ltc430x.4 (revision fa9896e082a1046ff4fbc75fcba4d18d1f2efc19)
1422d05daSIan Lepore.\"-
2422d05daSIan Lepore.\" SPDX-License-Identifier: BSD-2-Clause
3422d05daSIan Lepore.\"
4422d05daSIan Lepore.\" Copyright (c) 2019 Ian Lepore <ian@freebsd.org>
5422d05daSIan Lepore.\"
6422d05daSIan Lepore.\" Redistribution and use in source and binary forms, with or without
7422d05daSIan Lepore.\" modification, are permitted provided that the following conditions
8422d05daSIan Lepore.\" are met:
9422d05daSIan Lepore.\" 1. Redistributions of source code must retain the above copyright
10422d05daSIan Lepore.\"    notice, this list of conditions and the following disclaimer.
11422d05daSIan Lepore.\" 2. Redistributions in binary form must reproduce the above copyright
12422d05daSIan Lepore.\"    notice, this list of conditions and the following disclaimer in the
13422d05daSIan Lepore.\"    documentation and/or other materials provided with the distribution.
14422d05daSIan Lepore.\"
15422d05daSIan Lepore.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16422d05daSIan Lepore.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17422d05daSIan Lepore.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18422d05daSIan Lepore.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19422d05daSIan Lepore.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20422d05daSIan Lepore.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21422d05daSIan Lepore.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22422d05daSIan Lepore.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23422d05daSIan Lepore.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24422d05daSIan Lepore.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25422d05daSIan Lepore.\" SUCH DAMAGE.
26422d05daSIan Lepore.\"
27ac07cdf8SIan Lepore.Dd September 2, 2020
28422d05daSIan Lepore.Dt LTC430X 4
29422d05daSIan Lepore.Os
30422d05daSIan Lepore.Sh NAME
31422d05daSIan Lepore.Nm ltc430x
32422d05daSIan Lepore.Nd driver for LTC4305 and LTC4306 I2C mux chips
33422d05daSIan Lepore.Sh SYNOPSIS
34422d05daSIan LeporeTo compile this driver into the kernel,
35422d05daSIan Leporeplace the following line in your
36422d05daSIan Leporekernel configuration file:
37422d05daSIan Lepore.Bd -ragged -offset indent
38422d05daSIan Lepore.Cd "device ltc430x"
39422d05daSIan Lepore.Ed
40422d05daSIan Lepore.Pp
41422d05daSIan LeporeAlternatively, to load the driver as a
42422d05daSIan Leporemodule at boot time, place the following line in
43422d05daSIan Lepore.Xr loader.conf 5 :
44422d05daSIan Lepore.Bd -literal -offset indent
45422d05daSIan Leporeltc430x_load="YES"
46422d05daSIan Lepore.Ed
47422d05daSIan Lepore.Sh DESCRIPTION
48422d05daSIan LeporeThe
49422d05daSIan Lepore.Nm
50422d05daSIan Leporedriver supports the LTC4305 and LTC4306 I2C bus multiplexer (mux) chips.
51422d05daSIan LeporeIt automatically connects an upstream I2C bus to one of several downstream
52422d05daSIan Leporebuses as needed when slave devices on the downstream buses initiate I/O.
53422d05daSIan LeporeMore information on the automatic switching behavior is available in
54422d05daSIan Lepore.Xr iicmux 4 .
55422d05daSIan Lepore.Sh FDT CONFIGURATION
56422d05daSIan LeporeOn an
57422d05daSIan Lepore.Xr fdt 4
58422d05daSIan Leporebased system, an
59422d05daSIan Lepore.Nm
60422d05daSIan Leporedevice node is defined as a child node of its upstream i2c bus.
61422d05daSIan LeporeThe children of the
62422d05daSIan Lepore.Nm
63422d05daSIan Leporenode are additional i2c buses, which will have their own i2c slave
64422d05daSIan Leporedevices described in their child nodes.
65422d05daSIan Lepore.Pp
66422d05daSIan LeporeThe
67422d05daSIan Lepore.Nm
68422d05daSIan Leporedriver conforms to the standard
69422d05daSIan Lepore.Bk -words
70422d05daSIan Lepore.Li i2c/i2c-mux-ltc4306.txt
71422d05daSIan Lepore.Ek
72422d05daSIan Leporebindings document, except that the following optional properties
73422d05daSIan Leporeare not currently supported and will be ignored if present:
74422d05daSIan Lepore.Bl -bullet -compact -inset -offset indent
75422d05daSIan Lepore.It
76422d05daSIan Leporeenable-gpios
77422d05daSIan Lepore.It
78422d05daSIan Leporegpio-controller
79422d05daSIan Lepore.It
80422d05daSIan Lepore#gpio-cells
81422d05daSIan Lepore.It
82422d05daSIan Leporeltc,downstream-accelerators-enable
83422d05daSIan Lepore.It
84422d05daSIan Leporeltc,upstream-accelerators-enable
85422d05daSIan Lepore.El
86ac07cdf8SIan Lepore.Pp
87ac07cdf8SIan LeporeIn addition, the following additional property is supported:
88ac07cdf8SIan Lepore.Bl -tag -offset indent -width indent
89ac07cdf8SIan Lepore.It Va freebsd,ctlreg2
90ac07cdf8SIan LeporeA value to store into the chip's control register 2 during initialization.
91ac07cdf8SIan LeporeConsult the chip datasheet for the meaning of the various bits in
92ac07cdf8SIan Leporethe register.
93ac07cdf8SIan Lepore.El
94422d05daSIan Lepore.Sh HINTS CONFIGURATION
95422d05daSIan LeporeOn a
96422d05daSIan Lepore.Xr device.hints 5
97ac07cdf8SIan Leporebased system, the following hints are required:
98ac07cdf8SIan Lepore.Bl -tag -offset indent -width indent
99422d05daSIan Lepore.It Va hint.ltc430x.<unit>.at
100422d05daSIan LeporeThe upstream
101422d05daSIan Lepore.Xr iicbus 4
102422d05daSIan Leporethe
103422d05daSIan Lepore.Nm
104422d05daSIan Leporeinstance is attached to.
105e439fa62SIan Lepore.It Va hint.ltc430x.<unit>.addr
106e439fa62SIan LeporeThe slave address of the
107e439fa62SIan Lepore.Nm
108e439fa62SIan Leporeinstance on the upstream bus.
109ac07cdf8SIan Lepore.It Va hint.ltc430x.<unit>.chip_type
110ac07cdf8SIan LeporeThe type of chip the driver is controlling.
111ac07cdf8SIan LeporeValid values are
112ac07cdf8SIan Lepore.Dq ltc4305
113ac07cdf8SIan Leporeand
114ac07cdf8SIan Lepore.Dq ltc4306 .
115ac07cdf8SIan Lepore.El
116ac07cdf8SIan Lepore.Pp
117ac07cdf8SIan LeporeThe following hints are optional:
118ac07cdf8SIan Lepore.Bl -tag -offset indent -width indent
119ac07cdf8SIan Lepore.It Va hint.ltc430x.<unit>.ctlreg2
120ac07cdf8SIan LeporeA value to store into the chip's control register 2 during initialization.
121ac07cdf8SIan LeporeConsult the chip datasheet for the meaning of the various bits in
122ac07cdf8SIan Leporethe register.
123ac07cdf8SIan LeporeThis hint is optional; when missing, the driver does not update control
124ac07cdf8SIan Leporeregister 2.
125ac07cdf8SIan Lepore.It Va hint.ltc430x.<unit>.idle_disconnect
126ac07cdf8SIan LeporeWhether to disconnect all downstream busses from the upstream bus when idle.
127ac07cdf8SIan LeporeIf set to zero, the most recently used downstream bus is left connected to
128ac07cdf8SIan Leporethe upstream bus after IO completes.
129ac07cdf8SIan LeporeAny non-zero value causes all downstream busses to be disconnected when idle.
130ac07cdf8SIan LeporeThis hint is optional; when missing, the driver behaves as if it were zero.
131422d05daSIan Lepore.El
132422d05daSIan Lepore.Pp
133422d05daSIan LeporeWhen configured via hints, the driver automatically adds an iicbus
134422d05daSIan Leporeinstance for every downstream bus supported by the chip.
135ac07cdf8SIan LeporeThere is currently no way to indicate used versus unused downstream channels.
136422d05daSIan Lepore.Sh SEE ALSO
137422d05daSIan Lepore.Xr iicbus 4 ,
138*68445e34SChristian Brueffer.Xr iicmux 4
139422d05daSIan Lepore.Sh HISTORY
140422d05daSIan LeporeThe
141422d05daSIan Lepore.Nm
142422d05daSIan Leporedriver first appeared in
143422d05daSIan Lepore.Fx 13.0 .
144