Lines Matching +full:system +full:- +full:on +full:- +full:chip
20 .\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 .Nd I2C bus system
41 system provides a uniform, modular and architecture-independent
42 system for the implementation of drivers to control various I2C devices
49 easy way to connect a CPU to peripheral chips in a TV-set.
57 is a CPU, LCD driver, memory, or complex function chip.
59 can act as a receiver and/or transmitter depending on its functionality.
60 Obviously an LCD driver is only a receiver, while a memory or I/O chip can
65 The BUS MASTER is the chip issuing the commands on the BUS.
67 specification it is stated that the IC that initiates a data transfer on the
71 As mentioned before, the IC bus is a Multi-MASTER BUS.
77 .Bl -column "Device drivers" -compact
86 interfaces rely on very simple hardware, usually two lines
89 8-bit characters they write to the bus according to the I2C protocol.
91 I2C interfaces may act on the bus as slave devices, allowing spontaneous
92 bidirectional communications, thanks to the multi-master capabilities of the
97 .Bl -column "Interface drivers" -compact
100 .It Sy iicbb Ta "generic bit-banging master-only driver"
101 .It Sy lpbb Ta "parallel port specific bit-banging interface"
112 When a system supports multiple I2C buses, a different frequency can
127 to the frequency in Hz, on systems that use device hints to configure
133 .Va clock-frequency