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/linux/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
11 - Robin Murphy <Robin.Murphy@arm.com>
23 pattern: "^iommu@[0-9a-f]*"
26 - description: Qcom SoCs implementing "arm,smmu-v2"
28 - enum:
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
[all …]
/linux/include/uapi/sound/
H A Dasoc.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * uapi/sound/asoc.h -- ALSA SoC Firmware Controls and DAPM
29 * Maximum number of PCM stream configs
38 /* individual kcontrol info types - can be mixed with other types */
49 /* individual widget kcontrol info types - can be mixed with other types */
56 /* DAPM widget types - add new items to the end */
116 /* vendor block IDs - please add new vendor types to end */
296 * Stream Capabilities
317 * FE or BE Stream configuration supported by SW/FW
321 char name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; /* Name of the stream */
[all …]
/linux/sound/xen/
H A Dxen_snd_front_cfg.c1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Xen para-virtual sound device
6 * Copyright (C) 2016-2018 EPAM Systems Inc.
23 unsigned int mask; member
28 { .name = "5512", .mask = SNDRV_PCM_RATE_5512, .value = 5512 },
29 { .name = "8000", .mask = SNDRV_PCM_RATE_8000, .value = 8000 },
30 { .name = "11025", .mask = SNDRV_PCM_RATE_11025, .value = 11025 },
31 { .name = "16000", .mask = SNDRV_PCM_RATE_16000, .value = 16000 },
32 { .name = "22050", .mask = SNDRV_PCM_RATE_22050, .value = 22050 },
33 { .name = "32000", .mask = SNDRV_PCM_RATE_32000, .value = 32000 },
[all …]
/linux/include/uapi/linux/dvb/
H A Ddmx.h1 /* SPDX-License-Identifier: LGPL-2.1+ WITH Linux-syscall-note */
22 * enum dmx_output - Output for the demux.
28 * Delivers the stream output to the demux device on which the ioctl
47 * enum dmx_input - Input from the demux.
49 * @DMX_IN_FRONTEND: Input from a front-end device.
58 * enum dmx_ts_pes - type of the PES filter.
125 * struct dmx_filter - Specifies a section header filter.
128 * @mask: bits that are valid at the filter bit array.
129 * @mode: mode of match: if bit is zero, it will match if equal (positive
130 * match); if bit is one, it will match if the bit is negated.
[all …]
/linux/drivers/net/ethernet/microchip/vcap/
H A Dvcap_api.c1 // SPDX-License-Identifier: GPL-2.0+
53 itr->offset = offset; in vcap_iter_set()
54 itr->sw_width = sw_width; in vcap_iter_set()
55 itr->regs_per_sw = DIV_ROUND_UP(sw_width, 32); in vcap_iter_set()
56 itr->tg = tg; in vcap_iter_set()
62 * A typegroup table ends with an all-zero terminator. in vcap_iter_skip_tg()
64 while (itr->tg->width && itr->offset >= itr->tg->offset) { in vcap_iter_skip_tg()
65 itr->offset += itr->tg->width; in vcap_iter_skip_tg()
66 itr->tg++; /* next typegroup */ in vcap_iter_skip_tg()
75 sw_idx = itr->offset / itr->sw_width; in vcap_iter_update()
[all …]
/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-qcom.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
14 #include "arm-smmu.h"
15 #include "arm-smmu-qcom.h"
17 #define QCOM_DUMMY_VAL -1
20 * SMMU-500 TRM defines BIT(0) as CMTLB (Enable context caching in the
38 { .compatible = "qcom,adreno-gmu",
40 { .compatible = "qcom,adreno-smmu",
44 { .compatible = "qcom,sc7280-mdss",
46 { .compatible = "qcom,sc7280-venus",
[all …]
H A Darm-smmu.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * - SMMUv1 and v2 implementations
11 * - Stream-matching and stream-indexing
12 * - v7/v8 long-descriptor format
13 * - Non-secure access to the SMMU
14 * - Context fault reporting
15 * - Extended Stream ID (16 bit)
18 #define pr_fmt(fmt) "arm-smmu: " fmt
24 #include <linux/dma-mapping.h>
41 #include "arm-smmu.h"
[all …]
/linux/sound/soc/atmel/
H A Datmel-i2s.c1 // SPDX-License-Identifier: GPL-2.0-only
29 * ---- I2S Controller Register map ----
38 #define ATMEL_I2SC_IMR 0x001c /* Interrupt Mask Register */
44 * ---- Control Register (Write-only) ----
55 * ---- Mode Register (Read/Write) ----
124 * ---- Status Registers ----
143 * ---- Interrupt Enable/Disable/Mask Registers ----
212 unsigned int sr, imr, pending, ch, mask; in atmel_i2s_interrupt() local
215 regmap_read(dev->regmap, ATMEL_I2SC_SR, &sr); in atmel_i2s_interrupt()
216 regmap_read(dev->regmap, ATMEL_I2SC_IMR, &imr); in atmel_i2s_interrupt()
[all …]
/linux/sound/soc/sof/
H A Dtopology.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
18 #include "sof-priv.h"
19 #include "sof-audio.h"
29 * from dB gain 20th root of 10 in Q1.16 fixed-point notation
32 /* 40th root of 10 in Q1.16 fixed-poin
839 unsigned int mask; sof_control_load_volume() local
1076 int stream; sof_connect_dai_widget() local
1146 int i, stream; sof_disconnect_dai_widget() local
1735 int stream; sof_dai_load() local
[all...]
/linux/sound/soc/meson/
H A Daxg-tdm-formatter.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
13 #include "axg-tdm-formatter.h"
17 struct axg_tdm_stream *stream; member
33 unsigned int ch = ts->channels; in axg_tdm_formatter_set_channel_masks()
40 * in the stream. This is why the odd algorithm below is used. in axg_tdm_formatter_set_channel_masks()
45 * Distribute the channels of the stream over the available slots in axg_tdm_formatter_set_channel_masks()
53 if ((BIT(i + k) & ts->mask[j]) && ch) { in axg_tdm_formatter_set_channel_masks()
55 ch -= 1; in axg_tdm_formatter_set_channel_masks()
63 * the stream has more channels than we can accommodate and we should in axg_tdm_formatter_set_channel_masks()
67 pr_err("channel mask error\n"); in axg_tdm_formatter_set_channel_masks()
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/linux/lib/xz/
H A Dxz_dec_lzma2.c1 // SPDX-License-Identifier: 0BSD
7 * Igor Pavlov <https://7-zip.org/>
34 * In multi-call mode, also these are true:
39 * Most of these variables are size_t to support single-call mode,
55 * would read beyond the beginning of the uncompressed stream.
63 * End of the dictionary buffer. In multi-call mode, this is
64 * the same as the dictionary size. In single-call mode, this
72 * read beyond the beginning of the uncompressed stream.
77 * Maximum allowed dictionary size in multi-call mode.
78 * This is ignored in single-call mode.
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/linux/include/uapi/drm/
H A Dxe_drm.h1 /* SPDX-License-Identifier: MIT */
17 * subject to backwards-compatibility constraints.
28 * The diagram below represents a high-level simplification of a discrete
72 * - &DRM_IOCTL_XE_DEVICE_QUERY
73 * - &DRM_IOCTL_XE_GEM_CREATE
74 * - &DRM_IOCTL_XE_GEM_MMAP_OFFSET
75 * - &DRM_IOCTL_XE_VM_CREATE
76 * - &DRM_IOCTL_XE_VM_DESTROY
77 * - &DRM_IOCTL_XE_VM_BIND
78 * - &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
[all …]
/linux/include/sound/
H A Dhdaudio.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * HD-audio core stuff
12 #include <linux/io-64-nonatomic-lo-hi.h>
50 * HD-audio codec base device
163 * snd_hdac_read_parm - read a codec parameter
168 * Returns -1 for error. If you need to distinguish the error more
176 return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val; in snd_hdac_read_parm()
189 atomic_inc(&codec->in_pm); in snd_hdac_enter_pm()
195 atomic_dec(&codec->in_pm); in snd_hdac_leave_pm()
200 return atomic_read(&codec->in_pm); in snd_hdac_is_in_pm()
[all …]
/linux/drivers/net/ethernet/sfc/
H A Dmae.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2020-2022 Xilinx Inc.
29 return -EINVAL; in efx_mae_allocate_mport()
31 return -EINVAL; in efx_mae_allocate_mport()
42 return -EIO; in efx_mae_allocate_mport()
64 MAE_MPORT_SELECTOR_PPORT_ID, efx->port_num); in efx_mae_mport_wire()
104 return -EIO; in efx_mae_fw_lookup_mport()
120 efx->net_dev->mtu); in efx_mae_start_counters()
129 return -EIO; in efx_mae_start_counters()
132 netif_dbg(efx, drv, efx->net_dev, in efx_mae_start_counters()
[all …]
/linux/sound/soc/fsl/
H A Dfsl_ssi.c1 // SPDX-License-Identifier: GPL-2.0
7 // Copyright 2007-2010 Freescale Semiconductor, Inc.
9 // Some notes why imx-pcm-fiq is used instead of DMA on some boards:
16 // we receive in our (PCM-) data stream. The only chance we have is to
43 #include <linux/dma/imx-dma.h>
53 #include "imx-pcm.h"
55 /* Define RX and TX to index ssi->regvals array; Can be 0 or 1 only */
66 * (bit-endianness must match byte-endianness). Processors typically write
68 * written in. So if the host CPU is big-endian, then only big-endian
91 * - SSI inputs external bit clock and outputs frame sync clock -- CBM_CFS
[all …]
/linux/sound/soc/rockchip/
H A Drockchip_sai.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ALSA SoC Audio Layer - Rockchip SAI Controller driver
24 #define DRV_NAME "rockchip-sai"
78 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK && in rockchip_sai_stream_valid()
79 sai->has_playbac in rockchip_sai_stream_valid()
196 unsigned int mask = SAI_XFER_CLK_MASK | SAI_XFER_FSS_MASK; rockchip_sai_xfer_clk_stop_and_wait() local
281 rockchip_sai_fifo_xrun_detect(struct rk_sai_dev * sai,int stream,bool en) rockchip_sai_fifo_xrun_detect() argument
301 rockchip_sai_dma_ctrl(struct rk_sai_dev * sai,int stream,bool en) rockchip_sai_dma_ctrl() argument
361 rockchip_sai_xfer_start(struct rk_sai_dev * sai,int stream) rockchip_sai_xfer_start() argument
377 rockchip_sai_xfer_stop(struct rk_sai_dev * sai,int stream) rockchip_sai_xfer_stop() argument
401 rockchip_sai_start(struct rk_sai_dev * sai,int stream) rockchip_sai_start() argument
407 rockchip_sai_stop(struct rk_sai_dev * sai,int stream) rockchip_sai_stop() argument
484 unsigned int mask = 0, val = 0; rockchip_sai_set_fmt() local
882 int stream = substream->stream; rockchip_sai_startup() local
945 rockchip_sai_set_sysclk(struct snd_soc_dai * dai,int stream,unsigned int freq,int dir) rockchip_sai_set_sysclk() argument
[all...]
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_capture.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021-2022 Intel Corporation
27 * NOTE: For engine-registers, GuC only needs the register offsets
28 * from the engine-mmio-base
104 /* XE_LP Render / Compute Per-Class */
110 /* GEN8+ Render / Compute Per-Engine-Instance */
115 /* GEN8+ Media Decode/Encode Per-Engine-Instance */
120 /* XE_LP Video Enhancement Per-Class */
125 /* GEN8+ Video Enhancement Per-Engine-Instance */
130 /* GEN8+ Blitter Per-Engine-Instance */
[all …]
/linux/drivers/gpu/drm/xe/
H A Dxe_guc_capture.c1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021-2024 Intel Corporation
45 * Book-keeping structure used to track read and write pointers
46 * as we extract error capture data from the GuC-log-buffer's
47 * error-capture region as a stream of dwords.
57 * struct __guc_capture_parsed_output - extracted error capture node
59 * A single unit of extracted error-captur
485 const struct __guc_mmio_reg_descr_group *match; guc_capture_list_init() local
525 const struct __guc_mmio_reg_descr_group *match; guc_cap_list_num_regs() local
1494 const struct __guc_mmio_reg_descr_group *match; guc_get_max_reglist_count() local
[all...]
/linux/drivers/media/v4l2-core/
H A Dv4l2-subdev.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * V4L2 sub-device
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-event.h>
26 #include <media/v4l2-fh.h>
27 #include <media/v4l2-ioctl.h>
30 * struct v4l2_subdev_stream_config - Used for storing stream configuration.
33 * @stream: stream number
34 * @enabled: has the stream been enabled with v4l2_subdev_enable_streams()
[all …]
/linux/sound/soc/
H A Dsoc-topology.c1 // SPDX-License-Identifier: GPL-2.0+
3 // soc-topology.c -- ALSA SoC Topology
29 #include <sound/soc-dapm.h>
30 #include <sound/soc-topology.h>
83 const u8 *end = tplg->pos + elem_size * count; in soc_tplg_check_elem_count()
85 if (end > tplg->f in soc_tplg_check_elem_count()
1323 set_stream_info(struct soc_tplg * tplg,struct snd_soc_pcm_stream * stream,struct snd_soc_tplg_stream_caps * caps) set_stream_info() argument
1367 struct snd_soc_pcm_stream *stream; soc_tplg_dai_create() local
1840 struct snd_soc_pcm_stream *stream; soc_tplg_dai_config() local
[all...]
/linux/security/apparmor/
H A Daf_unix.c1 // SPDX-License-Identifier: GPL-2.0-only
30 return &u->sk; in aa_unix_sk()
33 static int unix_fs_perm(const char *op, u32 mask, const struct cred *subj_cred, in unix_fs_perm() argument
42 mask &= NET_FS_PERMS; in unix_fs_perm()
43 /* if !u->path.dentry socket is being shutdown - implicit delegation in unix_fs_perm()
46 if (path->dentry) { in unix_fs_perm()
48 struct inode *inode = path->dentry->d_inode; in unix_fs_perm()
49 vfsuid_t vfsuid = i_uid_into_vfsuid(mnt_idmap(path->mnt), inode); in unix_fs_perm()
52 .mode = inode->i_mode, in unix_fs_perm()
56 PATH_SOCK_COND, mask, &cond); in unix_fs_perm()
[all …]
/linux/sound/soc/codecs/
H A Dtwl4030.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/mfd/twl4030-audio.h>
64 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
76 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte; in tw4030_init_ctl_cache()
86 return -EIO; in twl4030_read()
95 value = twl4030->ctl_cach in twl4030_read()
838 int mask = (1 << fls(max)) - 1; snd_soc_get_volsw_twl4030() local
867 int mask = (1 << fls(max)) - 1; snd_soc_put_volsw_twl4030() local
896 int mask = (1<<fls(max))-1; snd_soc_get_volsw_r2_twl4030() local
923 int mask = (1 << fls(max)) - 1; snd_soc_put_volsw_r2_twl4030() local
1622 u8 reg, mask; twl4030_tdm_enable() local
1906 u8 reg, mask; twl4030_voice_enable() local
[all...]
/linux/fs/ntfs3/lib/
H A Dlzx_decompress.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * lzx_decompress.c - A decompressor for the LZX compression format, which can
17 /* The smallest and largest allowed match lengths */
21 /* Number of distinct match lengths that can be represented */
22 #define LZX_NUM_LENS (LZX_MAX_MATCH_LEN - LZX_MIN_MATCH_LEN + 1)
24 /* Number of match lengths for which no length symbol is required */
28 /* Valid values of the 3-bit block type field */
41 #define LZX_LENCODE_NUM_SYMBOLS (LZX_NUM_LENS - LZX_NUM_PRIMARY_LENS)
49 /* Number of low-order bits of each match offset that are entropy-encoded in
57 /* Mask for the match offset bits that are entropy-encoded in aligned offset
[all …]
/linux/drivers/soundwire/
H A Dcadence_master.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
34 #define CDNS_IP_MCP_CONFIG 0x0 /* IP offset added at run-time */
51 #define CDNS_IP_MCP_CONTROL 0x4 /* IP offset added at run-time */
59 #define CDNS_IP_MCP_CMDCTRL 0x8 /* IP offset added at run-time */
134 #define CDNS_IP_MCP_CMD_BASE 0x80 /* IP offset added at run-time */
135 #define CDNS_IP_MCP_RESP_BASE 0x80 /* IP offset added at run-time */
208 return readl(cdns->registers + offset); in cdns_readl()
213 writel(value, cdns->registers + offset); in cdns_writel()
218 return cdns_readl(cdns, cdns->ip_offset + offset); in cdns_ip_readl()
[all …]
/linux/net/openvswitch/
H A Dflow_netlink.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2007-2017 Nicira, Inc.
49 #define OVS_ATTR_NESTED -1
50 #define OVS_ATTR_VARIABLE -2
95 static void update_range(struct sw_flow_match *match, in update_range() argument
103 range = &match->range; in update_range()
105 range = &match->mask->range; in update_range()
107 if (range->start == range->end) { in update_range()
108 range->start = start; in update_range()
109 range->end = end; in update_range()
[all …]

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