1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
2e3d280fcSTakashi Iwai /*
3e3d280fcSTakashi Iwai * HD-audio core stuff
4e3d280fcSTakashi Iwai */
5e3d280fcSTakashi Iwai
6e3d280fcSTakashi Iwai #ifndef __SOUND_HDAUDIO_H
7e3d280fcSTakashi Iwai #define __SOUND_HDAUDIO_H
8e3d280fcSTakashi Iwai
9e3d280fcSTakashi Iwai #include <linux/device.h>
1014752412STakashi Iwai #include <linux/interrupt.h>
114d024fe8STakashi Iwai #include <linux/io.h>
12c19bd02eSCezary Rojewski #include <linux/io-64-nonatomic-lo-hi.h>
133cab69d9SAmadeusz Sławiński #include <linux/iopoll.h>
14cab8cf49SAmadeusz Sławiński #include <linux/pci.h>
15feb20faeSTakashi Iwai #include <linux/pm_runtime.h>
1614752412STakashi Iwai #include <linux/timecounter.h>
1714752412STakashi Iwai #include <sound/core.h>
18a6ea5fe9STakashi Iwai #include <sound/pcm.h>
1914752412STakashi Iwai #include <sound/memalloc.h>
20d068ebc2STakashi Iwai #include <sound/hda_verbs.h>
21*1bb01bdaSJani Nikula #include <drm/intel/i915_component.h>
22d068ebc2STakashi Iwai
237639a06cSTakashi Iwai /* codec node id */
247639a06cSTakashi Iwai typedef u16 hda_nid_t;
257639a06cSTakashi Iwai
26d068ebc2STakashi Iwai struct hdac_bus;
2714752412STakashi Iwai struct hdac_stream;
28d068ebc2STakashi Iwai struct hdac_device;
29d068ebc2STakashi Iwai struct hdac_driver;
303256be65STakashi Iwai struct hdac_widget_tree;
31da23ac1eSSubhransu S. Prusty struct hda_device_id;
32e3d280fcSTakashi Iwai
33e3d280fcSTakashi Iwai /*
34e3d280fcSTakashi Iwai * exported bus type
35e3d280fcSTakashi Iwai */
3666e82d21SGreg Kroah-Hartman extern const struct bus_type snd_hda_bus_type;
37e3d280fcSTakashi Iwai
38e3d280fcSTakashi Iwai /*
3971fc4c7eSTakashi Iwai * generic arrays
4071fc4c7eSTakashi Iwai */
4171fc4c7eSTakashi Iwai struct snd_array {
4271fc4c7eSTakashi Iwai unsigned int used;
4371fc4c7eSTakashi Iwai unsigned int alloced;
4471fc4c7eSTakashi Iwai unsigned int elem_size;
4571fc4c7eSTakashi Iwai unsigned int alloc_align;
4671fc4c7eSTakashi Iwai void *list;
4771fc4c7eSTakashi Iwai };
4871fc4c7eSTakashi Iwai
4971fc4c7eSTakashi Iwai /*
50e3d280fcSTakashi Iwai * HD-audio codec base device
51e3d280fcSTakashi Iwai */
52e3d280fcSTakashi Iwai struct hdac_device {
53e3d280fcSTakashi Iwai struct device dev;
54e3d280fcSTakashi Iwai int type;
55d068ebc2STakashi Iwai struct hdac_bus *bus;
56d068ebc2STakashi Iwai unsigned int addr; /* codec address */
57d068ebc2STakashi Iwai struct list_head list; /* list point for bus codec_list */
587639a06cSTakashi Iwai
597639a06cSTakashi Iwai hda_nid_t afg; /* AFG node id */
607639a06cSTakashi Iwai hda_nid_t mfg; /* MFG node id */
617639a06cSTakashi Iwai
627639a06cSTakashi Iwai /* ids */
637639a06cSTakashi Iwai unsigned int vendor_id;
647639a06cSTakashi Iwai unsigned int subsystem_id;
657639a06cSTakashi Iwai unsigned int revision_id;
667639a06cSTakashi Iwai unsigned int afg_function_id;
677639a06cSTakashi Iwai unsigned int mfg_function_id;
687639a06cSTakashi Iwai unsigned int afg_unsol:1;
697639a06cSTakashi Iwai unsigned int mfg_unsol:1;
707639a06cSTakashi Iwai
717639a06cSTakashi Iwai unsigned int power_caps; /* FG power caps */
727639a06cSTakashi Iwai
737639a06cSTakashi Iwai const char *vendor_name; /* codec vendor name */
747639a06cSTakashi Iwai const char *chip_name; /* codec chip name */
757639a06cSTakashi Iwai
7605852448STakashi Iwai /* verb exec op override */
7705852448STakashi Iwai int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
7805852448STakashi Iwai unsigned int flags, unsigned int *res);
7905852448STakashi Iwai
807639a06cSTakashi Iwai /* widgets */
817639a06cSTakashi Iwai unsigned int num_nodes;
827639a06cSTakashi Iwai hda_nid_t start_nid, end_nid;
837639a06cSTakashi Iwai
847639a06cSTakashi Iwai /* misc flags */
857639a06cSTakashi Iwai atomic_t in_pm; /* suspend/resume being performed */
863256be65STakashi Iwai
873256be65STakashi Iwai /* sysfs */
88ed180abbSAmadeusz Sławiński struct mutex widget_lock;
893256be65STakashi Iwai struct hdac_widget_tree *widgets;
904d75faa0STakashi Iwai
914d75faa0STakashi Iwai /* regmap */
924d75faa0STakashi Iwai struct regmap *regmap;
931a462be5STakashi Iwai struct mutex regmap_lock;
945e56bceaSTakashi Iwai struct snd_array vendor_verbs;
954d75faa0STakashi Iwai bool lazy_cache:1; /* don't wake up for writes */
96faa75f8aSTakashi Iwai bool caps_overwriting:1; /* caps overwrite being in process */
9740ba66a7STakashi Iwai bool cache_coef:1; /* cache COEF read/write too */
98e7255c00SCezary Rojewski unsigned int registered:1; /* codec was registered */
99e3d280fcSTakashi Iwai };
100e3d280fcSTakashi Iwai
101e3d280fcSTakashi Iwai /* device/driver type used for matching */
102e3d280fcSTakashi Iwai enum {
103e3d280fcSTakashi Iwai HDA_DEV_CORE,
104e3d280fcSTakashi Iwai HDA_DEV_LEGACY,
105c1cc18b1SRamesh Babu HDA_DEV_ASOC,
106e3d280fcSTakashi Iwai };
107e3d280fcSTakashi Iwai
108d82b51c8SPierre-Louis Bossart enum {
109d82b51c8SPierre-Louis Bossart SND_SKL_PCI_BIND_AUTO, /* automatic selection based on pci class */
110d82b51c8SPierre-Louis Bossart SND_SKL_PCI_BIND_LEGACY,/* bind only with legacy driver */
111d82b51c8SPierre-Louis Bossart SND_SKL_PCI_BIND_ASOC /* bind only with ASoC driver */
112d82b51c8SPierre-Louis Bossart };
113d82b51c8SPierre-Louis Bossart
1147639a06cSTakashi Iwai /* direction */
1157639a06cSTakashi Iwai enum {
1167639a06cSTakashi Iwai HDA_INPUT, HDA_OUTPUT
1177639a06cSTakashi Iwai };
1187639a06cSTakashi Iwai
119e3d280fcSTakashi Iwai #define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
120e3d280fcSTakashi Iwai
1217639a06cSTakashi Iwai int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
1227639a06cSTakashi Iwai const char *name, unsigned int addr);
1237639a06cSTakashi Iwai void snd_hdac_device_exit(struct hdac_device *dev);
1243256be65STakashi Iwai int snd_hdac_device_register(struct hdac_device *codec);
1253256be65STakashi Iwai void snd_hdac_device_unregister(struct hdac_device *codec);
126ded255beSTakashi Iwai int snd_hdac_device_set_chip_name(struct hdac_device *codec, const char *name);
1272a81ada3SGreg Kroah-Hartman int snd_hdac_codec_modalias(const struct hdac_device *hdac, char *buf, size_t size);
1287639a06cSTakashi Iwai
129774a075aSTakashi Iwai int snd_hdac_refresh_widgets(struct hdac_device *codec);
1307639a06cSTakashi Iwai
1317639a06cSTakashi Iwai int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
1327639a06cSTakashi Iwai unsigned int verb, unsigned int parm, unsigned int *res);
13301ed3c06STakashi Iwai int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
13401ed3c06STakashi Iwai unsigned int *res);
1359ba17b4dSTakashi Iwai int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
1369ba17b4dSTakashi Iwai int parm);
137faa75f8aSTakashi Iwai int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
138faa75f8aSTakashi Iwai unsigned int parm, unsigned int val);
1397639a06cSTakashi Iwai int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
1407639a06cSTakashi Iwai hda_nid_t *conn_list, int max_conns);
1417639a06cSTakashi Iwai int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
1427639a06cSTakashi Iwai hda_nid_t *start_id);
143d24f1a09SCezary Rojewski unsigned int snd_hdac_stream_format_bits(snd_pcm_format_t format, snd_pcm_subformat_t subformat,
144d24f1a09SCezary Rojewski unsigned int maxbits);
145d24f1a09SCezary Rojewski unsigned int snd_hdac_stream_format(unsigned int channels, unsigned int bits, unsigned int rate);
146d24f1a09SCezary Rojewski unsigned int snd_hdac_spdif_stream_format(unsigned int channels, unsigned int bits,
147d24f1a09SCezary Rojewski unsigned int rate, unsigned short spdif_ctls);
148b7d023e1STakashi Iwai int snd_hdac_query_supported_pcm(struct hdac_device *codec, hda_nid_t nid,
149a7fc8b86SCezary Rojewski u32 *ratesp, u64 *formatsp, u32 *subformatsp,
150a7fc8b86SCezary Rojewski unsigned int *bpsp);
151b7d023e1STakashi Iwai bool snd_hdac_is_supported_format(struct hdac_device *codec, hda_nid_t nid,
152b7d023e1STakashi Iwai unsigned int format);
1537639a06cSTakashi Iwai
1541b5e6167SSubhransu S. Prusty int snd_hdac_codec_read(struct hdac_device *hdac, hda_nid_t nid,
1551b5e6167SSubhransu S. Prusty int flags, unsigned int verb, unsigned int parm);
1561b5e6167SSubhransu S. Prusty int snd_hdac_codec_write(struct hdac_device *hdac, hda_nid_t nid,
1571b5e6167SSubhransu S. Prusty int flags, unsigned int verb, unsigned int parm);
1581b5e6167SSubhransu S. Prusty bool snd_hdac_check_power_state(struct hdac_device *hdac,
1591b5e6167SSubhransu S. Prusty hda_nid_t nid, unsigned int target_state);
16009787492SAbhijeet Kumar unsigned int snd_hdac_sync_power_state(struct hdac_device *hdac,
16109787492SAbhijeet Kumar hda_nid_t nid, unsigned int target_state);
16201ed3c06STakashi Iwai /**
16301ed3c06STakashi Iwai * snd_hdac_read_parm - read a codec parameter
16401ed3c06STakashi Iwai * @codec: the codec object
16501ed3c06STakashi Iwai * @nid: NID to read a parameter
16601ed3c06STakashi Iwai * @parm: parameter to read
16701ed3c06STakashi Iwai *
16801ed3c06STakashi Iwai * Returns -1 for error. If you need to distinguish the error more
16901ed3c06STakashi Iwai * strictly, use _snd_hdac_read_parm() directly.
17001ed3c06STakashi Iwai */
snd_hdac_read_parm(struct hdac_device * codec,hda_nid_t nid,int parm)17101ed3c06STakashi Iwai static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
17201ed3c06STakashi Iwai int parm)
17301ed3c06STakashi Iwai {
17401ed3c06STakashi Iwai unsigned int val;
17501ed3c06STakashi Iwai
17601ed3c06STakashi Iwai return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
17701ed3c06STakashi Iwai }
17801ed3c06STakashi Iwai
1797639a06cSTakashi Iwai #ifdef CONFIG_PM
180fbce23a0STakashi Iwai int snd_hdac_power_up(struct hdac_device *codec);
181fbce23a0STakashi Iwai int snd_hdac_power_down(struct hdac_device *codec);
182fbce23a0STakashi Iwai int snd_hdac_power_up_pm(struct hdac_device *codec);
183fbce23a0STakashi Iwai int snd_hdac_power_down_pm(struct hdac_device *codec);
184fc4f000bSTakashi Iwai int snd_hdac_keep_power_up(struct hdac_device *codec);
185feb20faeSTakashi Iwai
186feb20faeSTakashi Iwai /* call this at entering into suspend/resume callbacks in codec driver */
snd_hdac_enter_pm(struct hdac_device * codec)187feb20faeSTakashi Iwai static inline void snd_hdac_enter_pm(struct hdac_device *codec)
188feb20faeSTakashi Iwai {
189feb20faeSTakashi Iwai atomic_inc(&codec->in_pm);
190feb20faeSTakashi Iwai }
191feb20faeSTakashi Iwai
192feb20faeSTakashi Iwai /* call this at leaving from suspend/resume callbacks in codec driver */
snd_hdac_leave_pm(struct hdac_device * codec)193feb20faeSTakashi Iwai static inline void snd_hdac_leave_pm(struct hdac_device *codec)
194feb20faeSTakashi Iwai {
195feb20faeSTakashi Iwai atomic_dec(&codec->in_pm);
196feb20faeSTakashi Iwai }
197feb20faeSTakashi Iwai
snd_hdac_is_in_pm(struct hdac_device * codec)198feb20faeSTakashi Iwai static inline bool snd_hdac_is_in_pm(struct hdac_device *codec)
199feb20faeSTakashi Iwai {
200feb20faeSTakashi Iwai return atomic_read(&codec->in_pm);
201feb20faeSTakashi Iwai }
202feb20faeSTakashi Iwai
snd_hdac_is_power_on(struct hdac_device * codec)203feb20faeSTakashi Iwai static inline bool snd_hdac_is_power_on(struct hdac_device *codec)
204feb20faeSTakashi Iwai {
205feb20faeSTakashi Iwai return !pm_runtime_suspended(&codec->dev);
206feb20faeSTakashi Iwai }
2077639a06cSTakashi Iwai #else
snd_hdac_power_up(struct hdac_device * codec)208fbce23a0STakashi Iwai static inline int snd_hdac_power_up(struct hdac_device *codec) { return 0; }
snd_hdac_power_down(struct hdac_device * codec)209fbce23a0STakashi Iwai static inline int snd_hdac_power_down(struct hdac_device *codec) { return 0; }
snd_hdac_power_up_pm(struct hdac_device * codec)210fbce23a0STakashi Iwai static inline int snd_hdac_power_up_pm(struct hdac_device *codec) { return 0; }
snd_hdac_power_down_pm(struct hdac_device * codec)211fbce23a0STakashi Iwai static inline int snd_hdac_power_down_pm(struct hdac_device *codec) { return 0; }
snd_hdac_keep_power_up(struct hdac_device * codec)212fc4f000bSTakashi Iwai static inline int snd_hdac_keep_power_up(struct hdac_device *codec) { return 0; }
snd_hdac_enter_pm(struct hdac_device * codec)213feb20faeSTakashi Iwai static inline void snd_hdac_enter_pm(struct hdac_device *codec) {}
snd_hdac_leave_pm(struct hdac_device * codec)214feb20faeSTakashi Iwai static inline void snd_hdac_leave_pm(struct hdac_device *codec) {}
snd_hdac_is_in_pm(struct hdac_device * codec)21579263c3bSJason Yan static inline bool snd_hdac_is_in_pm(struct hdac_device *codec) { return false; }
snd_hdac_is_power_on(struct hdac_device * codec)21679263c3bSJason Yan static inline bool snd_hdac_is_power_on(struct hdac_device *codec) { return true; }
2177639a06cSTakashi Iwai #endif
2187639a06cSTakashi Iwai
219e3d280fcSTakashi Iwai /*
220e3d280fcSTakashi Iwai * HD-audio codec base driver
221e3d280fcSTakashi Iwai */
222e3d280fcSTakashi Iwai struct hdac_driver {
223e3d280fcSTakashi Iwai struct device_driver driver;
224e3d280fcSTakashi Iwai int type;
225ec71efc9SVinod Koul const struct hda_device_id *id_table;
226e3d280fcSTakashi Iwai int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
227d068ebc2STakashi Iwai void (*unsol_event)(struct hdac_device *dev, unsigned int event);
228e1df9317SRakesh Ughreja
229e1df9317SRakesh Ughreja /* fields used by ext bus APIs */
230e1df9317SRakesh Ughreja int (*probe)(struct hdac_device *dev);
231e1df9317SRakesh Ughreja int (*remove)(struct hdac_device *dev);
232e1df9317SRakesh Ughreja void (*shutdown)(struct hdac_device *dev);
233e3d280fcSTakashi Iwai };
234e3d280fcSTakashi Iwai
235e3d280fcSTakashi Iwai #define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
236e3d280fcSTakashi Iwai
237ec71efc9SVinod Koul const struct hda_device_id *
238ec71efc9SVinod Koul hdac_get_device_id(struct hdac_device *hdev, struct hdac_driver *drv);
239ec71efc9SVinod Koul
240d068ebc2STakashi Iwai /*
24114752412STakashi Iwai * Bus verb operators
242d068ebc2STakashi Iwai */
243d068ebc2STakashi Iwai struct hdac_bus_ops {
244d068ebc2STakashi Iwai /* send a single command */
245d068ebc2STakashi Iwai int (*command)(struct hdac_bus *bus, unsigned int cmd);
246d068ebc2STakashi Iwai /* get a response from the last command */
247d068ebc2STakashi Iwai int (*get_response)(struct hdac_bus *bus, unsigned int addr,
248d068ebc2STakashi Iwai unsigned int *res);
249f9e5fd1bSKai Vehmanen /* notify of codec link power-up/down */
250f9e5fd1bSKai Vehmanen void (*link_power)(struct hdac_device *hdev, bool enable);
251d068ebc2STakashi Iwai };
252d068ebc2STakashi Iwai
25314752412STakashi Iwai /*
254cb04ba33SRakesh Ughreja * ops used for ASoC HDA codec drivers
255cb04ba33SRakesh Ughreja */
256cb04ba33SRakesh Ughreja struct hdac_ext_bus_ops {
257cb04ba33SRakesh Ughreja int (*hdev_attach)(struct hdac_device *hdev);
258cb04ba33SRakesh Ughreja int (*hdev_detach)(struct hdac_device *hdev);
259cb04ba33SRakesh Ughreja };
260cb04ba33SRakesh Ughreja
26114752412STakashi Iwai #define HDA_UNSOL_QUEUE_SIZE 64
26214752412STakashi Iwai #define HDA_MAX_CODECS 8 /* limit by controller side */
26314752412STakashi Iwai
26414752412STakashi Iwai /*
26514752412STakashi Iwai * CORB/RIRB
26614752412STakashi Iwai *
26714752412STakashi Iwai * Each CORB entry is 4byte, RIRB is 8byte
26814752412STakashi Iwai */
26914752412STakashi Iwai struct hdac_rb {
27014752412STakashi Iwai __le32 *buf; /* virtual address of CORB/RIRB buffer */
27114752412STakashi Iwai dma_addr_t addr; /* physical address of CORB/RIRB buffer */
27214752412STakashi Iwai unsigned short rp, wp; /* RIRB read/write pointers */
27314752412STakashi Iwai int cmds[HDA_MAX_CODECS]; /* number of pending requests */
27414752412STakashi Iwai u32 res[HDA_MAX_CODECS]; /* last read value */
27514752412STakashi Iwai };
27614752412STakashi Iwai
27714752412STakashi Iwai /*
27814752412STakashi Iwai * HD-audio bus base driver
2796720b384SVinod Koul *
2806720b384SVinod Koul * @ppcap: pp capabilities pointer
2816720b384SVinod Koul * @spbcap: SPIB capabilities pointer
2826720b384SVinod Koul * @mlcap: MultiLink capabilities pointer
2836720b384SVinod Koul * @gtscap: gts capabilities pointer
2846720b384SVinod Koul * @drsmcap: dma resume capabilities pointer
28576f56faeSRakesh Ughreja * @num_streams: streams supported
28676f56faeSRakesh Ughreja * @idx: HDA link index
28776f56faeSRakesh Ughreja * @hlink_list: link list of HDA links
288e61ab9f0STakashi Iwai * @lock: lock for link and display power mgmt
28976f56faeSRakesh Ughreja * @cmd_dma_state: state of cmd DMAs: CORB and RIRB
29014752412STakashi Iwai */
291d068ebc2STakashi Iwai struct hdac_bus {
292d068ebc2STakashi Iwai struct device *dev;
293d068ebc2STakashi Iwai const struct hdac_bus_ops *ops;
294cb04ba33SRakesh Ughreja const struct hdac_ext_bus_ops *ext_ops;
29514752412STakashi Iwai
29614752412STakashi Iwai /* h/w resources */
29714752412STakashi Iwai unsigned long addr;
29814752412STakashi Iwai void __iomem *remap_addr;
29914752412STakashi Iwai int irq;
300d068ebc2STakashi Iwai
3016720b384SVinod Koul void __iomem *ppcap;
3026720b384SVinod Koul void __iomem *spbcap;
3036720b384SVinod Koul void __iomem *mlcap;
3046720b384SVinod Koul void __iomem *gtscap;
3056720b384SVinod Koul void __iomem *drsmcap;
3066720b384SVinod Koul
307d068ebc2STakashi Iwai /* codec linked list */
308d068ebc2STakashi Iwai struct list_head codec_list;
309d068ebc2STakashi Iwai unsigned int num_codecs;
310d068ebc2STakashi Iwai
311d068ebc2STakashi Iwai /* link caddr -> codec */
312d068ebc2STakashi Iwai struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
313d068ebc2STakashi Iwai
314d068ebc2STakashi Iwai /* unsolicited event queue */
315d068ebc2STakashi Iwai u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
316d068ebc2STakashi Iwai unsigned int unsol_rp, unsol_wp;
317d068ebc2STakashi Iwai struct work_struct unsol_work;
318d068ebc2STakashi Iwai
31914752412STakashi Iwai /* bit flags of detected codecs */
32014752412STakashi Iwai unsigned long codec_mask;
32114752412STakashi Iwai
322d068ebc2STakashi Iwai /* bit flags of powered codecs */
323d068ebc2STakashi Iwai unsigned long codec_powered;
324d068ebc2STakashi Iwai
32514752412STakashi Iwai /* CORB/RIRB */
32614752412STakashi Iwai struct hdac_rb corb;
32714752412STakashi Iwai struct hdac_rb rirb;
32814752412STakashi Iwai unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
32988452da9STakashi Iwai wait_queue_head_t rirb_wq;
33014752412STakashi Iwai
33114752412STakashi Iwai /* CORB/RIRB and position buffers */
33214752412STakashi Iwai struct snd_dma_buffer rb;
33314752412STakashi Iwai struct snd_dma_buffer posbuf;
334619a1f19STakashi Iwai int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
33514752412STakashi Iwai
33614752412STakashi Iwai /* hdac_stream linked list */
33714752412STakashi Iwai struct list_head stream_list;
33814752412STakashi Iwai
33914752412STakashi Iwai /* operation state */
34014752412STakashi Iwai bool chip_init:1; /* h/w initialized */
34114752412STakashi Iwai
34214752412STakashi Iwai /* behavior flags */
3434d024fe8STakashi Iwai bool aligned_mmio:1; /* aligned MMIO access */
344d068ebc2STakashi Iwai bool sync_write:1; /* sync after verb write */
34514752412STakashi Iwai bool use_posbuf:1; /* use position buffer */
34614752412STakashi Iwai bool snoop:1; /* enable snooping */
34714752412STakashi Iwai bool align_bdle_4k:1; /* BDLE align 4K boundary */
34814752412STakashi Iwai bool reverse_assign:1; /* assign devices in reverse order */
34914752412STakashi Iwai bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
3508af42130SBard Liao bool polling_mode:1;
3515f2cb361STakashi Iwai bool needs_damn_long_delay:1;
352cbc3e98aSYanteng Si bool not_use_interrupts:1; /* prohibiting the RIRB IRQ */
353942ccdd8SYanteng Si bool access_sdnctl_in_dword:1; /* accessing the sdnctl register by dword */
354a1de26c0SPeter Ujfalusi bool use_pio_for_commands:1; /* Use PIO instead of CORB for commands */
3558af42130SBard Liao
3568af42130SBard Liao int poll_count;
35714752412STakashi Iwai
35814752412STakashi Iwai int bdl_pos_adj; /* BDL position adjustment */
359d068ebc2STakashi Iwai
3604106820bSMohan Kumar /* delay time in us for dma stop */
3614106820bSMohan Kumar unsigned int dma_stop_delay;
3624106820bSMohan Kumar
363d068ebc2STakashi Iwai /* locks */
36414752412STakashi Iwai spinlock_t reg_lock;
365d068ebc2STakashi Iwai struct mutex cmd_mutex;
366e61ab9f0STakashi Iwai struct mutex lock;
36798d8fc6cSMengdong Lin
368ae891abeSTakashi Iwai /* DRM component interface */
369ae891abeSTakashi Iwai struct drm_audio_component *audio_component;
370029d92c2STakashi Iwai long display_power_status;
371d31c85fcSChris Wilson unsigned long display_power_active;
37276f56faeSRakesh Ughreja
37376f56faeSRakesh Ughreja /* parameters required for enhanced capabilities */
37476f56faeSRakesh Ughreja int num_streams;
37576f56faeSRakesh Ughreja int idx;
37676f56faeSRakesh Ughreja
377e61ab9f0STakashi Iwai /* link management */
37876f56faeSRakesh Ughreja struct list_head hlink_list;
37976f56faeSRakesh Ughreja bool cmd_dma_state;
38067ae482aSSameer Pujar
38167ae482aSSameer Pujar /* factor used to derive STRIPE control value */
38267ae482aSSameer Pujar unsigned int sdo_limit;
383d068ebc2STakashi Iwai };
384d068ebc2STakashi Iwai
385d068ebc2STakashi Iwai int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
38619abfefdSTakashi Iwai const struct hdac_bus_ops *ops);
387d068ebc2STakashi Iwai void snd_hdac_bus_exit(struct hdac_bus *bus);
388d068ebc2STakashi Iwai int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
389d068ebc2STakashi Iwai unsigned int cmd, unsigned int *res);
390d068ebc2STakashi Iwai
391f9e5fd1bSKai Vehmanen void snd_hdac_codec_link_up(struct hdac_device *codec);
392f9e5fd1bSKai Vehmanen void snd_hdac_codec_link_down(struct hdac_device *codec);
3937639a06cSTakashi Iwai
39414752412STakashi Iwai int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
39514752412STakashi Iwai int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
39614752412STakashi Iwai unsigned int *res);
3976720b384SVinod Koul int snd_hdac_bus_parse_capabilities(struct hdac_bus *bus);
39814752412STakashi Iwai
39914752412STakashi Iwai bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
40014752412STakashi Iwai void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
40114752412STakashi Iwai void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
40214752412STakashi Iwai void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
40314752412STakashi Iwai void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
40414752412STakashi Iwai void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
40575383f8dSYu Zhao int snd_hdac_bus_reset_link(struct hdac_bus *bus, bool full_reset);
406f9e5fd1bSKai Vehmanen void snd_hdac_bus_link_power(struct hdac_device *hdev, bool enable);
40714752412STakashi Iwai
40814752412STakashi Iwai void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
409473f4145STakashi Iwai int snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
41014752412STakashi Iwai void (*ack)(struct hdac_bus *,
41114752412STakashi Iwai struct hdac_stream *));
41214752412STakashi Iwai
413304dad30SJeeja KP int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
414304dad30SJeeja KP void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
415304dad30SJeeja KP
41619abfefdSTakashi Iwai #ifdef CONFIG_SND_HDA_ALIGNED_MMIO
41719abfefdSTakashi Iwai unsigned int snd_hdac_aligned_read(void __iomem *addr, unsigned int mask);
41819abfefdSTakashi Iwai void snd_hdac_aligned_write(unsigned int val, void __iomem *addr,
41919abfefdSTakashi Iwai unsigned int mask);
4204d024fe8STakashi Iwai #define snd_hdac_aligned_mmio(bus) (bus)->aligned_mmio
4214d024fe8STakashi Iwai #else
4224d024fe8STakashi Iwai #define snd_hdac_aligned_mmio(bus) false
4234d024fe8STakashi Iwai #define snd_hdac_aligned_read(addr, mask) 0
4244d024fe8STakashi Iwai #define snd_hdac_aligned_write(val, addr, mask) do {} while (0)
4254d024fe8STakashi Iwai #endif
4264d024fe8STakashi Iwai
snd_hdac_reg_writeb(struct hdac_bus * bus,void __iomem * addr,u8 val)4274d024fe8STakashi Iwai static inline void snd_hdac_reg_writeb(struct hdac_bus *bus, void __iomem *addr,
4284d024fe8STakashi Iwai u8 val)
4294d024fe8STakashi Iwai {
4304d024fe8STakashi Iwai if (snd_hdac_aligned_mmio(bus))
4314d024fe8STakashi Iwai snd_hdac_aligned_write(val, addr, 0xff);
4324d024fe8STakashi Iwai else
4334d024fe8STakashi Iwai writeb(val, addr);
4344d024fe8STakashi Iwai }
4354d024fe8STakashi Iwai
snd_hdac_reg_writew(struct hdac_bus * bus,void __iomem * addr,u16 val)4364d024fe8STakashi Iwai static inline void snd_hdac_reg_writew(struct hdac_bus *bus, void __iomem *addr,
4374d024fe8STakashi Iwai u16 val)
4384d024fe8STakashi Iwai {
4394d024fe8STakashi Iwai if (snd_hdac_aligned_mmio(bus))
4404d024fe8STakashi Iwai snd_hdac_aligned_write(val, addr, 0xffff);
4414d024fe8STakashi Iwai else
4424d024fe8STakashi Iwai writew(val, addr);
4434d024fe8STakashi Iwai }
4444d024fe8STakashi Iwai
snd_hdac_reg_readb(struct hdac_bus * bus,void __iomem * addr)4454d024fe8STakashi Iwai static inline u8 snd_hdac_reg_readb(struct hdac_bus *bus, void __iomem *addr)
4464d024fe8STakashi Iwai {
4474d024fe8STakashi Iwai return snd_hdac_aligned_mmio(bus) ?
4484d024fe8STakashi Iwai snd_hdac_aligned_read(addr, 0xff) : readb(addr);
4494d024fe8STakashi Iwai }
4504d024fe8STakashi Iwai
snd_hdac_reg_readw(struct hdac_bus * bus,void __iomem * addr)4514d024fe8STakashi Iwai static inline u16 snd_hdac_reg_readw(struct hdac_bus *bus, void __iomem *addr)
4524d024fe8STakashi Iwai {
4534d024fe8STakashi Iwai return snd_hdac_aligned_mmio(bus) ?
4544d024fe8STakashi Iwai snd_hdac_aligned_read(addr, 0xffff) : readw(addr);
4554d024fe8STakashi Iwai }
4564d024fe8STakashi Iwai
4574d024fe8STakashi Iwai #define snd_hdac_reg_writel(bus, addr, val) writel(val, addr)
4584d024fe8STakashi Iwai #define snd_hdac_reg_readl(bus, addr) readl(addr)
459c19bd02eSCezary Rojewski #define snd_hdac_reg_writeq(bus, addr, val) writeq(val, addr)
460c19bd02eSCezary Rojewski #define snd_hdac_reg_readq(bus, addr) readq(addr)
46119abfefdSTakashi Iwai
46214752412STakashi Iwai /*
46314752412STakashi Iwai * macros for easy use
46414752412STakashi Iwai */
4652c1f8138STakashi Iwai #define _snd_hdac_chip_writeb(chip, reg, value) \
4664d024fe8STakashi Iwai snd_hdac_reg_writeb(chip, (chip)->remap_addr + (reg), value)
4672c1f8138STakashi Iwai #define _snd_hdac_chip_readb(chip, reg) \
4684d024fe8STakashi Iwai snd_hdac_reg_readb(chip, (chip)->remap_addr + (reg))
4692c1f8138STakashi Iwai #define _snd_hdac_chip_writew(chip, reg, value) \
4704d024fe8STakashi Iwai snd_hdac_reg_writew(chip, (chip)->remap_addr + (reg), value)
4712c1f8138STakashi Iwai #define _snd_hdac_chip_readw(chip, reg) \
4724d024fe8STakashi Iwai snd_hdac_reg_readw(chip, (chip)->remap_addr + (reg))
4732c1f8138STakashi Iwai #define _snd_hdac_chip_writel(chip, reg, value) \
4744d024fe8STakashi Iwai snd_hdac_reg_writel(chip, (chip)->remap_addr + (reg), value)
4752c1f8138STakashi Iwai #define _snd_hdac_chip_readl(chip, reg) \
4764d024fe8STakashi Iwai snd_hdac_reg_readl(chip, (chip)->remap_addr + (reg))
47714752412STakashi Iwai
47814752412STakashi Iwai /* read/write a register, pass without AZX_REG_ prefix */
47914752412STakashi Iwai #define snd_hdac_chip_writel(chip, reg, value) \
4802c1f8138STakashi Iwai _snd_hdac_chip_writel(chip, AZX_REG_ ## reg, value)
48114752412STakashi Iwai #define snd_hdac_chip_writew(chip, reg, value) \
4822c1f8138STakashi Iwai _snd_hdac_chip_writew(chip, AZX_REG_ ## reg, value)
48314752412STakashi Iwai #define snd_hdac_chip_writeb(chip, reg, value) \
4842c1f8138STakashi Iwai _snd_hdac_chip_writeb(chip, AZX_REG_ ## reg, value)
48514752412STakashi Iwai #define snd_hdac_chip_readl(chip, reg) \
4862c1f8138STakashi Iwai _snd_hdac_chip_readl(chip, AZX_REG_ ## reg)
48714752412STakashi Iwai #define snd_hdac_chip_readw(chip, reg) \
4882c1f8138STakashi Iwai _snd_hdac_chip_readw(chip, AZX_REG_ ## reg)
48914752412STakashi Iwai #define snd_hdac_chip_readb(chip, reg) \
4902c1f8138STakashi Iwai _snd_hdac_chip_readb(chip, AZX_REG_ ## reg)
49114752412STakashi Iwai
49214752412STakashi Iwai /* update a register, pass without AZX_REG_ prefix */
49314752412STakashi Iwai #define snd_hdac_chip_updatel(chip, reg, mask, val) \
49414752412STakashi Iwai snd_hdac_chip_writel(chip, reg, \
49514752412STakashi Iwai (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
49614752412STakashi Iwai #define snd_hdac_chip_updatew(chip, reg, mask, val) \
49714752412STakashi Iwai snd_hdac_chip_writew(chip, reg, \
49814752412STakashi Iwai (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
49914752412STakashi Iwai #define snd_hdac_chip_updateb(chip, reg, mask, val) \
50014752412STakashi Iwai snd_hdac_chip_writeb(chip, reg, \
50114752412STakashi Iwai (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))
50214752412STakashi Iwai
50362582341SPierre-Louis Bossart /* update register macro */
50462582341SPierre-Louis Bossart #define snd_hdac_updatel(addr, reg, mask, val) \
50562582341SPierre-Louis Bossart writel(((readl(addr + reg) & ~(mask)) | (val)), addr + reg)
50662582341SPierre-Louis Bossart
50762582341SPierre-Louis Bossart #define snd_hdac_updatew(addr, reg, mask, val) \
50862582341SPierre-Louis Bossart writew(((readw(addr + reg) & ~(mask)) | (val)), addr + reg)
50962582341SPierre-Louis Bossart
51014752412STakashi Iwai /*
51114752412STakashi Iwai * HD-audio stream
51214752412STakashi Iwai */
51314752412STakashi Iwai struct hdac_stream {
51414752412STakashi Iwai struct hdac_bus *bus;
51514752412STakashi Iwai struct snd_dma_buffer bdl; /* BDL buffer */
51614752412STakashi Iwai __le32 *posbuf; /* position buffer pointer */
51714752412STakashi Iwai int direction; /* playback / capture (SNDRV_PCM_STREAM_*) */
51814752412STakashi Iwai
51914752412STakashi Iwai unsigned int bufsize; /* size of the play buffer in bytes */
52014752412STakashi Iwai unsigned int period_bytes; /* size of the period in bytes */
52114752412STakashi Iwai unsigned int frags; /* number for period in the play buffer */
52214752412STakashi Iwai unsigned int fifo_size; /* FIFO size */
52314752412STakashi Iwai
52414752412STakashi Iwai void __iomem *sd_addr; /* stream descriptor pointer */
52514752412STakashi Iwai
52662582341SPierre-Louis Bossart void __iomem *spib_addr; /* software position in buffers stream pointer */
52762582341SPierre-Louis Bossart void __iomem *fifo_addr; /* software position Max fifos stream pointer */
52862582341SPierre-Louis Bossart
52962582341SPierre-Louis Bossart void __iomem *dpibr_addr; /* DMA position in buffer resume pointer */
53062582341SPierre-Louis Bossart u32 dpib; /* DMA position in buffer */
53162582341SPierre-Louis Bossart u32 lpib; /* Linear position in buffer */
53262582341SPierre-Louis Bossart
53314752412STakashi Iwai u32 sd_int_sta_mask; /* stream int status mask */
53414752412STakashi Iwai
53514752412STakashi Iwai /* pcm support */
53614752412STakashi Iwai struct snd_pcm_substream *substream; /* assigned substream,
53714752412STakashi Iwai * set in PCM open
53814752412STakashi Iwai */
5394a9ce6e4SCezary Rojewski struct snd_compr_stream *cstream;
54014752412STakashi Iwai unsigned int format_val; /* format value to be set in the
54114752412STakashi Iwai * controller and the codec
54214752412STakashi Iwai */
54314752412STakashi Iwai unsigned char stream_tag; /* assigned stream */
54414752412STakashi Iwai unsigned char index; /* stream index */
54514752412STakashi Iwai int assigned_key; /* last device# key assigned to */
54614752412STakashi Iwai
54714752412STakashi Iwai bool opened:1;
54814752412STakashi Iwai bool running:1;
5496d23c8f5STakashi Iwai bool prepared:1;
55014752412STakashi Iwai bool no_period_wakeup:1;
5518f3f600bSTakashi Iwai bool locked:1;
552e38e486dSTakashi Iwai bool stripe:1; /* apply stripe control */
55314752412STakashi Iwai
5544a9ce6e4SCezary Rojewski u64 curr_pos;
55514752412STakashi Iwai /* timestamp */
55614752412STakashi Iwai unsigned long start_wallclk; /* start + minimum wallclk */
55714752412STakashi Iwai unsigned long period_wallclk; /* wallclk for period */
55814752412STakashi Iwai struct timecounter tc;
55914752412STakashi Iwai struct cyclecounter cc;
56014752412STakashi Iwai int delay_negative_threshold;
56114752412STakashi Iwai
56214752412STakashi Iwai struct list_head list;
5638f3f600bSTakashi Iwai #ifdef CONFIG_SND_HDA_DSP_LOADER
5648f3f600bSTakashi Iwai /* DSP access mutex */
5658f3f600bSTakashi Iwai struct mutex dsp_mutex;
5668f3f600bSTakashi Iwai #endif
56714752412STakashi Iwai };
56814752412STakashi Iwai
56914752412STakashi Iwai void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
57014752412STakashi Iwai int idx, int direction, int tag);
57114752412STakashi Iwai struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
57214752412STakashi Iwai struct snd_pcm_substream *substream);
573ac3467adSPierre-Louis Bossart void snd_hdac_stream_release_locked(struct hdac_stream *azx_dev);
57414752412STakashi Iwai void snd_hdac_stream_release(struct hdac_stream *azx_dev);
5754308c9b0SJeeja KP struct hdac_stream *snd_hdac_get_stream(struct hdac_bus *bus,
5764308c9b0SJeeja KP int dir, int stream_tag);
57714752412STakashi Iwai
5785eb4ff88SCezary Rojewski int snd_hdac_stream_setup(struct hdac_stream *azx_dev, bool code_loading);
57914752412STakashi Iwai void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
58014752412STakashi Iwai int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
58186f6501bSJeeja KP int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,
58286f6501bSJeeja KP unsigned int format_val);
5834fe20d62SZhang Yiqun void snd_hdac_stream_start(struct hdac_stream *azx_dev);
58414752412STakashi Iwai void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
58524ad3835SPierre-Louis Bossart void snd_hdac_stop_streams(struct hdac_bus *bus);
58612054f0cSPierre-Louis Bossart void snd_hdac_stop_streams_and_chip(struct hdac_bus *bus);
58714752412STakashi Iwai void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
58814752412STakashi Iwai void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
58914752412STakashi Iwai unsigned int streams, unsigned int reg);
59014752412STakashi Iwai void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
59114752412STakashi Iwai unsigned int streams);
59214752412STakashi Iwai void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
59314752412STakashi Iwai unsigned int streams);
5945dd3d271SSameer Pujar int snd_hdac_get_stream_stripe_ctl(struct hdac_bus *bus,
5955dd3d271SSameer Pujar struct snd_pcm_substream *substream);
5965dd3d271SSameer Pujar
59762582341SPierre-Louis Bossart void snd_hdac_stream_spbcap_enable(struct hdac_bus *chip,
59862582341SPierre-Louis Bossart bool enable, int index);
59962582341SPierre-Louis Bossart int snd_hdac_stream_set_spib(struct hdac_bus *bus,
60062582341SPierre-Louis Bossart struct hdac_stream *azx_dev, u32 value);
60162582341SPierre-Louis Bossart int snd_hdac_stream_get_spbmaxfifo(struct hdac_bus *bus,
60262582341SPierre-Louis Bossart struct hdac_stream *azx_dev);
60362582341SPierre-Louis Bossart void snd_hdac_stream_drsm_enable(struct hdac_bus *bus,
60462582341SPierre-Louis Bossart bool enable, int index);
605efffb014SCezary Rojewski int snd_hdac_stream_wait_drsm(struct hdac_stream *azx_dev);
60662582341SPierre-Louis Bossart int snd_hdac_stream_set_dpibr(struct hdac_bus *bus,
60762582341SPierre-Louis Bossart struct hdac_stream *azx_dev, u32 value);
60862582341SPierre-Louis Bossart int snd_hdac_stream_set_lpib(struct hdac_stream *azx_dev, u32 value);
60962582341SPierre-Louis Bossart
61014752412STakashi Iwai /*
61114752412STakashi Iwai * macros for easy use
61214752412STakashi Iwai */
61314752412STakashi Iwai /* read/write a register, pass without AZX_REG_ prefix */
61414752412STakashi Iwai #define snd_hdac_stream_writel(dev, reg, value) \
6154d024fe8STakashi Iwai snd_hdac_reg_writel((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
61614752412STakashi Iwai #define snd_hdac_stream_writew(dev, reg, value) \
6174d024fe8STakashi Iwai snd_hdac_reg_writew((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
61814752412STakashi Iwai #define snd_hdac_stream_writeb(dev, reg, value) \
6194d024fe8STakashi Iwai snd_hdac_reg_writeb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg, value)
62014752412STakashi Iwai #define snd_hdac_stream_readl(dev, reg) \
6214d024fe8STakashi Iwai snd_hdac_reg_readl((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
62214752412STakashi Iwai #define snd_hdac_stream_readw(dev, reg) \
6234d024fe8STakashi Iwai snd_hdac_reg_readw((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
62414752412STakashi Iwai #define snd_hdac_stream_readb(dev, reg) \
6254d024fe8STakashi Iwai snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
6263cab69d9SAmadeusz Sławiński #define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us, timeout_us) \
627556a11a0SAmadeusz Sławiński read_poll_timeout_atomic(snd_hdac_reg_readb, val, cond, delay_us, timeout_us, \
628556a11a0SAmadeusz Sławiński false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
6292ee2c75cSCezary Rojewski #define snd_hdac_stream_readw_poll(dev, reg, val, cond, delay_us, timeout_us) \
6302ee2c75cSCezary Rojewski read_poll_timeout_atomic(snd_hdac_reg_readw, val, cond, delay_us, timeout_us, \
6312ee2c75cSCezary Rojewski false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
6323cab69d9SAmadeusz Sławiński #define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us, timeout_us) \
633556a11a0SAmadeusz Sławiński read_poll_timeout_atomic(snd_hdac_reg_readl, val, cond, delay_us, timeout_us, \
634556a11a0SAmadeusz Sławiński false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
63514752412STakashi Iwai
63614752412STakashi Iwai /* update a register, pass without AZX_REG_ prefix */
63714752412STakashi Iwai #define snd_hdac_stream_updatel(dev, reg, mask, val) \
63814752412STakashi Iwai snd_hdac_stream_writel(dev, reg, \
63914752412STakashi Iwai (snd_hdac_stream_readl(dev, reg) & \
64014752412STakashi Iwai ~(mask)) | (val))
64114752412STakashi Iwai #define snd_hdac_stream_updatew(dev, reg, mask, val) \
64214752412STakashi Iwai snd_hdac_stream_writew(dev, reg, \
64314752412STakashi Iwai (snd_hdac_stream_readw(dev, reg) & \
64414752412STakashi Iwai ~(mask)) | (val))
64514752412STakashi Iwai #define snd_hdac_stream_updateb(dev, reg, mask, val) \
64614752412STakashi Iwai snd_hdac_stream_writeb(dev, reg, \
64714752412STakashi Iwai (snd_hdac_stream_readb(dev, reg) & \
64814752412STakashi Iwai ~(mask)) | (val))
64914752412STakashi Iwai
6508f3f600bSTakashi Iwai #ifdef CONFIG_SND_HDA_DSP_LOADER
6518f3f600bSTakashi Iwai /* DSP lock helpers */
6528f3f600bSTakashi Iwai #define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
6538f3f600bSTakashi Iwai #define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
6548f3f600bSTakashi Iwai #define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
6558f3f600bSTakashi Iwai #define snd_hdac_stream_is_locked(dev) ((dev)->locked)
6568f3f600bSTakashi Iwai /* DSP loader helpers */
6578f3f600bSTakashi Iwai int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
6588f3f600bSTakashi Iwai unsigned int byte_size, struct snd_dma_buffer *bufp);
6598f3f600bSTakashi Iwai void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
6608f3f600bSTakashi Iwai void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
6618f3f600bSTakashi Iwai struct snd_dma_buffer *dmab);
6628f3f600bSTakashi Iwai #else /* CONFIG_SND_HDA_DSP_LOADER */
6638f3f600bSTakashi Iwai #define snd_hdac_dsp_lock_init(dev) do {} while (0)
6648f3f600bSTakashi Iwai #define snd_hdac_dsp_lock(dev) do {} while (0)
6658f3f600bSTakashi Iwai #define snd_hdac_dsp_unlock(dev) do {} while (0)
6668f3f600bSTakashi Iwai #define snd_hdac_stream_is_locked(dev) 0
6678f3f600bSTakashi Iwai
6688f3f600bSTakashi Iwai static inline int
snd_hdac_dsp_prepare(struct hdac_stream * azx_dev,unsigned int format,unsigned int byte_size,struct snd_dma_buffer * bufp)6698f3f600bSTakashi Iwai snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
6708f3f600bSTakashi Iwai unsigned int byte_size, struct snd_dma_buffer *bufp)
6718f3f600bSTakashi Iwai {
6728f3f600bSTakashi Iwai return 0;
6738f3f600bSTakashi Iwai }
6748f3f600bSTakashi Iwai
snd_hdac_dsp_trigger(struct hdac_stream * azx_dev,bool start)6758f3f600bSTakashi Iwai static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
6768f3f600bSTakashi Iwai {
6778f3f600bSTakashi Iwai }
6788f3f600bSTakashi Iwai
snd_hdac_dsp_cleanup(struct hdac_stream * azx_dev,struct snd_dma_buffer * dmab)6798f3f600bSTakashi Iwai static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
6808f3f600bSTakashi Iwai struct snd_dma_buffer *dmab)
6818f3f600bSTakashi Iwai {
6828f3f600bSTakashi Iwai }
6838f3f600bSTakashi Iwai #endif /* CONFIG_SND_HDA_DSP_LOADER */
6848f3f600bSTakashi Iwai
6858f3f600bSTakashi Iwai
68671fc4c7eSTakashi Iwai /*
68771fc4c7eSTakashi Iwai * generic array helpers
68871fc4c7eSTakashi Iwai */
68971fc4c7eSTakashi Iwai void *snd_array_new(struct snd_array *array);
69071fc4c7eSTakashi Iwai void snd_array_free(struct snd_array *array);
snd_array_init(struct snd_array * array,unsigned int size,unsigned int align)69171fc4c7eSTakashi Iwai static inline void snd_array_init(struct snd_array *array, unsigned int size,
69271fc4c7eSTakashi Iwai unsigned int align)
69371fc4c7eSTakashi Iwai {
69471fc4c7eSTakashi Iwai array->elem_size = size;
69571fc4c7eSTakashi Iwai array->alloc_align = align;
69671fc4c7eSTakashi Iwai }
69771fc4c7eSTakashi Iwai
snd_array_elem(struct snd_array * array,unsigned int idx)69871fc4c7eSTakashi Iwai static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
69971fc4c7eSTakashi Iwai {
70071fc4c7eSTakashi Iwai return array->list + idx * array->elem_size;
70171fc4c7eSTakashi Iwai }
70271fc4c7eSTakashi Iwai
snd_array_index(struct snd_array * array,void * ptr)70371fc4c7eSTakashi Iwai static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
70471fc4c7eSTakashi Iwai {
70571fc4c7eSTakashi Iwai return (unsigned long)(ptr - array->list) / array->elem_size;
70671fc4c7eSTakashi Iwai }
70771fc4c7eSTakashi Iwai
708a9c2dfc8STakashi Iwai /* a helper macro to iterate for each snd_array element */
709a9c2dfc8STakashi Iwai #define snd_array_for_each(array, idx, ptr) \
710a9c2dfc8STakashi Iwai for ((idx) = 0, (ptr) = (array)->list; (idx) < (array)->used; \
711a9c2dfc8STakashi Iwai (ptr) = snd_array_elem(array, ++(idx)))
712a9c2dfc8STakashi Iwai
713cab8cf49SAmadeusz Sławiński /*
714cab8cf49SAmadeusz Sławiński * Device matching
715cab8cf49SAmadeusz Sławiński */
716cab8cf49SAmadeusz Sławiński
717cab8cf49SAmadeusz Sławiński #define HDA_CONTROLLER_IS_HSW(pci) (pci_match_id((struct pci_device_id []){ \
718cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_0) }, \
719cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_2) }, \
720cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_HSW_3) }, \
721cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_BDW) }, \
722cab8cf49SAmadeusz Sławiński { } \
723cab8cf49SAmadeusz Sławiński }, pci))
724cab8cf49SAmadeusz Sławiński
725cab8cf49SAmadeusz Sławiński #define HDA_CONTROLLER_IS_APL(pci) (pci_match_id((struct pci_device_id []){ \
726cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_APL) }, \
727cab8cf49SAmadeusz Sławiński { } \
728cab8cf49SAmadeusz Sławiński }, pci))
729cab8cf49SAmadeusz Sławiński
730cab8cf49SAmadeusz Sławiński #define HDA_CONTROLLER_IN_GPU(pci) (pci_match_id((struct pci_device_id []){ \
731cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG1) }, \
732cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_0) }, \
733cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_1) }, \
734cab8cf49SAmadeusz Sławiński { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_DG2_2) }, \
735e8336a63SChaitanya Kumar Borah { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HDA_BMG) }, \
736cab8cf49SAmadeusz Sławiński { } \
737cab8cf49SAmadeusz Sławiński }, pci) || HDA_CONTROLLER_IS_HSW(pci))
738cab8cf49SAmadeusz Sławiński
739e3d280fcSTakashi Iwai #endif /* __SOUND_HDAUDIO_H */
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