/linux/arch/arm/boot/dts/st/ |
H A D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 #include "../armv7-m.dtsi" 49 #include <dt-bindings/clock/stm32fx-clock.h> 50 #include <dt-bindings/mfd/stm32f4-rcc.h> 53 #address-cells = <1>; 54 #size-cells = <1>; 57 clk_hse: clk-hse { 58 #clock-cells = <0>; [all …]
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H A D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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H A D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32h7-clks.h> 45 #include <dt-bindings/mfd/stm32h7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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H A D | stm32mp157.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 15 clocks = <&rcc GPU>, <&rcc GPU_K>; 16 clock-names = "bus" ,"core"; 17 resets = <&rcc GPU_R>; 21 compatible = "st,stm32-dsi"; 23 clocks = <&rcc DSI>, <&clk_hse>, <&rcc DSI_PX>; 24 clock-names = "pclk", "ref", "px_clk"; 25 phy-dsi-supply = <®18>; 26 resets = <&rcc DSI_R>; [all …]
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H A D | stm32f769.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 compatible = "st,stm32f4-bxcan"; 14 interrupt-names = "tx", "rx0", "rx1", "sce"; 15 resets = <&rcc STM32F7_APB1_RESET(CAN3)>; 16 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; 22 compatible = "st,stm32f4-gcan", "syscon"; 24 clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; 28 compatible = "st,stm32-dsi"; 30 clocks = <&rcc 1 CLK_F769_DSI>, <&clk_hse>; 31 clock-names = "pclk", "ref"; [all …]
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H A D | stm32mp135.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 12 compatible = "st,stm32mp13-dcmipp"; 15 resets = <&rcc DCMIPP_R>; 16 clocks = <&rcc DCMIPP_K>; 23 ltdc: display-controller@5a001000 { 24 compatible = "st,stm32-ltdc"; 28 clocks = <&rcc LTDC_PX>; 29 clock-names = "lcd";
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H A D | stm32f769-disco.dts | 2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 /dts-v1/; 45 #include "stm32f769-pinctrl.dtsi" 46 #include <dt-bindings/input/input.h> 47 #include <dt-bindings/gpio/gpio.h> 50 model = "STMicroelectronics STM32F769-DISCO board"; 51 compatible = "st,stm32f769-disco", "st,stm32f769"; 55 stdout-path = "serial0:115200n8"; 63 reserved-memory { [all …]
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/linux/Documentation/devicetree/bindings/net/ |
H A D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: STMicroelectronics STM32 / MCU DWMAC glue layer controller 11 - Alexandre Torgue <alexandre.torgue@foss.st.com> 12 - Christophe Roullier <christophe.roullier@foss.st.com> 23 - st,stm32-dwmac 24 - st,stm32mp1-dwmac 25 - st,stm32mp13-dwmac [all …]
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/linux/Documentation/devicetree/bindings/rtc/ |
H A D | st,stm32-rtc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Real Time Clock 10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com> 15 - st,stm32-rtc 16 - st,stm32h7-rtc 17 - st,stm32mp1-rtc 18 - st,stm32mp25-rtc [all …]
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/linux/Documentation/devicetree/bindings/media/ |
H A D | st,stm32-dma2d.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dma2d.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D 10 Chrom-ART Accelerator(DMA2D), graphical hardware accelerator 15 - Filling a part or the whole of a destination image with a specific color. 16 - Copying a part or the whole of a source image into a part or the whole of 18 - Copying a part or the whole of a source image into a part or the whole of 20 - Blending a part and/or two complete source images with different pixel [all …]
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H A D | st,stm32-dcmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) 10 - Hugues Fruchet <hugues.fruchet@foss.st.com> 14 const: st,stm32-dcmi 25 clock-names: 27 - const: mclk 32 dma-names: [all …]
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/linux/Documentation/devicetree/bindings/display/ |
H A D | st,stm32-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/st,stm32-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DSI host controller 10 - Philippe Cornu <philippe.cornu@foss.st.com> 11 - Yannick Fertre <yannick.fertre@foss.st.com> 14 The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. 17 - $ref: dsi-controller.yaml# 21 const: st,stm32-dsi [all …]
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/linux/Documentation/devicetree/bindings/bus/ |
H A D | st,stm32-etzpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STM32 Extended TrustZone protection controller 11 devices with programmable-security attributes (securable resources). 14 - Gatien Chevallier <gatien.chevallier@foss.st.com> 20 const: st,stm32-etzpc 22 - compatible 27 - const: st,stm32-etzpc [all …]
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | st,stm32-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/st,stm32-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Christian Bruel <christian.bruel@foss.st.com> 16 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml# 17 - $ref: /schemas/pci/st,stm32-pcie-common.yaml# 21 const: st,stm32mp25-pcie-ep 25 - description: Data Bus Interface (DBI) registers. 26 - description: Data Bus Interface (DBI) shadow registers. [all …]
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H A D | st,stm32-pcie-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/st,stm32-pcie-host.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Christian Bruel <christian.bruel@foss.st.com> 16 - $ref: /schemas/pci/snps,dw-pcie.yaml# 17 - $ref: /schemas/pci/st,stm32-pcie-common.yaml# 21 const: st,stm32mp25-pcie-rc 25 - description: Data Bus Interface (DBI) registers. 26 - description: PCIe configuration registers. [all …]
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/linux/Documentation/devicetree/bindings/watchdog/ |
H A D | st,stm32-iwdg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/st,stm32-iwdg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Independent WatchDoG (IWDG) 10 - Yannick Fertre <yannick.fertre@foss.st.com> 11 - Christophe Roullier <christophe.roullier@foss.st.com> 14 - $ref: watchdog.yaml# 19 - st,stm32-iwdg 20 - st,stm32mp1-iwdg [all …]
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | st,stm32-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform 10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 14 - if: 19 - st,stm32f7-i2c 20 - st,stm32mp13-i2c [all …]
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/linux/Documentation/devicetree/bindings/crypto/ |
H A D | st,stm32-cryp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/st,stm32-cryp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 CRYP 9 description: The STM32 CRYP block is built on the CRYP block found in 14 - Lionel Debieve <lionel.debieve@foss.st.com> 19 - st,stn8820-cryp 20 - stericsson,ux500-cryp 21 - st,stm32f756-cryp [all …]
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H A D | st,stm32-hash.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/crypto/st,stm32-hash.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 HASH 9 description: The STM32 HASH block is built on the HASH block found in 14 - Lionel Debieve <lionel.debieve@foss.st.com> 19 - st,stn8820-hash 20 - stericsson,ux500-hash 21 - st,stm32f456-hash [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: STM32 GPIO and Pin Mux/Config controller 11 - Alexandre TORGUE <alexandre.torgue@foss.st.com> 14 STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware 17 on-chip controllers onto these pads. 22 - st,stm32f429-pinctrl 23 - st,stm32f469-pinctrl [all …]
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/linux/Documentation/devicetree/bindings/spi/ |
H A D | st,stm32-spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 SPI Controller 10 The STM32 SPI controller is used to communicate with external devices using 11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and 13 from 4 to 32-bit data size. 16 - Erwan Leray <erwan.leray@foss.st.com> 17 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> [all …]
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H A D | st,stm32-qspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/st,stm32-qspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Quad Serial Peripheral Interface (QSPI) 10 - Christophe Kerello <christophe.kerello@foss.st.com> 11 - Patrice Chotard <patrice.chotard@foss.st.com> 14 - $ref: spi-controller.yaml# 18 const: st,stm32f469-qspi 22 - description: registers [all …]
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/linux/Documentation/devicetree/bindings/iio/adc/ |
H A D | st,stm32-dfsdm-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DFSDM ADC device driver 10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 11 - Olivier Moysan <olivier.moysan@foss.st.com> 14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to 15 interface external sigma delta modulators to STM32 micro controllers. 17 - Sigma delta modulators (motor control, metering...) [all …]
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/linux/Documentation/devicetree/bindings/regulator/ |
H A D | st,stm32-vrefbuf.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/st,stm32-vrefbuf.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Voltage reference buffer 10 Some STM32 devices embed a voltage reference buffer which can be used as 15 - Fabrice Gasnier <fabrice.gasnier@foss.st.com> 18 - $ref: regulator.yaml# 22 const: st,stm32-vrefbuf 30 vdda-supply: [all …]
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/linux/Documentation/devicetree/bindings/hwlock/ |
H A D | st,stm32-hwspinlock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/hwlock/st,stm32-hwspinlock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Hardware Spinlock 10 - Fabien Dessenne <fabien.dessenne@foss.st.com> 13 "#hwlock-cells": 17 const: st,stm32-hwspinlock 25 clock-names: 27 - const: hsem [all …]
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