Searched +full:sp7021 +full:- +full:pwm (Results 1 – 6 of 6) sorted by relevance
/linux/Documentation/devicetree/bindings/pwm/ |
H A D | sunplus,sp7021-pwm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pwm/sunplus,sp7021-pwm.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Sunplus SoC SP7021 PWM Controller 11 - Hammer Hsieh <hammerh0314@gmail.com> 14 - $ref: pwm.yaml# 18 const: sunplus,sp7021-pwm 26 '#pwm-cells': 32 - reg [all …]
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/linux/drivers/pwm/ |
H A D | pwm-sunplus.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * PWM device driver for SUNPLUS SP7021 SoC 7 * https://sunplus-tibbo.atlassian.net/wiki/spaces/doc/overview 9 * Reference Manual(PWM module): 10 * https://sunplus.atlassian.net/wiki/spaces/doc/pages/461144198/12.+Pulse+Width+Modulation+PWM 13 * - Only supports normal polarity. 14 * - It output low when PWM channel disabled. 15 * - When the parameters change, current running period will not be completed 17 * - In .apply() PWM output need to write register FREQ and DUTY. When first write FREQ 29 #include <linux/pwm.h> [all …]
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/linux/drivers/clk/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs 88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 98 multi-function device has one fixed-rate oscillator, clocked 129 be pre-programmed to support other configurations and features not yet 178 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer. 196 For example, the CDCE925 contains two PLLs with spread-spectrum 206 tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier" 237 provides read-only PLLs, derived from the main crystal clock (which 296 clock. These multi-function devices have two (S2MPS14) or three [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 3 obj-$(CONFIG_HAVE_CLK) += clk-devres.o clk-bulk.o clkdev.o 4 obj-$(CONFIG_COMMON_CLK) += clk.o 5 obj-$(CONFIG_CLK_KUNIT_TEST) += clk-test.o 6 clk-test-y := clk_test.o \ 22 obj-$(CONFIG_COMMON_CLK) += clk-divider.o 23 obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o 24 obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o 25 obj-$(CONFIG_CLK_FIXED_RATE_KUNIT_TEST) += clk-fixed-rate-test.o 26 clk-fixed-rate-test-y := clk-fixed-rate_test.o kunit_clk_fixed_rate_test.dtbo.o [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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/linux/drivers/pinctrl/sunplus/ |
H A D | sppctl_sp7021.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * SP7021 Pin Controller Driver. 459 FNCN("PWM0", pinmux_type_fpmx, 0x0E, 0, 7), /* 8x PWM */
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