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/linux/arch/arm/mach-hisi/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on arch/arm/mach-vexpress/platsmp.c, Copyright (C) 2002 ARM Ltd.
7 #include <linux/smp.h>
28 writel_relaxed(__pa_symbol(jump_addr), ctrl_base + ((cpu - 1) << 2)); in hi3xxx_set_cpu_jump()
36 return readl_relaxed(ctrl_base + ((cpu - 1) << 2)); in hi3xxx_get_cpu_jump()
59 u32 offset = 0; in hi3xxx_smp_prepare_cpus() local
74 if (of_property_read_u32(np, "smp-offset", &offset) < 0) { in hi3xxx_smp_prepare_cpus()
76 pr_err("failed to find smp-offset property\n"); in hi3xxx_smp_prepare_cpus()
79 ctrl_base += offset; in hi3xxx_smp_prepare_cpus()
112 writel_relaxed(0xe51ff004, virt); /* ldr pc, [pc, #-4] */ in hix5hd2_set_scu_boot_addr()
[all …]
/linux/arch/powerpc/kernel/
H A Dsmp-tbsync.c1 // SPDX-License-Identifier: GPL-2.0
3 * Smp timebase synchronization for ppc.
11 #include <linux/smp.h>
15 #include <asm/smp.h>
42 tbsync->race_result = add; in enter_contest()
57 tbsync->ack = 1; in smp_generic_take_timebase()
58 while (!tbsync->handshake) in smp_generic_take_timebase()
62 cmd = tbsync->cmd; in smp_generic_take_timebase()
63 tb = tbsync->tb; in smp_generic_take_timebase()
65 tbsync->ack = 0; in smp_generic_take_timebase()
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/linux/arch/csky/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
41 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
134 For SMP, CPU needs "ldex&stex" instructions for atomic operations.
149 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
184 # VA_BITS - PAGE_SHIFT - 3
218 prompt "PAGE OFFSET"
222 bool "PAGE OFFSET 2G (user:kernel = 2:2)"
225 bool "PAGE OFFSET 2.5G (user:kernel = 2.5:1.5)"
234 prompt "C-SKY PMU type"
264 bool "Tightly-Coupled/Sram Memory"
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/linux/sound/synth/emux/
H A Dsoundfont.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (c) 1999-2000 Takashi Iwai <tiwai@suse.de>
69 scoped_guard(spinlock_irqsave, &sflist->lock) { in snd_soundfont_close_check()
70 if (sflist->open_client != client) in snd_soundfont_close_check()
94 dev_err(card->dev, "patch record too small %ld\n", count); in snd_soundfont_load()
95 return -EINVAL; in snd_soundfont_load()
98 return -EFAULT; in snd_soundfont_load()
100 count -= sizeof(patch); in snd_soundfont_load()
104 dev_err(card->dev, "The wrong kind of patch %x\n", patch.key); in snd_soundfont_load()
105 return -EINVAL; in snd_soundfont_load()
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/linux/Documentation/devicetree/bindings/arm/cpu-enable-method/
H A Dal,alpine-smp2 Secondary CPU enable-method "al,alpine-smp" binding
5 This document describes the "al,alpine-smp" method for
7 "al,alpine-smp" enable method should be defined in the
10 Enable method name: "al,alpine-smp"
12 Compatible CPUs: "arm,cortex-a15"
17 "al,alpine-cpu-resume" and "al,alpine-nb-service".
26 - compatible : Should contain "al,alpine-cpu-resume".
27 - reg : Offset and length of the register set for the device
33 #address-cells = <1>;
34 #size-cells = <0>;
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/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dsysctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wei Xu <xuwei5@hisilicon.com>
19 offset. In addition, the HiP01 system controller has some specific control
23 Hisilicon system controller --> hisilicon,sysctrl
24 HiP01 system controller --> hisilicon,hip01-sysctrl
25 Hi6220 system controller --> hisilicon,hi6220-sysctrl
26 Hi3519 system controller --> hisilicon,hi3519-sysctrl
29 - if:
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/linux/drivers/gpio/
H A Dgpio-xtensa.c1 // SPDX-License-Identifier: GPL-2.0
22 * This driver is currently incompatible with SMP. The GPIO32 extension is not
24 * different set of IO wires. A theoretical SMP aware version of this driver
72 static int xtensa_impwire_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_direction() argument
77 static int xtensa_impwire_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_impwire_get_value() argument
86 return !!(impwire & BIT(offset)); in xtensa_impwire_get_value()
89 static int xtensa_expstate_get_direction(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_direction() argument
94 static int xtensa_expstate_get_value(struct gpio_chip *gc, unsigned offset) in xtensa_expstate_get_value() argument
103 return !!(expstate & BIT(offset)); in xtensa_expstate_get_value()
106 static int xtensa_expstate_set_value(struct gpio_chip *gc, unsigned int offset, in xtensa_expstate_set_value() argument
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/linux/kernel/irq/
H A Dipi.c1 // SPDX-License-Identifier: GPL-2.0
15 * irq_reserve_ipi() - Setup an IPI to destination cpumask
26 unsigned int nr_irqs, offset; in irq_reserve_ipi() local
32 return -EINVAL; in irq_reserve_ipi()
37 return -EINVAL; in irq_reserve_ipi()
43 return -EINVAL; in irq_reserve_ipi()
54 offset = 0; in irq_reserve_ipi()
64 offset = cpumask_first(dest); in irq_reserve_ipi()
69 next = cpumask_next_zero(offset, dest); in irq_reserve_ipi()
74 return -EINVAL; in irq_reserve_ipi()
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/linux/arch/mips/cavium-octeon/
H A Dsmp.c6 * Copyright (C) 2004-2008, 2009, 2010 Cavium Networks
10 #include <linux/smp.h>
23 #include <asm/smp.h>
104 pr_info("SMP: Mailbox send cpu=%d, coreid=%d, action=%u\n", cpu, in octeon_send_ipi_single()
131 if (labi->labi_signature != LABI_SIGNATURE) { in octeon_smp_hotplug_setup()
136 octeon_bootloader_entry_addr = labi->InitTLBStart_addr; in octeon_smp_hotplug_setup()
164 if ((id != coreid) && cvmx_coremask_is_core_set(&sysinfo->core_mask, id)) { in octeon_smp_setup()
195 int plat_post_relocation(long offset) in plat_post_relocation() argument
200 octeon_processor_relocated_kernel_entry = entry + offset; in plat_post_relocation()
213 pr_info("SMP: Booting CPU%02d (CoreId %2d)...\n", cpu, in octeon_boot_secondary()
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/linux/arch/arm/mach-ux500/
H A Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2009 ST-Ericsson.
14 #include <linux/smp.h>
36 np = of_find_compatible_node(NULL, NULL, "ste,dbx500-backupram"); in ux500_smp_prepare_cpus()
48 np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); in ux500_smp_prepare_cpus()
71 * at offset 0x1FF4, then write the magic number 0xA1FEED01 to the in ux500_boot_secondary()
72 * backup ram register at offset 0x1FF0, which is what boot rom code in ux500_boot_secondary()
100 CPU_METHOD_OF_DECLARE(ux500_smp, "ste,dbx500-smp", &ux500_smp_ops);
/linux/arch/arm/include/asm/
H A Dassembler.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1996-2000 Russell King
10 * Do not include any C declarations in this file - it is included by
21 #include <asm/opcodes-virt.h>
22 #include <asm/asm-offsets.h>
26 #include <asm/uaccess-asm.h>
77 * set to write-allocate (this would need further testing on XScale when WA
128 stmdb sp!, {r0-r3, ip, lr}
132 ldmia sp!, {r0-r3, ip, lr}
144 stmdb sp!, {r0-r3, ip, lr}
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/linux/arch/loongarch/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
74 select ARCH_SUPPORTS_SCHED_SMT if SMP
75 select ARCH_SUPPORTS_SCHED_MC if SMP
227 bool "32-bit kernel"
229 Select this option if you want to build a 32-bit kernel.
232 bool "64-bit kernel"
234 Select this option if you want to build a 64-bit kernel.
241 prompt "32-bit kernel sub-type"
244 bool "32-bit kernel for LA32R"
246 Select this option if you want to build a 32-bit kernel for
[all …]
/linux/arch/loongarch/kernel/
H A Dalternative.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #define MAX_PATCH_SIZE (((u8)(-1)) / LOONGARCH_INSN_SIZE)
23 __setup("debug-alternative", debug_alt);
41 for (_j = 0; _j < count - 1; _j++) \
50 while (count--) { in add_nops()
51 insn->word = INSN_NOP; in add_nops()
68 long offset; in recompute_jump() local
73 si_l = src->reg0i26_format.immediate_l; in recompute_jump()
74 si_h = src->reg0i26_format.immediate_h; in recompute_jump()
75 switch (src->reg0i26_format.opcode) { in recompute_jump()
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/linux/arch/s390/kernel/
H A Dvdso.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/smp.h>
30 current->mm->context.vdso_base = vma->vm_start; in vdso_mremap()
44 early_initcall(vdso_getcpu_init); /* Must be called before SMP init */
49 struct mm_struct *mm = current->mm; in map_vdso()
55 return -EINTR; in map_vdso()
57 vdso_text_len = vdso_end - vdso_start; in map_vdso()
76 current->mm->context.vdso_base = vdso_text_start; in map_vdso()
86 unsigned long addr, end, offset; in vdso_addr() local
95 end = (start + len + PMD_SIZE - 1) & PMD_MASK; in vdso_addr()
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/linux/arch/powerpc/platforms/8xx/
H A Dmicropatch.c1 // SPDX-License-Identifier: GPL-2.0
324 static void __init cpm_write_patch(cpm8xx_t *cp, int offset, uint *patch, int len) in cpm_write_patch() argument
328 memcpy_toio(cp->cp_dpmem + offset, patch, len); in cpm_write_patch()
333 out_be16(&cp->cp_rccr, 0); in cpm_load_patch()
345 iip = (iic_t *)&cp->cp_dparam[PROFF_IIC]; in cpm_load_patch()
346 out_be16(&iip->iic_rpbase, rpbase); in cpm_load_patch()
348 /* Put SPI above the IIC, also 32-byte aligned. */ in cpm_load_patch()
349 spp = (struct spi_pram *)&cp->cp_dparam[PROFF_SPI]; in cpm_load_patch()
350 out_be16(&spp->rpbase, (rpbase + sizeof(iic_t) + 31) & ~31); in cpm_load_patch()
353 smc_uart_t *smp; in cpm_load_patch() local
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/linux/arch/parisc/include/asm/
H A Dalternative.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define ALT_COND_NO_SMP 0x01 /* when running UP instead of SMP */
7 #define ALT_COND_NO_DCACHE 0x02 /* if system has no d-cache */
8 #define ALT_COND_NO_ICACHE 0x04 /* if system has no i-cache */
24 s32 orig_offset; /* offset to original instructions */
35 /* Alternative SMP implementation. */
39 ".word (0b-4-.) !" \
50 .word (from - .) ! \
51 .hword (to - from)/4, cond ! \
59 .word (from - .) ! \
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/linux/arch/x86/include/asm/numachip/
H A Dnumachip_csr.h6 * Numascale NumaConnect-Specific Header file
17 #include <linux/smp.h>
24 /* 32K CSR space, b15 indicates geo/non-geo */
36 #define NUMACHIP_LCSR_SIZE (NUMACHIP_LCSR_LIM - NUMACHIP_LCSR_BASE + 1)
39 static inline void *lcsr_address(unsigned long offset) in lcsr_address() argument
42 CSR_NODE_BITS(0xfff0) | (offset & CSR_OFFSET_MASK)); in lcsr_address()
45 static inline unsigned int read_lcsr(unsigned long offset) in read_lcsr() argument
47 return swab32(readl(lcsr_address(offset))); in read_lcsr()
50 static inline void write_lcsr(unsigned long offset, unsigned int val) in write_lcsr() argument
52 writel(swab32(val), lcsr_address(offset)); in write_lcsr()
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/linux/arch/x86/kernel/
H A Dhead_64.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/x86/kernel/head_64.S -- start in 32bit and switch to 64bit
21 #include <asm/processor-flags.h>
25 #include <asm/nospec-branch.h>
28 #include <asm/smp.h>
33 * because we need identity-mapped pages.
66 * Note that on SMP the boot CPU uses the init data section until
67 * the per-CPU areas are set up.
89 * be done now, since this also includes setup of the SEV-SNP CPUID table,
101 * Derive the kernel's physical-to-virtual offset from the physical and
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H A Dapm_32.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* -*- linux-c -*-
4 * Copyright 1994-2001 Stephen Rothwell (sfr@canb.auug.org.au)
16 * (Thanks to Ulrich Windl <Ulrich.Windl@rz.uni-regensburg.de>)
43 * 1.1: support user-space standby and suspend, power off after system
46 * is only incorrect by 30-60mS (vs. 1S previously) (Gabor J. Toth
48 * screen-blanking and gpm (Stephen Rothwell); Linux 1.99.4
49 * 1.2a:Simple change to stop mysterious bug reports with SMP also added
50 * levels to the printk calls. APM is not defined for SMP machines.
63 * <echter@informatik.uni-rostock.de>
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/linux/arch/mips/include/asm/
H A Dbmips.h49 #include <asm/smp-ops.h>
69 return -ENODEV; in register_bmips_smp_ops()
74 return -ENODEV; in register_bmips_smp_ops()
94 static inline unsigned long bmips_read_zscm_reg(unsigned int offset) in bmips_read_zscm_reg() argument
99 cache_op(Index_Load_Tag_S, ZSCM_REG_BASE + offset); in bmips_read_zscm_reg()
114 static inline void bmips_write_zscm_reg(unsigned int offset, unsigned long data) in bmips_write_zscm_reg() argument
120 cache_op(Index_Store_Tag_S, ZSCM_REG_BASE + offset); in bmips_write_zscm_reg()
/linux/arch/powerpc/include/asm/book3s/32/
H A Dpgtable.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 #include <asm-generic/pgtable-nopmd.h>
8 * The "classic" 32-bit implementation of the PowerPC MMU uses a hash
13 * active mappings. We maintain a two-level page table tree, much
15 * management code. Low-level assembler code in hash_low_32.S
25 #define _PAGE_COHERENT 0x010 /* M: enforce memory coherence (SMP systems) */
27 #define _PAGE_WRITETHRU 0x040 /* W: cache write-through */
53 * Location of the PFN in the PTE. Most 32-bit platforms use the same
55 * Platform who don't just pre-define the value so we don't override it here.
60 * The mask covered by the RPN must be a ULL on 32-bit platforms with
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/linux/include/xen/interface/
H A Dgrant_table.h1 /* SPDX-License-Identifier: MIT */
6 * page-ownership transfers.
20 /* Some rough guidelines on accessing and updating grant-table entries
21 * in a concurrency-safe manner. For more information, Linux contains a
23 …* http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=drivers/xen/grant-table.c;…
25 * NB. WMB is a no-op on current-generation x86 processors. However, a
29 * 1. Write ent->domid.
30 * 2. Write ent->frame:
32 * GTF_accept_transfer: Pseudo-phys frame slot being filled by new
35 * 4. Write ent->flags, inc. valid type.
[all …]
/linux/include/linux/
H A Dnetfs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
28 * folio_start_private_2 - Start an fscache write on a folio. [DEPRECATED]
56 * Per-inode context. This wraps the VFS inode.
79 * A netfs group - for instance a ceph snap. This is marked on dirty pages and
90 * folio->private
94 unsigned int dirty_offset; /* Write-streaming dirty data offset */
95 unsigned int dirty_len; /* Write-streaming dirty data length */
97 #define NETFS_FOLIO_INFO 0x1UL /* OR'd with folio->private. */
124 return finfo->netfs_group; in netfs_folio_group()
138 unsigned int submit_off; /* Folio offset we're submitting from */
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/linux/drivers/irqchip/
H A Dirq-csky-mpintc.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd.
13 #include <linux/smp.h>
46 #define IRQ_OFFSET(irq) ((irq < COMM_IRQ_BASE) ? irq : (irq - COMM_IRQ_BASE))
85 setup_trigger(d->hwirq, __trigger[d->hwirq]); in csky_mpintc_unmask()
87 writel_relaxed(d->hwirq, reg_base + INTCL_SENR); in csky_mpintc_unmask()
94 writel_relaxed(d->hwirq, reg_base + INTCL_CENR); in csky_mpintc_mask()
101 writel_relaxed(d->hwirq, reg_base + INTCL_CACR); in csky_mpintc_eoi()
108 __trigger[d->hwirq] = 0; in csky_mpintc_set_type()
111 __trigger[d->hwirq] = 1; in csky_mpintc_set_type()
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/linux/block/
H A Dblk-mq-cpumap.c1 // SPDX-License-Identifier: GPL-2.0
3 * CPU <-> hardware queue mapping helpers
5 * Copyright (C) 2013-2014 Jens Axboe
11 #include <linux/smp.h>
18 #include "blk-mq.h"
30 * blk_mq_num_possible_queues - Calc nr of queues for multiqueue devices
45 * blk_mq_num_online_queues - Calc nr of queues for multiqueue devices
64 masks = group_cpus_evenly(qmap->nr_queues, &nr_masks); in blk_mq_map_queues()
67 qmap->mq_map[cpu] = qmap->queue_offset; in blk_mq_map_queues()
71 for (queue = 0; queue < qmap->nr_queues; queue++) { in blk_mq_map_queues()
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