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Searched full:slcr (Results 1 – 9 of 9) sorted by relevance

/linux/arch/arm/mach-zynq/
H A Dslcr.c3 * Xilinx SLCR driver
33 * zynq_slcr_write - Write to a register in SLCR block
36 * @offset: Register offset in SLCR block
46 * zynq_slcr_read - Read a register in SLCR block
48 * @val: Pointer to value to be read from SLCR
49 * @offset: Register offset in SLCR block
59 * zynq_slcr_unlock - Unlock SLCR registers
188 * zynq_early_slcr_init - Early slcr init function
192 * Called very early during boot from platform code to unlock SLCR.
198 np = of_find_compatible_node(NULL, NULL, "xlnx,zynq-slcr"); in zynq_early_slcr_init()
[all …]
H A DMakefile7 obj-y := common.o slcr.o pm.o
H A Dplatsmp.c36 /* MS: Expectation that SLCR are directly map and accessible */ in zynq_cpun_start()
/linux/drivers/reset/
H A Dreset-zynq.c21 struct regmap *slcr; member
40 return regmap_update_bits(priv->slcr, in zynq_reset_assert()
57 return regmap_update_bits(priv->slcr, in zynq_reset_deassert()
76 ret = regmap_read(priv->slcr, priv->offset + (bank * 4), &reg); in zynq_reset_status()
98 priv->slcr = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in zynq_reset_probe()
100 if (IS_ERR(priv->slcr)) { in zynq_reset_probe()
101 dev_err(&pdev->dev, "unable to get zynq-slcr regmap"); in zynq_reset_probe()
102 return PTR_ERR(priv->slcr); in zynq_reset_probe()
/linux/Documentation/devicetree/bindings/reset/
H A Dzynq-reset.txt9 - reg: SLCR offset and size taken via syscon <0x200 0x48>
10 - syscon: <&slcr>
11 This should be a phandle to the Zynq's SLCR registers.
14 The Zynq Reset Manager needs to be a childnode of the SLCR.
21 syscon = <&slcr>;
/linux/Documentation/devicetree/bindings/fpga/
H A Dxilinx-zynq-fpga-mgr.yaml32 Phandle to syscon block which provide access to SLCR registers
51 syscon = <&slcr>;
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-7000.dtsi310 slcr: slcr@f8000000 { label
313 compatible = "xlnx,zynq-slcr", "syscon", "simple-mfd";
338 syscon = <&slcr>;
344 syscon = <&slcr>;
373 syscon = <&slcr>;
/linux/drivers/clk/zynq/
H A Dclkc.c580 struct device_node *slcr; in zynq_clock_init() local
594 slcr = of_get_parent(np); in zynq_clock_init()
596 if (slcr->data) { in zynq_clock_init()
597 zynq_clkc_base = (__force void __iomem *)slcr->data + res.start; in zynq_clock_init()
600 of_node_put(slcr); in zynq_clock_init()
606 of_node_put(slcr); in zynq_clock_init()
/linux/Documentation/devicetree/bindings/clock/
H A Dzynq-7000.txt17 - reg : SLCR offset and size taken via syscon < 0x100 0x100 >