Lines Matching full:slcr
57 * @slcr: MDB System Level Control and Status Register (SLCR) base
65 void __iomem *slcr; member
91 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_DISABLE_MISC); in amd_mdb_intx_irq_mask()
111 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC); in amd_mdb_intx_irq_unmask()
151 val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC); in dw_pcie_rp_intx()
186 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_DISABLE_MISC); in amd_mdb_event_irq_mask()
200 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC); in amd_mdb_event_irq_unmask()
231 val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC); in amd_mdb_pcie_event()
232 val &= ~readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_MASK_MISC); in amd_mdb_pcie_event()
235 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC); in amd_mdb_pcie_event()
259 pcie->slcr + AMD_MDB_TLP_IR_DISABLE_MISC); in amd_mdb_pcie_init_port()
262 val = readl_relaxed(pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC); in amd_mdb_pcie_init_port()
264 writel_relaxed(val, pcie->slcr + AMD_MDB_TLP_IR_STATUS_MISC); in amd_mdb_pcie_init_port()
268 pcie->slcr + AMD_MDB_TLP_IR_ENABLE_MISC); in amd_mdb_pcie_init_port()
438 pcie->slcr = devm_platform_ioremap_resource_byname(pdev, "slcr"); in amd_mdb_add_pcie_port()
439 if (IS_ERR(pcie->slcr)) in amd_mdb_add_pcie_port()
440 return PTR_ERR(pcie->slcr); in amd_mdb_add_pcie_port()