| /linux/arch/arm/mach-spear/ |
| H A D | pl080.c | 26 } signals[16] = {{0, 0}, }; variable
36 if (signals[signal].busy && in pl080_get_signal()
37 (signals[signal].val != cd->muxval)) { in pl080_get_signal()
43 if (!signals[signal].busy) { in pl080_get_signal()
56 signals[signal].busy++; in pl080_get_signal()
57 signals[signal].val = cd->muxval; in pl080_get_signal()
70 if (!signals[signal].busy) in pl080_put_signal()
73 signals[signal].busy--; in pl080_put_signal()
|
| /linux/tools/testing/selftests/arm64/fp/ |
| H A D | README | 30 Terminated by signal 15, no error, iterations=9467, signals=1014
33 Terminated by signal 15, no error, iterations=9448, signals=1028
36 Terminated by signal 15, no error, iterations=9436, signals=1039
39 Terminated by signal 15, no error, iterations=9421, signals=1039
42 Terminated by signal 15, no error, iterations=9403, signals=1039
45 Terminated by signal 15, no error, iterations=9385, signals=1036
48 Terminated by signal 15, no error, iterations=9376, signals=1039
51 Terminated by signal 15, no error, iterations=9361, signals=1039
54 Terminated by signal 15, no error, iterations=9350, signals=1039
|
| /linux/drivers/net/wireless/rsi/ |
| H A D | Kconfig | 3 bool "Redpine Signals Inc devices"
16 tristate "Redpine Signals Inc 91x WLAN driver support"
24 bool "Redpine Signals Inc debug support"
32 tristate "Redpine Signals SDIO bus support"
40 tristate "Redpine Signals USB bus support"
48 bool "Redpine Signals WLAN BT Coexistence support"
|
| /linux/drivers/staging/vc04_services/vchiq-mmal/ |
| H A D | mmal-msg.h | 220 /* Signals that the current payload is the end of the stream of data */
222 /* Signals that the start of the current payload starts a frame */
224 /* Signals that the end of the current payload ends a frame */
226 /* Signals that the current payload contains only complete frames (>1) */
230 /* Signals that the current payload is a keyframe (i.e. self decodable) */
233 * Signals a discontinuity in the stream of data (e.g. after a seek).
238 * Signals a buffer containing some kind of config data for the component
242 /* Signals an encrypted payload */
244 /* Signals a buffer containing side information */
247 * Signals a buffer which is the snapshot/postview image from a stills
[all …]
|
| /linux/Documentation/trace/coresight/ |
| H A D | coresight-ect.rst | 14 individual input and output hardware signals known as triggers to and from
50 The hardware trigger signals can also be connected to non-CoreSight devices
72 capable of generating or using trigger signals.::
100 Individual trigger connection information. This describes trigger signals for
108 * ``in_types`` : functional types for in signals.
109 * ``out_signals`` : output trigger signals for this connection.
110 * ``out_types`` : functional types for out signals.
127 If a connection has zero signals in either the 'in' or 'out' triggers then
177 * ``chan_free``: Show channels with no attached signals.
185 dangerous output signals to be set.
[all …]
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | amlogic,axg-audio-clkc.yaml | 38 - description: input plls to generate clock signals N0
39 - description: input plls to generate clock signals N1
40 - description: input plls to generate clock signals N2
41 - description: input plls to generate clock signals N3
42 - description: input plls to generate clock signals N4
43 - description: input plls to generate clock signals N5
44 - description: input plls to generate clock signals N6
45 - description: input plls to generate clock signals N7
|
| /linux/arch/mips/include/asm/mach-rc32434/ |
| H A D | gpio.h | 39 /* UART GPIO signals */
45 /* M & P bus GPIO signals */
51 /* CPU GPIO signals */
54 /* Reserved GPIO signals */
63 /* NAND GPIO signals */
|
| /linux/arch/um/os-Linux/ |
| H A D | signal.c | 46 /* enable signals if sig isn't IRQ signal */ in sig_handler_common()
56 * These are the asynchronous signals. SIGPROF is excluded because we want to
94 * Note we won't get here if signals are hard-blocked in sig_handler()
249 * This must return with signals disabled, so this barrier in block_signals()
276 * Save and reset save_pending after enabling signals. This in unblock_signals()
291 * We have pending interrupts, so disable signals, as the in unblock_signals()
296 * pending signals will mess up the tracing state. in unblock_signals()
322 /* Re-enable signals and trace that we're doing so. */ in unblock_signals()
386 panic("unblocking signals while not blocked"); in unblock_signals_hard()
403 * pending signals, we can get out of the inner call with the real in unblock_signals_hard()
[all …]
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | nvidia,tegra186-gpio.yaml | 21 and read/write the value of, numerous GPIO signals. Routing of GPIO signals
35 b) GPIO registers, which allow manipulation of the GPIO signals. In some
60 Each GPIO controller can generate a number of interrupt signals. Each
62 ports. Thus, the number of interrupt signals generated by a controller
67 Each GPIO controller in fact generates multiple interrupts signals for
69 one of the interrupt signals generated by a set-of-ports. The intent is
72 The status of each of these per-port-set signals is reported via a
|
| H A D | sprd,gpio-eic.yaml | 24 connections. A debounce mechanism is used to capture the input signals'
32 The EIC-latch sub-module is used to latch some special power down signals
34 clock to capture signals.
36 The EIC-async sub-module uses a 32kHz clock to capture the short signals
41 when detecting input signals.
|
| /linux/drivers/hwtracing/coresight/ |
| H A D | coresight-cti.h | 54 * CTI CSSoc 600 has a max of 32 trigger signals per direction.
62 * Group of related trigger signals
64 * @nr_sigs: number of signals in the group.
66 * @sig_types: array of types for the signals, length nr_sigs.
76 * lists input and output trigger signals for the device
78 * @con_in: connected CTIIN signals for the device.
79 * @con_out: connected CTIOUT signals for the device.
118 * @nr_trig_max: Max number of trigger signals implemented on device.
|
| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | reset.txt | 3 This binding is intended to represent the hardware reset signals present
4 internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
24 may be reset. Instead, reset signals should be represented in the DT node
27 block node for dedicated reset signals. The intent of this binding is to give
28 appropriate software access to the reset signals in order to manage the HW,
|
| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | arm,coresight-cti.yaml | 19 output hardware trigger signals. CTIs can have a maximum number of input and
20 output hardware trigger signals (8 each for v1 CTI, 32 each for v2 CTI). The
30 In general the connections between CTI and components via the trigger signals
40 binding can be declared with no explicit trigger signals. This will result
57 signals to GEN_IO.
59 Note that some hardware trigger signals can be connected to non-CoreSight
133 A trigger connections child node which describes the trigger signals
171 signals. Types in this array match to the corresponding signal in the
188 signals. Types in this array match to the corresponding signal
197 List of CTI trigger out signals that will be blocked from becoming
|
| /linux/drivers/reset/ |
| H A D | Kconfig | 123 Say Y to control the reset signals provided by reset controller.
133 Say Y if you want to control reset signals provided by this
191 reset signals provided by AOSS for Modem, Venus, ADSP,
200 to control reset signals provided by PDC for Modem, Compute,
230 firmware controlling all the reset signals.
307 It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X
321 Say Y if you want to control reset signals provided by System Control
331 on UniPhier SoCs. Say Y if you want to control reset signals
|
| H A D | reset-imx7.c | 25 const struct imx7_src_signal *signals; member
33 const struct imx7_src_signal *signals; member
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
95 const unsigned int bit = imx7src->signals[id].bit; in imx7_reset_set()
129 .signals = imx7_src_signals,
223 const unsigned int bit = imx7src->signals[id].bit; in imx8mq_reset_set()
265 .signals = imx8mq_src_signals,
318 const unsigned int bit = imx7src->signals[id].bit; in imx8mp_reset_set()
353 .signals = imx8mp_src_signals,
372 imx7src->signals = variant->signals; in imx7_reset_probe()
|
| /linux/Documentation/driver-api/ |
| H A D | generic-counter.rst | 80 A counter is defined as a set of input signals associated with count
82 input signals as defined by the respective count functions. Within the
84 each associated with a set of Signals, whose respective Synapse
93 Synapses; i.e. the count data for a set of Signals. The Generic
111 A pair of quadrature encoding signals are evaluated to determine
135 Any state transition on either quadrature pair signals updates the
167 many Signals may be associated with even a single Count. For example, a
183 In this example, two Signals (quadrature encoder lines A and B) are
188 encoder counter device; the Count, Signals, and Synapses simply
191 Signals associated with the same Count can have differing Synapse action
[all …]
|
| H A D | hsi.rst | 15 The serial protocol uses two signals, DATA and FLAG as combined data and clock
16 signals and an additional READY signal for flow control. An additional WAKE
17 signal can be used to wakeup the chips from standby modes. The signals are
18 commonly prefixed by AC for signals going from the application die to the
19 cellular die and CA for signals going the other way around.
|
| H A D | ptp.rst | 25 - Period output signals configurable from user space
99 - 3 Periodic signals (optional interrupt)
107 - GPIO outputs can produce periodic signals
119 - Programmable output periodic signals
131 periodic signals.
134 periodic signals.
|
| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_dmub_srv.c | 1290 ips_fw->signals.bits.ips1_commit, in dc_dmub_srv_notify_idle()
1291 ips_fw->signals.bits.ips2_commit); in dc_dmub_srv_notify_idle()
1331 ips_driver->signals = new_signals; in dc_dmub_srv_notify_idle()
1332 dc_dmub_srv->driver_signals = ips_driver->signals; in dc_dmub_srv_notify_idle()
1339 ips_fw->signals.bits.ips1_commit, in dc_dmub_srv_notify_idle()
1340 ips_fw->signals.bits.ips2_commit); in dc_dmub_srv_notify_idle()
1369 union dmub_shared_state_ips_driver_signals prev_driver_signals = ips_driver->signals; in dc_dmub_srv_exit_low_power_state()
1375 ips_driver->signals.all = 0; in dc_dmub_srv_exit_low_power_state()
1376 dc_dmub_srv->driver_signals = ips_driver->signals; in dc_dmub_srv_exit_low_power_state()
1381 ips_driver->signals.bits.allow_ips1, in dc_dmub_srv_exit_low_power_state()
[all …]
|
| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | snps,dw-pcie-common.yaml | 28 CDM/ELBI (dbi_cs) and CS2 (dbi_cs2) signals (selector bits). Such
47 Endpoint controllers IRQ-signals, the later interface is obviously
49 messages signalling. The System Information IRQ signals are mainly
95 signals (except resets) are synchronous to this clock.
133 signals required to be de-asserted to properly activate the controller
134 sub-parts. All of these signals can be divided into two sub-groups':'
136 are supposed to reset. Note the platforms may have some of these signals
|
| /linux/drivers/counter/ |
| H A D | interrupt-cnt.c | 22 struct counter_signal signals; member
197 priv->signals.name = devm_kasprintf(dev, GFP_KERNEL, "IRQ %d", in interrupt_cnt_probe()
199 if (!priv->signals.name) in interrupt_cnt_probe()
202 counter->signals = &priv->signals; in interrupt_cnt_probe()
207 priv->synapses.signal = &priv->signals; in interrupt_cnt_probe()
|
| /linux/tools/testing/selftests/arm64/signal/ |
| H A D | README | 4 Signals Tests
12 is described (and configured) using the descriptor signals.h::struct tdescr
24 - Signals' test-cases hereafter defined belong currently to two
48 expecting), using the same logic/perspective as in the arm64 Kernel signals
|
| /linux/include/linux/clk/ |
| H A D | analogbits-wrpll-cln28hpc.h | 38 * @divr: reference divider value (6 bits), as presented to the PLL signals
39 * @divf: feedback divider value (9 bits), as presented to the PLL signals
40 * @divq: output divider value (3 bits), as presented to the PLL signals
49 * on its input signals. Thus @divr and @divf are the actual divisors
|
| /linux/drivers/pinctrl/aspeed/ |
| H A D | pinmux-aspeed.h | 19 * Further, not all signals can be unmuxed, as some expressions depend on
38 * C5 is a multi-signal pin (high and low priority signals). Here we touch
56 * bit in the STRAP register. The ACPI bit configures signals on pins in
77 * selecting the signals on pin E18)
118 * signals, but is used to decent effect with some of the UARTs where not all
119 * signals are required. However, this isn't done consistently - UART1 is
120 * enabled on a per-pin basis, and by contrast, all signals for UART6 are
123 * Further, the high and low priority signals listed in the table above share
124 * a configuration bit. The VPI signals should operate in concert in a single
125 * function, but the UART signals should retain the ability to be configured
[all …]
|
| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-coresight-devices-cti | 35 Description: (Read) Input trigger signals from connected device <N>
41 Description: (Read) Functional types for the input trigger signals
48 Description: (Read) Output trigger signals to connected device <N>
54 Description: (Read) Functional types for the output trigger signals
129 Description: (Read) read current status of input trigger signals
135 Description: (Read) read current status of output trigger signals.
214 Description: (Read) show channels with no attached trigger signals.
|