/freebsd/sys/contrib/device-tree/Bindings/power/reset/ |
H A D | ltc2952-poweroff.txt | 3 This chip is used to externally trigger a system shut down. Once the trigger has 4 been sent, the chip's watchdog has to be reset to gracefully shut down. 9 - compatible: Must contain: "lltc,ltc2952" 10 - watchdog-gpios: phandle + gpio-specifier for the GPIO connected to the 12 - kill-gpios: phandle + gpio-specifier for the GPIO connected to the 16 - trigger-gpios: phandle + gpio-specifier for the GPIO connected to the 20 - trigger-delay-ms The number of milliseconds to wait after trigger line 21 assertion before executing shut down procedure. 29 trigger-gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 30 trigger-delay-ms = <2000>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | ti,tas6424.txt | 1 Texas Instruments TAS6424 Quad-Channel Audio amplifier 6 - compatible: "ti,tas6424" - TAS6424 7 - reg: I2C slave address 8 - sound-dai-cells: must be equal to 0 9 - standby-gpios: GPIO used to shut the TAS6424 down. 10 - mute-gpios: GPIO used to mute all the outputs 18 #sound-dai-cells = <0>; 22 https://www.ti.com/product/TAS6424-Q1
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H A D | realtek,rt1015p.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tzung-Bi Shih <tzungbi@kernel.org> 19 - realtek,rt1015p 20 - realtek,rt1019p 22 sdb-gpios: 25 0 means shut down; 1 means power on. 28 "#sound-dai-cells": 32 - compatible [all …]
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H A D | ti,tas2562.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Andrew Davis <afd@ti.com> 14 The TAS2562 is a mono, digital input Class-D audio amplifier optimized for 25 - $ref: dai-common.yaml# 30 - ti,tas2562 31 - ti,tas2564 32 - ti,tas2110 39 shut-down-gpios: [all …]
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H A D | tas2562.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schema [all...] |
/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | ste-hrefv60plus.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright 2012 ST-Ericsson AB 6 #include "ste-href.dtsi" 9 model = "ST-Ericsson HREF (v60+) platform with Device Tree"; 10 compatible = "st-ericsson,hrefv60+", "st-ericsso [all...] |
/freebsd/sys/contrib/device-tree/src/arm/gemini/ |
H A D | gemini-dlink-dns-313.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure 6 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/thermal/thermal.h> 13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure"; 14 compatible = "dlink,dns-313", "cortina,gemini"; 15 #address-cells = <1>; 16 #size-cells = <1>; 19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */ [all …]
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H A D | gemini-dlink-dir-685.dts | 2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router 5 /dts-v1/; 8 #include <dt-bindings/input/input.h> 11 model = "D-Link DIR-685 Xtreme N Storage Router"; 12 compatible = "dlink,dir-685", "cortina,gemini"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */ 24 stdout-path = "uart0:19200n8"; 28 compatible = "gpio-keys"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/gpio/ |
H A D | gpio-eic-sprd.txt | 6 controller contains 4 sub-modules: EIC-debounce, EIC-latch, EIC-async and 7 EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- 10 The EIC-debounce sub-module provides up to 8 source input signal 12 stable status (millisecond resolution) and a single-trigger mechanism 13 is introduced into this sub-module to enhance the input event detection 14 reliability. In addition, this sub-module's clock can be shut off 19 The EIC-latch sub-module is used to latch some special power down signals 20 and generate interrupts, since the EIC-latch does not depend on the APB 23 The EIC-async sub-module uses a 32kHz clock to capture the short signals 26 The EIC-sync is similar with GPIO's input function, which is a synchronized [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra20-asus-tf101.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/atmel-maxtouch.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-binding [all...] |
H A D | tegra30-asus-nexus7-grouper-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/power/summit,smb347-charger.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 11 #include "tegra30-asus-lvds-display.dtsi" 27 * pre-existing /chosen node to be available to insert the 33 trusted-foundations { [all …]
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H A D | tegra30-cardhu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30-cpu-opp-microvol [all...] |
H A D | tegra20-acer-a500-picasso.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/atmel-maxtouch.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-binding [all...] |
H A D | tegra30-asus-transformer-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra30-cpu-opp.dtsi" 9 #include "tegra30-cp [all...] |
H A D | tegra30-lg-x3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/mfd/max77620.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-cpu-opp.dtsi" 11 #include "tegra30-cpu-opp-microvolt.dtsi" 14 chassis-type = "handset"; 30 * pre-existing /chosen node to be available to insert the [all …]
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H A D | tegra20-ventana.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 7 #include "tegra20-cpu-opp.dtsi" 8 #include "tegra20-cpu-op [all...] |
H A D | tegra20-paz00.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra20-cpu-opp.dtsi" 9 #include "tegra20-cpu-opp-microvolt.dtsi" 25 stdout-path = "serial0:115200n8"; 44 vdd-supply = <&hdmi_vdd_reg>; 45 pll-supply = <&hdmi_pll_reg>; 47 nvidia,ddc-i2c-bus = <&hdmi_ddc>; [all …]
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H A D | tegra30-pegatron-chagall.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-op [all...] |
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | omap3-pandora-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <dt-bindings/input/input.h> 14 cpu0-supply = <&vcc>; 29 #clock-cells = <0>; 30 compatible = "fixed-clock"; 31 clock-frequency = <26000000>; 35 compatible = "connector-analog-tv"; 40 remote-endpoint = <&venc_out>; 45 gpio-leds { 47 compatible = "gpio-leds"; [all …]
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/freebsd/sys/dev/qcom_qup/ |
H A D | qcom_spi.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 69 { "qcom,spi-qup-v1.1.1", QCOM_SPI_HW_QPI_V1_1 }, 70 { "qcom,spi-qup-v2.1.1", QCOM_SPI_HW_QPI_V2_1 }, 71 { "qcom,spi-qup-v2.2.1", QCOM_SPI_HW_QPI_V2_2 }, 88 if (sc->cs_pins[cs] == NULL) { in qcom_spi_set_chipsel() 89 device_printf(sc->sc_dev, in qcom_spi_set_chipsel() 112 gpio_pin_set_active(sc->cs_pins[cs], pinactive); in qcom_spi_set_chipsel() 113 gpio_pin_is_active(sc->cs_pins[cs], &pinactive); in qcom_spi_set_chipsel() 128 device_printf(sc->sc_dev, in qcom_spi_intr() [all …]
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/freebsd/sys/dev/bhnd/ |
H A D | bhnd_ids.h | 1 /*- 2 * SPDX-License-Identifier: ISC 4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org> 5 * Copyright (c) 1999-2015, Broadcom Corporation 9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's 30 * JEDEC JEP-106 Core Vendor IDs 32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's 33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell 38 * will need to convert bus-specific vendor IDs to their BHND_MFGID 39 * JEP-106 equivalents. [all …]
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/freebsd/sys/contrib/dev/acpica/ |
H A D | changes.txt | 1 ---------------------------------------- 14 A few fixes including local cache allocation, FFixedHW Region, attribute packing, string vs. non-st… 17 ---------------------------------------- 22 Fix 2 critical CVE addressing memory leaks - Seunghun Han 33 ---------------------------------------- 46 ---------------------------------------- 51 …that the PHAT firmware health record offset works correctly, fix various sub-table offsets, preven… 53 Fix the optional table 4-byte signature. Contributed by: Daniil Tatianin <99danilt@gmail.com> 72 ---------------------------------------- 87 Add new tables for various architectures/OS, mainly RISC-V and also update many more. [all …]
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