xref: /freebsd/sys/contrib/device-tree/src/arm/nvidia/tegra30-asus-nexus7-grouper-common.dtsi (revision 01950c46b8155250f64374fb72fc11faa44bf099)
1f126890aSEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0
2f126890aSEmmanuel Vadot
3f126890aSEmmanuel Vadot#include <dt-bindings/input/gpio-keys.h>
4f126890aSEmmanuel Vadot#include <dt-bindings/input/input.h>
5f126890aSEmmanuel Vadot#include <dt-bindings/power/summit,smb347-charger.h>
6f126890aSEmmanuel Vadot#include <dt-bindings/thermal/thermal.h>
7f126890aSEmmanuel Vadot
8f126890aSEmmanuel Vadot#include "tegra30.dtsi"
9f126890aSEmmanuel Vadot#include "tegra30-cpu-opp.dtsi"
10f126890aSEmmanuel Vadot#include "tegra30-cpu-opp-microvolt.dtsi"
11f126890aSEmmanuel Vadot#include "tegra30-asus-lvds-display.dtsi"
12f126890aSEmmanuel Vadot
13f126890aSEmmanuel Vadot/ {
14f126890aSEmmanuel Vadot	aliases {
15f126890aSEmmanuel Vadot		mmc0 = &sdmmc4; /* eMMC */
16f126890aSEmmanuel Vadot		mmc1 = &sdmmc3; /* WiFi */
17f126890aSEmmanuel Vadot
18f126890aSEmmanuel Vadot		rtc0 = &pmic;
19f126890aSEmmanuel Vadot		rtc1 = "/rtc@7000e000";
20f126890aSEmmanuel Vadot
21f126890aSEmmanuel Vadot		serial1 = &uartc; /* Bluetooth */
22f126890aSEmmanuel Vadot		serial2 = &uartb; /* GPS */
23f126890aSEmmanuel Vadot	};
24f126890aSEmmanuel Vadot
25f126890aSEmmanuel Vadot	/*
26f126890aSEmmanuel Vadot	 * The decompressor and also some bootloaders rely on a
27f126890aSEmmanuel Vadot	 * pre-existing /chosen node to be available to insert the
28f126890aSEmmanuel Vadot	 * command line and merge other ATAGS info.
29f126890aSEmmanuel Vadot	 */
30f126890aSEmmanuel Vadot	chosen {};
31f126890aSEmmanuel Vadot
32f126890aSEmmanuel Vadot	firmware {
33f126890aSEmmanuel Vadot		trusted-foundations {
34f126890aSEmmanuel Vadot			compatible = "tlm,trusted-foundations";
35f126890aSEmmanuel Vadot			tlm,version-major = <0x0>;
36f126890aSEmmanuel Vadot			tlm,version-minor = <0x0>;
37f126890aSEmmanuel Vadot		};
38f126890aSEmmanuel Vadot	};
39f126890aSEmmanuel Vadot
40f126890aSEmmanuel Vadot	memory@80000000 {
41f126890aSEmmanuel Vadot		reg = <0x80000000 0x40000000>;
42f126890aSEmmanuel Vadot	};
43f126890aSEmmanuel Vadot
44f126890aSEmmanuel Vadot	reserved-memory {
45f126890aSEmmanuel Vadot		#address-cells = <1>;
46f126890aSEmmanuel Vadot		#size-cells = <1>;
47f126890aSEmmanuel Vadot		ranges;
48f126890aSEmmanuel Vadot
49f126890aSEmmanuel Vadot		linux,cma@80000000 {
50f126890aSEmmanuel Vadot			compatible = "shared-dma-pool";
51f126890aSEmmanuel Vadot			alloc-ranges = <0x80000000 0x30000000>;
52f126890aSEmmanuel Vadot			size = <0x10000000>; /* 256MiB */
53f126890aSEmmanuel Vadot			linux,cma-default;
54f126890aSEmmanuel Vadot			reusable;
55f126890aSEmmanuel Vadot		};
56f126890aSEmmanuel Vadot
57f126890aSEmmanuel Vadot		ramoops@bfdf0000 {
58f126890aSEmmanuel Vadot			compatible = "ramoops";
59f126890aSEmmanuel Vadot			reg = <0xbfdf0000 0x10000>;	/* 64kB */
60f126890aSEmmanuel Vadot			console-size = <0x8000>;	/* 32kB */
61f126890aSEmmanuel Vadot			record-size = <0x400>;		/*  1kB */
62f126890aSEmmanuel Vadot			ecc-size = <16>;
63f126890aSEmmanuel Vadot		};
64f126890aSEmmanuel Vadot
65f126890aSEmmanuel Vadot		trustzone@bfe00000 {
66f126890aSEmmanuel Vadot			reg = <0xbfe00000 0x200000>;
67f126890aSEmmanuel Vadot			no-map;
68f126890aSEmmanuel Vadot		};
69f126890aSEmmanuel Vadot	};
70f126890aSEmmanuel Vadot
71f126890aSEmmanuel Vadot	gpio@6000d000 {
72f126890aSEmmanuel Vadot		init-low-power-mode-hog {
73f126890aSEmmanuel Vadot			gpio-hog;
74f126890aSEmmanuel Vadot			gpios = <TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
75f126890aSEmmanuel Vadot			input;
76f126890aSEmmanuel Vadot		};
77f126890aSEmmanuel Vadot
78f126890aSEmmanuel Vadot		init-mode-hog {
79f126890aSEmmanuel Vadot			gpio-hog;
80f126890aSEmmanuel Vadot			gpios = <TEGRA_GPIO(DD, 7) GPIO_ACTIVE_HIGH>,
81f126890aSEmmanuel Vadot				<TEGRA_GPIO(CC, 6) GPIO_ACTIVE_HIGH>,
82f126890aSEmmanuel Vadot				<TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
83f126890aSEmmanuel Vadot			output-low;
84f126890aSEmmanuel Vadot		};
85f126890aSEmmanuel Vadot	};
86f126890aSEmmanuel Vadot
87f126890aSEmmanuel Vadot	pinmux@70000868 {
88f126890aSEmmanuel Vadot		pinctrl-names = "default";
89f126890aSEmmanuel Vadot		pinctrl-0 = <&state_default>;
90f126890aSEmmanuel Vadot
91f126890aSEmmanuel Vadot		state_default: pinmux {
92f126890aSEmmanuel Vadot			clk_32k_out_pa0 {
93f126890aSEmmanuel Vadot				nvidia,pins = "clk_32k_out_pa0";
94f126890aSEmmanuel Vadot				nvidia,function = "blink";
95f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
96f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
97f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
98f126890aSEmmanuel Vadot			};
99f126890aSEmmanuel Vadot			uart3_cts_n_pa1 {
100f126890aSEmmanuel Vadot				nvidia,pins = "uart3_cts_n_pa1",
101f126890aSEmmanuel Vadot						"uart3_rxd_pw7";
102f126890aSEmmanuel Vadot				nvidia,function = "uartc";
103f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
105f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106f126890aSEmmanuel Vadot			};
107f126890aSEmmanuel Vadot			dap2_fs_pa2 {
108f126890aSEmmanuel Vadot				nvidia,pins = "dap2_fs_pa2",
109f126890aSEmmanuel Vadot						"dap2_sclk_pa3",
110f126890aSEmmanuel Vadot						"dap2_din_pa4",
111f126890aSEmmanuel Vadot						"dap2_dout_pa5";
112f126890aSEmmanuel Vadot				nvidia,function = "i2s1";
113f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
114f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
115f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
116f126890aSEmmanuel Vadot			};
117f126890aSEmmanuel Vadot			sdmmc3_clk_pa6 {
118f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_clk_pa6";
119f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
120f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
121f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
122f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
123f126890aSEmmanuel Vadot			};
124f126890aSEmmanuel Vadot			sdmmc3_cmd_pa7 {
125f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_cmd_pa7",
126f126890aSEmmanuel Vadot						"sdmmc3_dat3_pb4",
127f126890aSEmmanuel Vadot						"sdmmc3_dat2_pb5",
128f126890aSEmmanuel Vadot						"sdmmc3_dat1_pb6",
129f126890aSEmmanuel Vadot						"sdmmc3_dat0_pb7",
130f126890aSEmmanuel Vadot						"sdmmc3_dat4_pd1",
131f126890aSEmmanuel Vadot						"sdmmc3_dat6_pd3",
132f126890aSEmmanuel Vadot						"sdmmc3_dat7_pd4";
133f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
134f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
135f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
136f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
137f126890aSEmmanuel Vadot			};
138f126890aSEmmanuel Vadot			gmi_a17_pb0 {
139f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a17_pb0",
140f126890aSEmmanuel Vadot						"gmi_a18_pb1";
141f126890aSEmmanuel Vadot				nvidia,function = "uartd";
142f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
143f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
144f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
145f126890aSEmmanuel Vadot			};
146f126890aSEmmanuel Vadot			lcd_pwr0_pb2 {
147f126890aSEmmanuel Vadot				nvidia,pins = "lcd_pwr0_pb2",
148f126890aSEmmanuel Vadot						"lcd_pwr1_pc1",
149f126890aSEmmanuel Vadot						"lcd_m1_pw1";
150f126890aSEmmanuel Vadot				nvidia,function = "displaya";
151f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
152f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
153f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
154f126890aSEmmanuel Vadot			};
155f126890aSEmmanuel Vadot			lcd_pclk_pb3 {
156f126890aSEmmanuel Vadot				nvidia,pins = "lcd_pclk_pb3",
157f126890aSEmmanuel Vadot						"lcd_d0_pe0",
158f126890aSEmmanuel Vadot						"lcd_d1_pe1",
159f126890aSEmmanuel Vadot						"lcd_d2_pe2",
160f126890aSEmmanuel Vadot						"lcd_d3_pe3",
161f126890aSEmmanuel Vadot						"lcd_d4_pe4",
162f126890aSEmmanuel Vadot						"lcd_d5_pe5",
163f126890aSEmmanuel Vadot						"lcd_d6_pe6",
164f126890aSEmmanuel Vadot						"lcd_d7_pe7",
165f126890aSEmmanuel Vadot						"lcd_d8_pf0",
166f126890aSEmmanuel Vadot						"lcd_d9_pf1",
167f126890aSEmmanuel Vadot						"lcd_d10_pf2",
168f126890aSEmmanuel Vadot						"lcd_d11_pf3",
169f126890aSEmmanuel Vadot						"lcd_d12_pf4",
170f126890aSEmmanuel Vadot						"lcd_d13_pf5",
171f126890aSEmmanuel Vadot						"lcd_d14_pf6",
172f126890aSEmmanuel Vadot						"lcd_d15_pf7",
173f126890aSEmmanuel Vadot						"lcd_de_pj1",
174f126890aSEmmanuel Vadot						"lcd_hsync_pj3",
175f126890aSEmmanuel Vadot						"lcd_vsync_pj4",
176f126890aSEmmanuel Vadot						"lcd_d16_pm0",
177f126890aSEmmanuel Vadot						"lcd_d17_pm1",
178f126890aSEmmanuel Vadot						"lcd_d18_pm2",
179f126890aSEmmanuel Vadot						"lcd_d19_pm3",
180f126890aSEmmanuel Vadot						"lcd_d20_pm4",
181f126890aSEmmanuel Vadot						"lcd_d21_pm5",
182f126890aSEmmanuel Vadot						"lcd_d22_pm6",
183f126890aSEmmanuel Vadot						"lcd_d23_pm7",
184f126890aSEmmanuel Vadot						"lcd_cs0_n_pn4",
185f126890aSEmmanuel Vadot						"lcd_sdout_pn5",
186f126890aSEmmanuel Vadot						"lcd_dc0_pn6",
187f126890aSEmmanuel Vadot						"lcd_cs1_n_pw0",
188f126890aSEmmanuel Vadot						"lcd_sdin_pz2",
189f126890aSEmmanuel Vadot						"lcd_sck_pz4";
190f126890aSEmmanuel Vadot				nvidia,function = "displaya";
191f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
192f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
193f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
194f126890aSEmmanuel Vadot			};
195f126890aSEmmanuel Vadot			uart3_rts_n_pc0 {
196f126890aSEmmanuel Vadot				nvidia,pins = "uart3_rts_n_pc0",
197f126890aSEmmanuel Vadot						"uart3_txd_pw6";
198f126890aSEmmanuel Vadot				nvidia,function = "uartc";
199f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
200f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
201f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
202f126890aSEmmanuel Vadot			};
203f126890aSEmmanuel Vadot			uart2_txd_pc2 {
204f126890aSEmmanuel Vadot				nvidia,pins = "uart2_txd_pc2",
205f126890aSEmmanuel Vadot						"uart2_rts_n_pj6";
206f126890aSEmmanuel Vadot				nvidia,function = "uartb";
207f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
209f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
210f126890aSEmmanuel Vadot			};
211f126890aSEmmanuel Vadot			uart2_rxd_pc3 {
212f126890aSEmmanuel Vadot				nvidia,pins = "uart2_rxd_pc3",
213f126890aSEmmanuel Vadot						"uart2_cts_n_pj5";
214f126890aSEmmanuel Vadot				nvidia,function = "uartb";
215f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
217f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218f126890aSEmmanuel Vadot			};
219f126890aSEmmanuel Vadot			gen1_i2c_scl_pc4 {
220f126890aSEmmanuel Vadot				nvidia,pins = "gen1_i2c_scl_pc4",
221f126890aSEmmanuel Vadot						"gen1_i2c_sda_pc5";
222f126890aSEmmanuel Vadot				nvidia,function = "i2c1";
223f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
224f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
225f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
227f126890aSEmmanuel Vadot			};
228f126890aSEmmanuel Vadot			gmi_wp_n_pc7 {
229f126890aSEmmanuel Vadot				nvidia,pins = "gmi_wp_n_pc7",
230f126890aSEmmanuel Vadot						"gmi_wait_pi7",
231f126890aSEmmanuel Vadot						"gmi_cs4_n_pk2",
232f126890aSEmmanuel Vadot						"gmi_cs3_n_pk4";
233f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
234f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
235f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
236f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
237f126890aSEmmanuel Vadot			};
238f126890aSEmmanuel Vadot			gmi_ad12_ph4 {
239f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad12_ph4",
240f126890aSEmmanuel Vadot						"gmi_cs0_n_pj0",
241f126890aSEmmanuel Vadot						"gmi_cs1_n_pj2",
242f126890aSEmmanuel Vadot						"gmi_cs2_n_pk3";
243f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
244f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
245f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
246f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
247f126890aSEmmanuel Vadot			};
248f126890aSEmmanuel Vadot			sdmmc3_dat5_pd0 {
249f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc3_dat5_pd0";
250f126890aSEmmanuel Vadot				nvidia,function = "sdmmc3";
251f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
252f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
253f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
254f126890aSEmmanuel Vadot			};
255f126890aSEmmanuel Vadot			gmi_ad0_pg0 {
256f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad0_pg0",
257f126890aSEmmanuel Vadot						"gmi_ad1_pg1",
258f126890aSEmmanuel Vadot						"gmi_ad14_ph6",
259f126890aSEmmanuel Vadot						"pu1";
260f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
261f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
262f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
263f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
264f126890aSEmmanuel Vadot			};
265f126890aSEmmanuel Vadot			gmi_ad2_pg2 {
266f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad2_pg2",
267f126890aSEmmanuel Vadot						"gmi_ad3_pg3",
268f126890aSEmmanuel Vadot						"gmi_ad6_pg6",
269f126890aSEmmanuel Vadot						"gmi_ad7_pg7";
270f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
271f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
272f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
273f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
274f126890aSEmmanuel Vadot			};
275f126890aSEmmanuel Vadot			gmi_ad4_pg4 {
276f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad4_pg4",
277f126890aSEmmanuel Vadot						"gmi_ad5_pg5";
278f126890aSEmmanuel Vadot				nvidia,function = "nand";
279f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
280f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
281f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
282f126890aSEmmanuel Vadot			};
283f126890aSEmmanuel Vadot			gmi_ad8_ph0 {
284f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad8_ph0";
285f126890aSEmmanuel Vadot				nvidia,function = "pwm0";
286f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
287f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
288f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
289f126890aSEmmanuel Vadot			};
290f126890aSEmmanuel Vadot			gmi_ad9_ph1 {
291f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad9_ph1";
292f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
293f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
294f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
295f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296f126890aSEmmanuel Vadot			};
297f126890aSEmmanuel Vadot			gmi_ad10_ph2 {
298f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad10_ph2";
299f126890aSEmmanuel Vadot				nvidia,function = "pwm2";
300f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
301f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
302f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
303f126890aSEmmanuel Vadot			};
304f126890aSEmmanuel Vadot			gmi_ad11_ph3 {
305f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad11_ph3";
306f126890aSEmmanuel Vadot				nvidia,function = "pwm3";
307f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
308f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
309f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
310f126890aSEmmanuel Vadot			};
311f126890aSEmmanuel Vadot			gmi_ad13_ph5 {
312f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad13_ph5",
313f126890aSEmmanuel Vadot						"gmi_wr_n_pi0",
314f126890aSEmmanuel Vadot						"gmi_oe_n_pi1",
315f126890aSEmmanuel Vadot						"gmi_adv_n_pk0";
316f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
317f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
318f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
319f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
320f126890aSEmmanuel Vadot			};
321f126890aSEmmanuel Vadot			gmi_ad15_ph7 {
322f126890aSEmmanuel Vadot				nvidia,pins = "gmi_ad15_ph7";
323f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
324f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
325f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
326f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
327f126890aSEmmanuel Vadot			};
328f126890aSEmmanuel Vadot			gmi_dqs_pi2 {
329f126890aSEmmanuel Vadot				nvidia,pins = "gmi_dqs_pi2",
330f126890aSEmmanuel Vadot						"pu2",
331f126890aSEmmanuel Vadot						"pv1";
332f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
333f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
334f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
335f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
336f126890aSEmmanuel Vadot			};
337f126890aSEmmanuel Vadot			gmi_rst_n_pi4 {
338f126890aSEmmanuel Vadot				nvidia,pins = "gmi_rst_n_pi4";
339f126890aSEmmanuel Vadot				nvidia,function = "nand";
340f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
341f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
342f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
343f126890aSEmmanuel Vadot			};
344f126890aSEmmanuel Vadot			gmi_iordy_pi5 {
345f126890aSEmmanuel Vadot				nvidia,pins = "gmi_iordy_pi5";
346f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
347f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
348f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
349f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
350f126890aSEmmanuel Vadot			};
351f126890aSEmmanuel Vadot			gmi_cs7_n_pi6 {
352f126890aSEmmanuel Vadot				nvidia,pins = "gmi_cs7_n_pi6",
353f126890aSEmmanuel Vadot						"gmi_clk_pk1";
354f126890aSEmmanuel Vadot				nvidia,function = "nand";
355f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
356f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
357f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
358f126890aSEmmanuel Vadot			};
359f126890aSEmmanuel Vadot			gmi_a16_pj7 {
360f126890aSEmmanuel Vadot				nvidia,pins = "gmi_a16_pj7",
361f126890aSEmmanuel Vadot						"gmi_a19_pk7";
362f126890aSEmmanuel Vadot				nvidia,function = "uartd";
363f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
364f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
365f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
366f126890aSEmmanuel Vadot			};
367f126890aSEmmanuel Vadot			spdif_out_pk5 {
368f126890aSEmmanuel Vadot				nvidia,pins = "spdif_out_pk5";
369f126890aSEmmanuel Vadot				nvidia,function = "spdif";
370f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
371f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
372f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
373f126890aSEmmanuel Vadot			};
374f126890aSEmmanuel Vadot			spdif_in_pk6 {
375f126890aSEmmanuel Vadot				nvidia,pins = "spdif_in_pk6";
376f126890aSEmmanuel Vadot				nvidia,function = "spdif";
377f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
378f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
379f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
380f126890aSEmmanuel Vadot			};
381f126890aSEmmanuel Vadot			dap1_fs_pn0 {
382f126890aSEmmanuel Vadot				nvidia,pins = "dap1_fs_pn0",
383f126890aSEmmanuel Vadot						"dap1_din_pn1",
384f126890aSEmmanuel Vadot						"dap1_dout_pn2",
385f126890aSEmmanuel Vadot						"dap1_sclk_pn3";
386f126890aSEmmanuel Vadot				nvidia,function = "i2s0";
387f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
388f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
389f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
390f126890aSEmmanuel Vadot			};
391f126890aSEmmanuel Vadot			hdmi_int_pn7 {
392f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_int_pn7";
393f126890aSEmmanuel Vadot				nvidia,function = "hdmi";
394f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
395f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
396f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
397f126890aSEmmanuel Vadot			};
398f126890aSEmmanuel Vadot			ulpi_data7_po0 {
399f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data7_po0";
400f126890aSEmmanuel Vadot				nvidia,function = "uarta";
401f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
402f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
403f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
404f126890aSEmmanuel Vadot			};
405f126890aSEmmanuel Vadot			ulpi_data3_po4 {
406f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_data3_po4";
407f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
408f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
409f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
410f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
411f126890aSEmmanuel Vadot			};
412f126890aSEmmanuel Vadot			dap3_fs_pp0 {
413f126890aSEmmanuel Vadot				nvidia,pins = "dap3_fs_pp0";
414f126890aSEmmanuel Vadot				nvidia,function = "i2s2";
415f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
416f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
417f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
418f126890aSEmmanuel Vadot			};
419f126890aSEmmanuel Vadot			dap4_fs_pp4 {
420f126890aSEmmanuel Vadot				nvidia,pins = "dap4_fs_pp4",
421f126890aSEmmanuel Vadot						"dap4_din_pp5",
422f126890aSEmmanuel Vadot						"dap4_dout_pp6",
423f126890aSEmmanuel Vadot						"dap4_sclk_pp7";
424f126890aSEmmanuel Vadot				nvidia,function = "i2s3";
425f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
426f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
427f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
428f126890aSEmmanuel Vadot			};
429f126890aSEmmanuel Vadot			kb_col0_pq0 {
430f126890aSEmmanuel Vadot				nvidia,pins = "kb_col0_pq0",
431f126890aSEmmanuel Vadot						"kb_col1_pq1",
432f126890aSEmmanuel Vadot						"kb_row1_pr1";
433f126890aSEmmanuel Vadot				nvidia,function = "kbc";
434f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
435f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
436f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
437f126890aSEmmanuel Vadot			};
438f126890aSEmmanuel Vadot			kb_col2_pq2 {
439f126890aSEmmanuel Vadot				nvidia,pins = "kb_col2_pq2",
440f126890aSEmmanuel Vadot						"kb_col3_pq3";
441f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
442f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
443f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
444f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
445f126890aSEmmanuel Vadot			};
446f126890aSEmmanuel Vadot			kb_col4_pq4 {
447f126890aSEmmanuel Vadot				nvidia,pins = "kb_col4_pq4",
448f126890aSEmmanuel Vadot						"kb_col5_pq5",
449f126890aSEmmanuel Vadot						"kb_col7_pq7",
450f126890aSEmmanuel Vadot						"kb_row2_pr2",
451f126890aSEmmanuel Vadot						"kb_row4_pr4",
452f126890aSEmmanuel Vadot						"kb_row5_pr5",
453f126890aSEmmanuel Vadot						"kb_row14_ps6";
454f126890aSEmmanuel Vadot				nvidia,function = "kbc";
455f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
456f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
457f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
458f126890aSEmmanuel Vadot			};
459f126890aSEmmanuel Vadot			kb_row0_pr0 {
460f126890aSEmmanuel Vadot				nvidia,pins = "kb_row0_pr0";
461f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
462f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
463f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
464f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
465f126890aSEmmanuel Vadot			};
466f126890aSEmmanuel Vadot			kb_row6_pr6 {
467f126890aSEmmanuel Vadot				nvidia,pins = "kb_row6_pr6",
468f126890aSEmmanuel Vadot						"kb_row8_ps0",
469f126890aSEmmanuel Vadot						"kb_row9_ps1",
470f126890aSEmmanuel Vadot						"kb_row10_ps2";
471f126890aSEmmanuel Vadot				nvidia,function = "kbc";
472f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
473f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
474f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
475f126890aSEmmanuel Vadot			};
476f126890aSEmmanuel Vadot			kb_row11_ps3 {
477f126890aSEmmanuel Vadot				nvidia,pins = "kb_row11_ps3",
478f126890aSEmmanuel Vadot						"kb_row12_ps4";
479f126890aSEmmanuel Vadot				nvidia,function = "kbc";
480f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
481f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
482f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
483f126890aSEmmanuel Vadot			};
484f126890aSEmmanuel Vadot			gen2_i2c_scl_pt5 {
485f126890aSEmmanuel Vadot				nvidia,pins = "gen2_i2c_scl_pt5",
486f126890aSEmmanuel Vadot						"gen2_i2c_sda_pt6";
487f126890aSEmmanuel Vadot				nvidia,function = "i2c2";
488f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
489f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
490f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
491f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
492f126890aSEmmanuel Vadot			};
493f126890aSEmmanuel Vadot			sdmmc4_cmd_pt7 {
494f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_cmd_pt7",
495f126890aSEmmanuel Vadot						"sdmmc4_dat0_paa0",
496f126890aSEmmanuel Vadot						"sdmmc4_dat1_paa1",
497f126890aSEmmanuel Vadot						"sdmmc4_dat2_paa2",
498f126890aSEmmanuel Vadot						"sdmmc4_dat3_paa3",
499f126890aSEmmanuel Vadot						"sdmmc4_dat4_paa4",
500f126890aSEmmanuel Vadot						"sdmmc4_dat5_paa5",
501f126890aSEmmanuel Vadot						"sdmmc4_dat6_paa6",
502f126890aSEmmanuel Vadot						"sdmmc4_dat7_paa7";
503f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
504f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
505f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
506f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
507f126890aSEmmanuel Vadot			};
508f126890aSEmmanuel Vadot			pu0 {
509f126890aSEmmanuel Vadot				nvidia,pins = "pu0",
510f126890aSEmmanuel Vadot						"pu6";
511f126890aSEmmanuel Vadot				nvidia,function = "rsvd4";
512f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
513f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
514f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515f126890aSEmmanuel Vadot			};
516f126890aSEmmanuel Vadot			jtag_rtck_pu7 {
517f126890aSEmmanuel Vadot				nvidia,pins = "jtag_rtck_pu7";
518f126890aSEmmanuel Vadot				nvidia,function = "rtck";
519f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
520f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
521f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
522f126890aSEmmanuel Vadot			};
523f126890aSEmmanuel Vadot			pv0 {
524f126890aSEmmanuel Vadot				nvidia,pins = "pv0";
525f126890aSEmmanuel Vadot				nvidia,function = "rsvd1";
526f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
527f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
528f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
529f126890aSEmmanuel Vadot			};
530f126890aSEmmanuel Vadot			ddc_scl_pv4 {
531f126890aSEmmanuel Vadot				nvidia,pins = "ddc_scl_pv4",
532f126890aSEmmanuel Vadot						"ddc_sda_pv5";
533f126890aSEmmanuel Vadot				nvidia,function = "i2c4";
534f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
535f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
536f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
537f126890aSEmmanuel Vadot			};
538f126890aSEmmanuel Vadot			crt_hsync_pv6 {
539f126890aSEmmanuel Vadot				nvidia,pins = "crt_hsync_pv6",
540f126890aSEmmanuel Vadot						"crt_vsync_pv7";
541f126890aSEmmanuel Vadot				nvidia,function = "crt";
542f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
543f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
544f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
545f126890aSEmmanuel Vadot			};
546f126890aSEmmanuel Vadot			spi2_cs1_n_pw2 {
547f126890aSEmmanuel Vadot				nvidia,pins = "spi2_cs1_n_pw2",
548f126890aSEmmanuel Vadot						"spi2_miso_px1",
549f126890aSEmmanuel Vadot						"spi2_sck_px2";
550f126890aSEmmanuel Vadot				nvidia,function = "spi2";
551f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
552f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
553f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
554f126890aSEmmanuel Vadot			};
555f126890aSEmmanuel Vadot			clk1_out_pw4 {
556f126890aSEmmanuel Vadot				nvidia,pins = "clk1_out_pw4";
557f126890aSEmmanuel Vadot				nvidia,function = "extperiph1";
558f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
559f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
560f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
561f126890aSEmmanuel Vadot			};
562f126890aSEmmanuel Vadot			clk2_out_pw5 {
563f126890aSEmmanuel Vadot				nvidia,pins = "clk2_out_pw5";
564f126890aSEmmanuel Vadot				nvidia,function = "extperiph2";
565f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
566f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
567f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
568f126890aSEmmanuel Vadot			};
569f126890aSEmmanuel Vadot			spi2_cs0_n_px3 {
570f126890aSEmmanuel Vadot				nvidia,pins = "spi2_cs0_n_px3";
571f126890aSEmmanuel Vadot				nvidia,function = "spi6";
572f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
573f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
574f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
575f126890aSEmmanuel Vadot			};
576f126890aSEmmanuel Vadot			spi1_mosi_px4 {
577f126890aSEmmanuel Vadot				nvidia,pins = "spi1_mosi_px4",
578f126890aSEmmanuel Vadot						"spi1_cs0_n_px6";
579f126890aSEmmanuel Vadot				nvidia,function = "spi1";
580f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
581f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
582f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
583f126890aSEmmanuel Vadot			};
584f126890aSEmmanuel Vadot			ulpi_clk_py0 {
585f126890aSEmmanuel Vadot				nvidia,pins = "ulpi_clk_py0",
586f126890aSEmmanuel Vadot						"ulpi_dir_py1";
587f126890aSEmmanuel Vadot				nvidia,function = "ulpi";
588f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
589f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
590f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
591f126890aSEmmanuel Vadot			};
592f126890aSEmmanuel Vadot			sdmmc1_dat3_py4 {
593f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_dat3_py4",
594f126890aSEmmanuel Vadot						"sdmmc1_dat2_py5",
595f126890aSEmmanuel Vadot						"sdmmc1_dat1_py6",
596f126890aSEmmanuel Vadot						"sdmmc1_dat0_py7",
597f126890aSEmmanuel Vadot						"sdmmc1_cmd_pz1";
598f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
599f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
600f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
601f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
602f126890aSEmmanuel Vadot			};
603f126890aSEmmanuel Vadot			sdmmc1_clk_pz0 {
604f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc1_clk_pz0";
605f126890aSEmmanuel Vadot				nvidia,function = "sdmmc1";
606f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
607f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
608f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
609f126890aSEmmanuel Vadot			};
610f126890aSEmmanuel Vadot			lcd_wr_n_pz3 {
611f126890aSEmmanuel Vadot				nvidia,pins = "lcd_wr_n_pz3";
612f126890aSEmmanuel Vadot				nvidia,function = "displaya";
613f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_UP>;
614f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
615f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
616f126890aSEmmanuel Vadot			};
617f126890aSEmmanuel Vadot			sys_clk_req_pz5 {
618f126890aSEmmanuel Vadot				nvidia,pins = "sys_clk_req_pz5";
619f126890aSEmmanuel Vadot				nvidia,function = "sysclk";
620f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
621f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
622f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
623f126890aSEmmanuel Vadot			};
624f126890aSEmmanuel Vadot			pwr_i2c_scl_pz6 {
625f126890aSEmmanuel Vadot				nvidia,pins = "pwr_i2c_scl_pz6",
626f126890aSEmmanuel Vadot						"pwr_i2c_sda_pz7";
627f126890aSEmmanuel Vadot				nvidia,function = "i2cpwr";
628f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
629f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
630f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
631f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
632f126890aSEmmanuel Vadot			};
633f126890aSEmmanuel Vadot			pbb0 {
634f126890aSEmmanuel Vadot				nvidia,pins = "pbb0",
635f126890aSEmmanuel Vadot						"pcc1";
636f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
637f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
638f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
639f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
640f126890aSEmmanuel Vadot			};
641f126890aSEmmanuel Vadot			cam_i2c_scl_pbb1 {
642f126890aSEmmanuel Vadot				nvidia,pins = "cam_i2c_scl_pbb1",
643f126890aSEmmanuel Vadot						"cam_i2c_sda_pbb2";
644f126890aSEmmanuel Vadot				nvidia,function = "i2c3";
645f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
646f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
647f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
648f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
649f126890aSEmmanuel Vadot			};
650f126890aSEmmanuel Vadot			pbb3 {
651f126890aSEmmanuel Vadot				nvidia,pins = "pbb3";
652f126890aSEmmanuel Vadot				nvidia,function = "vgp3";
653f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
654f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
655f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
656f126890aSEmmanuel Vadot			};
657f126890aSEmmanuel Vadot			pbb4 {
658f126890aSEmmanuel Vadot				nvidia,pins = "pbb4";
659f126890aSEmmanuel Vadot				nvidia,function = "vgp4";
660f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
661f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
662f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
663f126890aSEmmanuel Vadot			};
664f126890aSEmmanuel Vadot			pbb5 {
665f126890aSEmmanuel Vadot				nvidia,pins = "pbb5";
666f126890aSEmmanuel Vadot				nvidia,function = "vgp5";
667f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
668f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
669f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
670f126890aSEmmanuel Vadot			};
671f126890aSEmmanuel Vadot			pbb6 {
672f126890aSEmmanuel Vadot				nvidia,pins = "pbb6";
673f126890aSEmmanuel Vadot				nvidia,function = "vgp6";
674f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
675f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
676f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
677f126890aSEmmanuel Vadot			};
678f126890aSEmmanuel Vadot			pbb7 {
679f126890aSEmmanuel Vadot				nvidia,pins = "pbb7",
680f126890aSEmmanuel Vadot						"pcc2";
681f126890aSEmmanuel Vadot				nvidia,function = "i2s4";
682f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
683f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
684f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
685f126890aSEmmanuel Vadot			};
686f126890aSEmmanuel Vadot			cam_mclk_pcc0 {
687f126890aSEmmanuel Vadot				nvidia,pins = "cam_mclk_pcc0";
688f126890aSEmmanuel Vadot				nvidia,function = "vi_alt3";
689f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
690f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
691f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
692f126890aSEmmanuel Vadot			};
693f126890aSEmmanuel Vadot			sdmmc4_rst_n_pcc3 {
694f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_rst_n_pcc3";
695f126890aSEmmanuel Vadot				nvidia,function = "rsvd2";
696f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
697f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
698f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
699f126890aSEmmanuel Vadot			};
700f126890aSEmmanuel Vadot			sdmmc4_clk_pcc4 {
701f126890aSEmmanuel Vadot				nvidia,pins = "sdmmc4_clk_pcc4";
702f126890aSEmmanuel Vadot				nvidia,function = "sdmmc4";
703f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
704f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
705f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
706f126890aSEmmanuel Vadot			};
707f126890aSEmmanuel Vadot			clk2_req_pcc5 {
708f126890aSEmmanuel Vadot				nvidia,pins = "clk2_req_pcc5";
709f126890aSEmmanuel Vadot				nvidia,function = "dap";
710f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
711f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
712f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
713f126890aSEmmanuel Vadot			};
714f126890aSEmmanuel Vadot			pex_l2_rst_n_pcc6 {
715f126890aSEmmanuel Vadot				nvidia,pins = "pex_l2_rst_n_pcc6",
716f126890aSEmmanuel Vadot						"pex_l2_clkreq_n_pcc7";
717f126890aSEmmanuel Vadot				nvidia,function = "pcie";
718f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
719f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
720f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
721f126890aSEmmanuel Vadot			};
722f126890aSEmmanuel Vadot			pex_wake_n_pdd3 {
723f126890aSEmmanuel Vadot				nvidia,pins = "pex_wake_n_pdd3",
724f126890aSEmmanuel Vadot						"pex_l2_prsnt_n_pdd7";
725f126890aSEmmanuel Vadot				nvidia,function = "pcie";
726f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
727f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
728f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
729f126890aSEmmanuel Vadot			};
730f126890aSEmmanuel Vadot			clk3_out_pee0 {
731f126890aSEmmanuel Vadot				nvidia,pins = "clk3_out_pee0";
732f126890aSEmmanuel Vadot				nvidia,function = "extperiph3";
733f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
734f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
735f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
736f126890aSEmmanuel Vadot			};
737f126890aSEmmanuel Vadot			clk1_req_pee2 {
738f126890aSEmmanuel Vadot				nvidia,pins = "clk1_req_pee2";
739f126890aSEmmanuel Vadot				nvidia,function = "dap";
740f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
741f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_ENABLE>;
742f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
743f126890aSEmmanuel Vadot			};
744f126890aSEmmanuel Vadot			hdmi_cec_pee3 {
745f126890aSEmmanuel Vadot				nvidia,pins = "hdmi_cec_pee3";
746f126890aSEmmanuel Vadot				nvidia,function = "cec";
747f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
748f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
749f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
750f126890aSEmmanuel Vadot				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
751f126890aSEmmanuel Vadot			};
752f126890aSEmmanuel Vadot			owr {
753f126890aSEmmanuel Vadot				nvidia,pins = "owr";
754f126890aSEmmanuel Vadot				nvidia,function = "owr";
755f126890aSEmmanuel Vadot				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
756f126890aSEmmanuel Vadot				nvidia,tristate = <TEGRA_PIN_DISABLE>;
757f126890aSEmmanuel Vadot				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
758f126890aSEmmanuel Vadot			};
759f126890aSEmmanuel Vadot			drive_dap1 {
760f126890aSEmmanuel Vadot				nvidia,pins = "drive_dap1",
761f126890aSEmmanuel Vadot						"drive_dap2",
762f126890aSEmmanuel Vadot						"drive_dbg",
763f126890aSEmmanuel Vadot						"drive_at5",
764f126890aSEmmanuel Vadot						"drive_gme",
765f126890aSEmmanuel Vadot						"drive_ddc",
766f126890aSEmmanuel Vadot						"drive_ao1",
767f126890aSEmmanuel Vadot						"drive_uart3";
768f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <0>;
769f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
770f126890aSEmmanuel Vadot				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
771f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <31>;
772f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <31>;
773f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
774f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
775f126890aSEmmanuel Vadot			};
776f126890aSEmmanuel Vadot			drive_sdio1 {
777f126890aSEmmanuel Vadot				nvidia,pins = "drive_sdio1",
778f126890aSEmmanuel Vadot						"drive_sdio3";
779f126890aSEmmanuel Vadot				nvidia,high-speed-mode = <0>;
780f126890aSEmmanuel Vadot				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
781f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <46>;
782f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <42>;
783f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
784f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
785f126890aSEmmanuel Vadot			};
786f126890aSEmmanuel Vadot			drive_gma {
787f126890aSEmmanuel Vadot				nvidia,pins = "drive_gma",
788f126890aSEmmanuel Vadot						"drive_gmb",
789f126890aSEmmanuel Vadot						"drive_gmc",
790f126890aSEmmanuel Vadot						"drive_gmd";
791f126890aSEmmanuel Vadot				nvidia,pull-down-strength = <9>;
792f126890aSEmmanuel Vadot				nvidia,pull-up-strength = <9>;
793f126890aSEmmanuel Vadot				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
794f126890aSEmmanuel Vadot				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
795f126890aSEmmanuel Vadot			};
796f126890aSEmmanuel Vadot		};
797f126890aSEmmanuel Vadot	};
798f126890aSEmmanuel Vadot
799f126890aSEmmanuel Vadot	uartb: serial@70006040 {
800f126890aSEmmanuel Vadot		compatible = "nvidia,tegra30-hsuart";
801aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
802f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
803f126890aSEmmanuel Vadot		/* GPS BCM4751 */
804f126890aSEmmanuel Vadot	};
805f126890aSEmmanuel Vadot
806f126890aSEmmanuel Vadot	uartc: serial@70006200 {
807f126890aSEmmanuel Vadot		compatible = "nvidia,tegra30-hsuart";
808aa1a8ff2SEmmanuel Vadot		reset-names = "serial";
809f126890aSEmmanuel Vadot		/delete-property/ reg-shift;
810f126890aSEmmanuel Vadot		status = "okay";
811f126890aSEmmanuel Vadot
812f126890aSEmmanuel Vadot		nvidia,adjust-baud-rates = <0 9600 100>,
813f126890aSEmmanuel Vadot					   <9600 115200 200>,
814f126890aSEmmanuel Vadot					   <1000000 4000000 136>;
815f126890aSEmmanuel Vadot
816f126890aSEmmanuel Vadot		/* Azurewave AW-NH665 BCM4330B1 */
817f126890aSEmmanuel Vadot		bluetooth {
818f126890aSEmmanuel Vadot			compatible = "brcm,bcm4330-bt";
819f126890aSEmmanuel Vadot
820f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
821f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
822f126890aSEmmanuel Vadot			interrupt-names = "host-wakeup";
823f126890aSEmmanuel Vadot
824f126890aSEmmanuel Vadot			max-speed = <4000000>;
825f126890aSEmmanuel Vadot
826f126890aSEmmanuel Vadot			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
827f126890aSEmmanuel Vadot			clock-names = "txco";
828f126890aSEmmanuel Vadot
829f126890aSEmmanuel Vadot			vbat-supply  = <&vdd_3v3_sys>;
830f126890aSEmmanuel Vadot			vddio-supply = <&vdd_1v8>;
831f126890aSEmmanuel Vadot
832f126890aSEmmanuel Vadot			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
833f126890aSEmmanuel Vadot			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
834f126890aSEmmanuel Vadot		};
835f126890aSEmmanuel Vadot	};
836f126890aSEmmanuel Vadot
837f126890aSEmmanuel Vadot	pwm: pwm@7000a000 {
838f126890aSEmmanuel Vadot		status = "okay";
839f126890aSEmmanuel Vadot	};
840f126890aSEmmanuel Vadot
841f126890aSEmmanuel Vadot	i2c@7000c400 {
842f126890aSEmmanuel Vadot		clock-frequency = <400000>;
843f126890aSEmmanuel Vadot		status = "okay";
844f126890aSEmmanuel Vadot
845f126890aSEmmanuel Vadot		touchscreen@10 {
846f126890aSEmmanuel Vadot			compatible = "elan,ektf3624";
847f126890aSEmmanuel Vadot			reg = <0x10>;
848f126890aSEmmanuel Vadot
849f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
850f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_LEVEL_LOW>;
851f126890aSEmmanuel Vadot
852f126890aSEmmanuel Vadot			reset-gpios = <&gpio TEGRA_GPIO(H, 6) GPIO_ACTIVE_LOW>;
853f126890aSEmmanuel Vadot
854f126890aSEmmanuel Vadot			vcc33-supply = <&vcc_3v3_ts>;
855f126890aSEmmanuel Vadot			vccio-supply = <&vcc_3v3_ts>;
856f126890aSEmmanuel Vadot
857f126890aSEmmanuel Vadot			touchscreen-size-x = <2112>;
858f126890aSEmmanuel Vadot			touchscreen-size-y = <1280>;
859f126890aSEmmanuel Vadot			touchscreen-swapped-x-y;
860f126890aSEmmanuel Vadot			touchscreen-inverted-x;
861f126890aSEmmanuel Vadot		};
862f126890aSEmmanuel Vadot	};
863f126890aSEmmanuel Vadot
864f126890aSEmmanuel Vadot	i2c@7000c500 {
865f126890aSEmmanuel Vadot		clock-frequency = <100000>;
866f126890aSEmmanuel Vadot		status = "okay";
867f126890aSEmmanuel Vadot
868f126890aSEmmanuel Vadot		compass@e {
869f126890aSEmmanuel Vadot			compatible = "asahi-kasei,ak8974";
870f126890aSEmmanuel Vadot			reg = <0x0e>;
871f126890aSEmmanuel Vadot
872f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
873f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(W, 0) IRQ_TYPE_EDGE_RISING>;
874f126890aSEmmanuel Vadot
875f126890aSEmmanuel Vadot			avdd-supply = <&vdd_3v3_sys>;
876f126890aSEmmanuel Vadot			dvdd-supply = <&vdd_1v8>;
877f126890aSEmmanuel Vadot
878f126890aSEmmanuel Vadot			mount-matrix =	 "0", "-1",  "0",
879f126890aSEmmanuel Vadot					"-1",  "0",  "0",
880f126890aSEmmanuel Vadot					 "0",  "0", "-1";
881f126890aSEmmanuel Vadot		};
882f126890aSEmmanuel Vadot
883f126890aSEmmanuel Vadot		light-sensor@1c {
884f126890aSEmmanuel Vadot			compatible = "dynaimage,al3010";
885f126890aSEmmanuel Vadot			reg = <0x1c>;
886f126890aSEmmanuel Vadot
887f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
888f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
889f126890aSEmmanuel Vadot
890f126890aSEmmanuel Vadot			vdd-supply = <&vdd_3v3_sys>;
891f126890aSEmmanuel Vadot		};
892f126890aSEmmanuel Vadot
893f126890aSEmmanuel Vadot		accelerometer@68 {
894f126890aSEmmanuel Vadot			compatible = "invensense,mpu6050";
895f126890aSEmmanuel Vadot			reg = <0x68>;
896f126890aSEmmanuel Vadot
897f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
898f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_RISING>;
899f126890aSEmmanuel Vadot
900f126890aSEmmanuel Vadot			vdd-supply   = <&vdd_3v3_sys>;
901f126890aSEmmanuel Vadot			vddio-supply = <&vdd_1v8>;
902f126890aSEmmanuel Vadot
903f126890aSEmmanuel Vadot			mount-matrix =	 "0", "-1",  "0",
904f126890aSEmmanuel Vadot					"-1",  "0",  "0",
905f126890aSEmmanuel Vadot					 "0",  "0", "-1";
906f126890aSEmmanuel Vadot		};
907f126890aSEmmanuel Vadot	};
908f126890aSEmmanuel Vadot
909f126890aSEmmanuel Vadot	i2c@7000d000 {
910f126890aSEmmanuel Vadot		clock-frequency = <100000>;
911f126890aSEmmanuel Vadot		status = "okay";
912f126890aSEmmanuel Vadot
913f126890aSEmmanuel Vadot		rt5640: audio-codec@1c {
914f126890aSEmmanuel Vadot			compatible = "realtek,rt5640";
915f126890aSEmmanuel Vadot			reg = <0x1c>;
916f126890aSEmmanuel Vadot
917f126890aSEmmanuel Vadot			realtek,dmic1-data-pin = <1>;
918*01950c46SEmmanuel Vadot
919*01950c46SEmmanuel Vadot			clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
920*01950c46SEmmanuel Vadot			clock-names = "mclk";
921f126890aSEmmanuel Vadot		};
922f126890aSEmmanuel Vadot
923f126890aSEmmanuel Vadot		nct72: temperature-sensor@4c {
924f126890aSEmmanuel Vadot			compatible = "onnn,nct1008";
925f126890aSEmmanuel Vadot			reg = <0x4c>;
926f126890aSEmmanuel Vadot			vcc-supply = <&vdd_3v3_sys>;
927f126890aSEmmanuel Vadot
928f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
929f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(S, 3) IRQ_TYPE_EDGE_FALLING>;
930f126890aSEmmanuel Vadot
931f126890aSEmmanuel Vadot			#thermal-sensor-cells = <1>;
932f126890aSEmmanuel Vadot		};
933f126890aSEmmanuel Vadot
934f126890aSEmmanuel Vadot		fuel-gauge@55 {
935f126890aSEmmanuel Vadot			compatible = "ti,bq27541";
936f126890aSEmmanuel Vadot			reg = <0x55>;
937f126890aSEmmanuel Vadot			power-supplies = <&power_supply>;
938f126890aSEmmanuel Vadot		};
939f126890aSEmmanuel Vadot
940f126890aSEmmanuel Vadot		power_supply: charger@6a {
941f126890aSEmmanuel Vadot			compatible = "summit,smb347";
942f126890aSEmmanuel Vadot			reg = <0x6a>;
943f126890aSEmmanuel Vadot
944f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
945f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(V, 1) IRQ_TYPE_EDGE_BOTH>;
946f126890aSEmmanuel Vadot
947f126890aSEmmanuel Vadot			summit,enable-charge-control = <SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW>;
948f126890aSEmmanuel Vadot			summit,inok-polarity = <SMB3XX_SYSOK_INOK_ACTIVE_LOW>;
949f126890aSEmmanuel Vadot			summit,enable-usb-charging;
950f126890aSEmmanuel Vadot
951f126890aSEmmanuel Vadot			monitored-battery = <&battery_cell>;
952f126890aSEmmanuel Vadot
953f126890aSEmmanuel Vadot			usb_vbus: usb-vbus {
954f126890aSEmmanuel Vadot				regulator-name = "usb_vbus";
955f126890aSEmmanuel Vadot				regulator-min-microvolt = <5000000>;
956f126890aSEmmanuel Vadot				regulator-max-microvolt = <5000000>;
957f126890aSEmmanuel Vadot				regulator-min-microamp = <750000>;
958f126890aSEmmanuel Vadot				regulator-max-microamp = <750000>;
959f126890aSEmmanuel Vadot
960f126890aSEmmanuel Vadot				/*
961f126890aSEmmanuel Vadot				 * SMB347 INOK input pin is connected to PMIC's
962f126890aSEmmanuel Vadot				 * ACOK output, which is fixed to ACTIVE_LOW as
963f126890aSEmmanuel Vadot				 * long as battery voltage is in a good range.
964f126890aSEmmanuel Vadot				 *
965f126890aSEmmanuel Vadot				 * Active INOK disables SMB347 output, so polarity
966f126890aSEmmanuel Vadot				 * needs to be toggled when we want to get the
967f126890aSEmmanuel Vadot				 * output.
968f126890aSEmmanuel Vadot				 */
969f126890aSEmmanuel Vadot				summit,needs-inok-toggle;
970f126890aSEmmanuel Vadot			};
971f126890aSEmmanuel Vadot		};
972f126890aSEmmanuel Vadot	};
973f126890aSEmmanuel Vadot
974f126890aSEmmanuel Vadot	pmc@7000e400 {
975f126890aSEmmanuel Vadot		status = "okay";
976f126890aSEmmanuel Vadot		nvidia,invert-interrupt;
977f126890aSEmmanuel Vadot		nvidia,suspend-mode = <1>;
978f126890aSEmmanuel Vadot		nvidia,cpu-pwr-good-time = <2000>;
979f126890aSEmmanuel Vadot		nvidia,cpu-pwr-off-time = <200>;
980f126890aSEmmanuel Vadot		nvidia,core-pwr-good-time = <3845 3845>;
981f126890aSEmmanuel Vadot		nvidia,core-pwr-off-time = <0>;
982f126890aSEmmanuel Vadot		nvidia,core-power-req-active-high;
983f126890aSEmmanuel Vadot		nvidia,sys-clock-req-active-high;
984f126890aSEmmanuel Vadot		core-supply = <&vdd_core>;
985f126890aSEmmanuel Vadot	};
986f126890aSEmmanuel Vadot
987f126890aSEmmanuel Vadot	ahub@70080000 {
988f126890aSEmmanuel Vadot		i2s@70080400 {
989f126890aSEmmanuel Vadot			status = "okay";
990f126890aSEmmanuel Vadot		};
991f126890aSEmmanuel Vadot	};
992f126890aSEmmanuel Vadot
993f126890aSEmmanuel Vadot	sdmmc3: mmc@78000400 {
994f126890aSEmmanuel Vadot		status = "okay";
995f126890aSEmmanuel Vadot
996f126890aSEmmanuel Vadot		#address-cells = <1>;
997f126890aSEmmanuel Vadot		#size-cells = <0>;
998f126890aSEmmanuel Vadot
999f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
1000f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_C>;
1001f126890aSEmmanuel Vadot		assigned-clock-rates = <50000000>;
1002f126890aSEmmanuel Vadot
1003f126890aSEmmanuel Vadot		max-frequency = <50000000>;
1004f126890aSEmmanuel Vadot		keep-power-in-suspend;
1005f126890aSEmmanuel Vadot		bus-width = <4>;
1006f126890aSEmmanuel Vadot		non-removable;
1007f126890aSEmmanuel Vadot
1008f126890aSEmmanuel Vadot		mmc-pwrseq = <&brcm_wifi_pwrseq>;
1009f126890aSEmmanuel Vadot		vmmc-supply = <&vdd_3v3_sys>;
1010f126890aSEmmanuel Vadot		vqmmc-supply = <&vdd_1v8>;
1011f126890aSEmmanuel Vadot
1012f126890aSEmmanuel Vadot		/* Azurewave AW-NH665 BCM4330 */
1013f126890aSEmmanuel Vadot		wifi@1 {
1014f126890aSEmmanuel Vadot			reg = <1>;
1015f126890aSEmmanuel Vadot			compatible = "brcm,bcm4329-fmac";
1016f126890aSEmmanuel Vadot			interrupt-parent = <&gpio>;
1017f126890aSEmmanuel Vadot			interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_LEVEL_HIGH>;
1018f126890aSEmmanuel Vadot			interrupt-names = "host-wake";
1019f126890aSEmmanuel Vadot		};
1020f126890aSEmmanuel Vadot	};
1021f126890aSEmmanuel Vadot
1022f126890aSEmmanuel Vadot	sdmmc4: mmc@78000600 {
1023f126890aSEmmanuel Vadot		status = "okay";
1024f126890aSEmmanuel Vadot		bus-width = <8>;
1025f126890aSEmmanuel Vadot		vmmc-supply = <&vcore_emmc>;
1026f126890aSEmmanuel Vadot		vqmmc-supply = <&vdd_1v8>;
1027f126890aSEmmanuel Vadot		non-removable;
1028f126890aSEmmanuel Vadot	};
1029f126890aSEmmanuel Vadot
1030f126890aSEmmanuel Vadot	usb@7d000000 {
1031f126890aSEmmanuel Vadot		compatible = "nvidia,tegra30-udc";
1032f126890aSEmmanuel Vadot		status = "okay";
1033f126890aSEmmanuel Vadot		dr_mode = "otg";
1034f126890aSEmmanuel Vadot		vbus-supply = <&usb_vbus>;
1035f126890aSEmmanuel Vadot	};
1036f126890aSEmmanuel Vadot
1037f126890aSEmmanuel Vadot	usb-phy@7d000000 {
1038f126890aSEmmanuel Vadot		status = "okay";
1039f126890aSEmmanuel Vadot		dr_mode = "otg";
1040f126890aSEmmanuel Vadot		nvidia,hssync-start-delay = <0>;
1041f126890aSEmmanuel Vadot		nvidia,xcvr-lsfslew = <2>;
1042f126890aSEmmanuel Vadot		nvidia,xcvr-lsrslew = <2>;
1043f126890aSEmmanuel Vadot	};
1044f126890aSEmmanuel Vadot
1045f126890aSEmmanuel Vadot	backlight: backlight {
1046f126890aSEmmanuel Vadot		compatible = "pwm-backlight";
1047f126890aSEmmanuel Vadot
1048f126890aSEmmanuel Vadot		power-supply = <&vdd_5v0_sys>;
1049f126890aSEmmanuel Vadot		pwms = <&pwm 0 50000>;
1050f126890aSEmmanuel Vadot
1051f126890aSEmmanuel Vadot		brightness-levels = <1 255>;
1052f126890aSEmmanuel Vadot		num-interpolated-steps = <254>;
1053f126890aSEmmanuel Vadot		default-brightness-level = <15>;
1054f126890aSEmmanuel Vadot	};
1055f126890aSEmmanuel Vadot
1056f126890aSEmmanuel Vadot	battery_cell: battery-cell {
1057f126890aSEmmanuel Vadot		compatible = "simple-battery";
1058f126890aSEmmanuel Vadot		constant-charge-current-max-microamp = <1800000>;
1059f126890aSEmmanuel Vadot		operating-range-celsius = <0 45>;
1060f126890aSEmmanuel Vadot	};
1061f126890aSEmmanuel Vadot
1062f126890aSEmmanuel Vadot	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
1063f126890aSEmmanuel Vadot	clk32k_in: clock-32k {
1064f126890aSEmmanuel Vadot		compatible = "fixed-clock";
1065f126890aSEmmanuel Vadot		#clock-cells = <0>;
1066f126890aSEmmanuel Vadot		clock-frequency = <32768>;
1067f126890aSEmmanuel Vadot		clock-output-names = "pmic-oscillator";
1068f126890aSEmmanuel Vadot	};
1069f126890aSEmmanuel Vadot
1070f126890aSEmmanuel Vadot	cpus {
1071f126890aSEmmanuel Vadot		cpu0: cpu@0 {
1072f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
1073f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1074f126890aSEmmanuel Vadot			#cooling-cells = <2>;
1075f126890aSEmmanuel Vadot		};
1076f126890aSEmmanuel Vadot
1077f126890aSEmmanuel Vadot		cpu1: cpu@1 {
1078f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
1079f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1080f126890aSEmmanuel Vadot			#cooling-cells = <2>;
1081f126890aSEmmanuel Vadot		};
1082f126890aSEmmanuel Vadot
1083f126890aSEmmanuel Vadot		cpu2: cpu@2 {
1084f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
1085f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1086f126890aSEmmanuel Vadot			#cooling-cells = <2>;
1087f126890aSEmmanuel Vadot		};
1088f126890aSEmmanuel Vadot
1089f126890aSEmmanuel Vadot		cpu3: cpu@3 {
1090f126890aSEmmanuel Vadot			cpu-supply = <&vdd_cpu>;
1091f126890aSEmmanuel Vadot			operating-points-v2 = <&cpu0_opp_table>;
1092f126890aSEmmanuel Vadot			#cooling-cells = <2>;
1093f126890aSEmmanuel Vadot		};
1094f126890aSEmmanuel Vadot	};
1095f126890aSEmmanuel Vadot
1096f126890aSEmmanuel Vadot	display-panel {
1097f126890aSEmmanuel Vadot		/*
1098aa1a8ff2SEmmanuel Vadot		 * Some device variants come with a Hydis HV070WX2-1E0, but
1099aa1a8ff2SEmmanuel Vadot		 * since they are all largely compatible, we'll go with the
1100aa1a8ff2SEmmanuel Vadot		 * Chunghwa one here.
1101f126890aSEmmanuel Vadot		 */
1102aa1a8ff2SEmmanuel Vadot		compatible = "chunghwa,claa070wp03xg", "panel-lvds";
1103f126890aSEmmanuel Vadot
1104f126890aSEmmanuel Vadot		width-mm = <94>;
1105f126890aSEmmanuel Vadot		height-mm = <150>;
1106f126890aSEmmanuel Vadot		rotation = <180>;
1107f126890aSEmmanuel Vadot
1108f126890aSEmmanuel Vadot		data-mapping = "jeida-24";
1109f126890aSEmmanuel Vadot
1110f126890aSEmmanuel Vadot		/* DDC unconnected on Nexus 7 */
1111f126890aSEmmanuel Vadot		/delete-property/ ddc-i2c-bus;
1112f126890aSEmmanuel Vadot	};
1113f126890aSEmmanuel Vadot
1114f126890aSEmmanuel Vadot	gpio-keys {
1115f126890aSEmmanuel Vadot		compatible = "gpio-keys";
1116f126890aSEmmanuel Vadot
1117f126890aSEmmanuel Vadot		key-power {
1118f126890aSEmmanuel Vadot			label = "Power";
1119f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
1120f126890aSEmmanuel Vadot			linux,code = <KEY_POWER>;
1121f126890aSEmmanuel Vadot			debounce-interval = <10>;
1122f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
1123f126890aSEmmanuel Vadot			wakeup-source;
1124f126890aSEmmanuel Vadot		};
1125f126890aSEmmanuel Vadot
1126f126890aSEmmanuel Vadot		key-volume-down {
1127f126890aSEmmanuel Vadot			label = "Volume Down";
1128f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
1129f126890aSEmmanuel Vadot			linux,code = <KEY_VOLUMEDOWN>;
1130f126890aSEmmanuel Vadot			debounce-interval = <10>;
1131f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
1132f126890aSEmmanuel Vadot			wakeup-source;
1133f126890aSEmmanuel Vadot		};
1134f126890aSEmmanuel Vadot
1135f126890aSEmmanuel Vadot		key-volume-up {
1136f126890aSEmmanuel Vadot			label = "Volume Up";
1137f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(Q, 2) GPIO_ACTIVE_LOW>;
1138f126890aSEmmanuel Vadot			linux,code = <KEY_VOLUMEUP>;
1139f126890aSEmmanuel Vadot			debounce-interval = <10>;
1140f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_ASSERTED>;
1141f126890aSEmmanuel Vadot			wakeup-source;
1142f126890aSEmmanuel Vadot		};
1143f126890aSEmmanuel Vadot
1144f126890aSEmmanuel Vadot		switch-hall-sensor {
1145f126890aSEmmanuel Vadot			label = "Lid";
1146f126890aSEmmanuel Vadot			gpios = <&gpio TEGRA_GPIO(S, 6) GPIO_ACTIVE_LOW>;
1147f126890aSEmmanuel Vadot			linux,input-type = <EV_SW>;
1148f126890aSEmmanuel Vadot			linux,code = <SW_LID>;
1149f126890aSEmmanuel Vadot			debounce-interval = <500>;
1150f126890aSEmmanuel Vadot			wakeup-event-action = <EV_ACT_DEASSERTED>;
1151f126890aSEmmanuel Vadot			wakeup-source;
1152f126890aSEmmanuel Vadot		};
1153f126890aSEmmanuel Vadot	};
1154f126890aSEmmanuel Vadot
1155f126890aSEmmanuel Vadot	brcm_wifi_pwrseq: pwrseq-wifi {
1156f126890aSEmmanuel Vadot		compatible = "mmc-pwrseq-simple";
1157f126890aSEmmanuel Vadot
1158f126890aSEmmanuel Vadot		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
1159f126890aSEmmanuel Vadot		clock-names = "ext_clock";
1160f126890aSEmmanuel Vadot
1161f126890aSEmmanuel Vadot		reset-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_LOW>;
1162f126890aSEmmanuel Vadot		post-power-on-delay-ms = <300>;
1163f126890aSEmmanuel Vadot		power-off-delay-us = <300>;
1164f126890aSEmmanuel Vadot	};
1165f126890aSEmmanuel Vadot
1166f126890aSEmmanuel Vadot	vdd_5v0_sys: regulator-5v0 {
1167f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1168f126890aSEmmanuel Vadot		regulator-name = "vdd_5v0";
1169f126890aSEmmanuel Vadot		regulator-min-microvolt = <5000000>;
1170f126890aSEmmanuel Vadot		regulator-max-microvolt = <5000000>;
1171f126890aSEmmanuel Vadot		regulator-always-on;
1172f126890aSEmmanuel Vadot		regulator-boot-on;
1173f126890aSEmmanuel Vadot	};
1174f126890aSEmmanuel Vadot
1175f126890aSEmmanuel Vadot	vdd_3v3_sys: regulator-3v3 {
1176f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1177f126890aSEmmanuel Vadot		regulator-name = "vdd_3v3";
1178f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1179f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1180f126890aSEmmanuel Vadot		regulator-always-on;
1181f126890aSEmmanuel Vadot		regulator-boot-on;
1182f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1183f126890aSEmmanuel Vadot	};
1184f126890aSEmmanuel Vadot
1185f126890aSEmmanuel Vadot	vdd_pnl: regulator-panel {
1186f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1187f126890aSEmmanuel Vadot		regulator-name = "vdd_panel";
1188f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1189f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1190f126890aSEmmanuel Vadot		regulator-enable-ramp-delay = <300000>;
1191f126890aSEmmanuel Vadot		gpio = <&gpio TEGRA_GPIO(W, 1) GPIO_ACTIVE_HIGH>;
1192f126890aSEmmanuel Vadot		enable-active-high;
1193f126890aSEmmanuel Vadot		vin-supply = <&vdd_3v3_sys>;
1194f126890aSEmmanuel Vadot	};
1195f126890aSEmmanuel Vadot
1196f126890aSEmmanuel Vadot	vcc_3v3_ts: regulator-ts {
1197f126890aSEmmanuel Vadot		compatible = "regulator-fixed";
1198f126890aSEmmanuel Vadot		regulator-name = "ldo_s-1167_3v3";
1199f126890aSEmmanuel Vadot		regulator-min-microvolt = <3300000>;
1200f126890aSEmmanuel Vadot		regulator-max-microvolt = <3300000>;
1201f126890aSEmmanuel Vadot		regulator-always-on;
1202f126890aSEmmanuel Vadot		regulator-boot-on;
1203f126890aSEmmanuel Vadot		vin-supply = <&vdd_5v0_sys>;
1204f126890aSEmmanuel Vadot	};
1205f126890aSEmmanuel Vadot
1206f126890aSEmmanuel Vadot	sound {
1207f126890aSEmmanuel Vadot		compatible = "nvidia,tegra-audio-rt5640-grouper",
1208f126890aSEmmanuel Vadot			     "nvidia,tegra-audio-rt5640";
1209f126890aSEmmanuel Vadot		nvidia,model = "ASUS Google Nexus 7 ALC5642";
1210f126890aSEmmanuel Vadot
1211f126890aSEmmanuel Vadot		nvidia,audio-routing =
1212f126890aSEmmanuel Vadot			"Headphones", "HPOR",
1213f126890aSEmmanuel Vadot			"Headphones", "HPOL",
1214f126890aSEmmanuel Vadot			"Speakers", "SPORP",
1215f126890aSEmmanuel Vadot			"Speakers", "SPORN",
1216f126890aSEmmanuel Vadot			"Speakers", "SPOLP",
1217f126890aSEmmanuel Vadot			"Speakers", "SPOLN",
1218f126890aSEmmanuel Vadot			"DMIC1", "Mic Jack";
1219f126890aSEmmanuel Vadot
1220f126890aSEmmanuel Vadot		nvidia,i2s-controller = <&tegra_i2s1>;
1221f126890aSEmmanuel Vadot		nvidia,audio-codec = <&rt5640>;
1222f126890aSEmmanuel Vadot
1223f126890aSEmmanuel Vadot		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1224f126890aSEmmanuel Vadot
1225f126890aSEmmanuel Vadot		clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
1226f126890aSEmmanuel Vadot			 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1227f126890aSEmmanuel Vadot			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1228f126890aSEmmanuel Vadot		clock-names = "pll_a", "pll_a_out0", "mclk";
1229f126890aSEmmanuel Vadot
1230f126890aSEmmanuel Vadot		assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1231f126890aSEmmanuel Vadot				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1232f126890aSEmmanuel Vadot
1233f126890aSEmmanuel Vadot		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
1234f126890aSEmmanuel Vadot					 <&tegra_car TEGRA30_CLK_EXTERN1>;
1235f126890aSEmmanuel Vadot	};
1236f126890aSEmmanuel Vadot
1237f126890aSEmmanuel Vadot	thermal-zones {
1238f126890aSEmmanuel Vadot		/*
1239f126890aSEmmanuel Vadot		 * NCT72 has two sensors:
1240f126890aSEmmanuel Vadot		 *
1241f126890aSEmmanuel Vadot		 *	0: internal that monitors ambient/skin temperature
1242f126890aSEmmanuel Vadot		 *	1: external that is connected to the CPU's diode
1243f126890aSEmmanuel Vadot		 *
1244f126890aSEmmanuel Vadot		 * Ideally we should use userspace thermal governor,
1245f126890aSEmmanuel Vadot		 * but it's a much more complex solution.  The "skin"
1246f126890aSEmmanuel Vadot		 * zone is a simpler solution which prevents Nexus 7
1247f126890aSEmmanuel Vadot		 * from getting too hot from a user's tactile perspective.
1248f126890aSEmmanuel Vadot		 * The CPU zone is intended to protect silicon from damage.
1249f126890aSEmmanuel Vadot		 */
1250f126890aSEmmanuel Vadot
1251f126890aSEmmanuel Vadot		skin-thermal {
1252f126890aSEmmanuel Vadot			polling-delay-passive = <1000>; /* milliseconds */
1253f126890aSEmmanuel Vadot			polling-delay = <5000>; /* milliseconds */
1254f126890aSEmmanuel Vadot
1255f126890aSEmmanuel Vadot			thermal-sensors = <&nct72 0>;
1256f126890aSEmmanuel Vadot
1257f126890aSEmmanuel Vadot			trips {
1258f126890aSEmmanuel Vadot				trip0: skin-alert {
1259f126890aSEmmanuel Vadot					/* throttle at 57C until temperature drops to 56.8C */
1260f126890aSEmmanuel Vadot					temperature = <57000>;
1261f126890aSEmmanuel Vadot					hysteresis = <200>;
1262f126890aSEmmanuel Vadot					type = "passive";
1263f126890aSEmmanuel Vadot				};
1264f126890aSEmmanuel Vadot
1265f126890aSEmmanuel Vadot				trip1: skin-crit {
1266f126890aSEmmanuel Vadot					/* shut down at 65C */
1267f126890aSEmmanuel Vadot					temperature = <65000>;
1268f126890aSEmmanuel Vadot					hysteresis = <2000>;
1269f126890aSEmmanuel Vadot					type = "critical";
1270f126890aSEmmanuel Vadot				};
1271f126890aSEmmanuel Vadot			};
1272f126890aSEmmanuel Vadot
1273f126890aSEmmanuel Vadot			cooling-maps {
1274f126890aSEmmanuel Vadot				map0 {
1275f126890aSEmmanuel Vadot					trip = <&trip0>;
1276f126890aSEmmanuel Vadot					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1277f126890aSEmmanuel Vadot							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1278f126890aSEmmanuel Vadot							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1279f126890aSEmmanuel Vadot							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1280f126890aSEmmanuel Vadot							 <&actmon THERMAL_NO_LIMIT
1281f126890aSEmmanuel Vadot								  THERMAL_NO_LIMIT>;
1282f126890aSEmmanuel Vadot				};
1283f126890aSEmmanuel Vadot			};
1284f126890aSEmmanuel Vadot		};
1285f126890aSEmmanuel Vadot
1286f126890aSEmmanuel Vadot		cpu-thermal {
1287f126890aSEmmanuel Vadot			polling-delay-passive = <1000>; /* milliseconds */
1288f126890aSEmmanuel Vadot			polling-delay = <5000>; /* milliseconds */
1289f126890aSEmmanuel Vadot
1290f126890aSEmmanuel Vadot			thermal-sensors = <&nct72 1>;
1291f126890aSEmmanuel Vadot
1292f126890aSEmmanuel Vadot			trips {
1293f126890aSEmmanuel Vadot				trip2: cpu-alert {
1294f126890aSEmmanuel Vadot					/* throttle at 85C until temperature drops to 84.8C */
1295f126890aSEmmanuel Vadot					temperature = <85000>;
1296f126890aSEmmanuel Vadot					hysteresis = <200>;
1297f126890aSEmmanuel Vadot					type = "passive";
1298f126890aSEmmanuel Vadot				};
1299f126890aSEmmanuel Vadot
1300f126890aSEmmanuel Vadot				trip3: cpu-crit {
1301f126890aSEmmanuel Vadot					/* shut down at 90C */
1302f126890aSEmmanuel Vadot					temperature = <90000>;
1303f126890aSEmmanuel Vadot					hysteresis = <2000>;
1304f126890aSEmmanuel Vadot					type = "critical";
1305f126890aSEmmanuel Vadot				};
1306f126890aSEmmanuel Vadot			};
1307f126890aSEmmanuel Vadot
1308f126890aSEmmanuel Vadot			cooling-maps {
1309f126890aSEmmanuel Vadot				map1 {
1310f126890aSEmmanuel Vadot					trip = <&trip2>;
1311f126890aSEmmanuel Vadot					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1312f126890aSEmmanuel Vadot							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1313f126890aSEmmanuel Vadot							 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1314f126890aSEmmanuel Vadot							 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1315f126890aSEmmanuel Vadot							 <&actmon THERMAL_NO_LIMIT
1316f126890aSEmmanuel Vadot								  THERMAL_NO_LIMIT>;
1317f126890aSEmmanuel Vadot				};
1318f126890aSEmmanuel Vadot			};
1319f126890aSEmmanuel Vadot		};
1320f126890aSEmmanuel Vadot	};
1321f126890aSEmmanuel Vadot};
1322