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/linux/drivers/net/phy/
H A Dsfp.c19 #include "sfp.h"
169 * on board (for a copper SFP) time to initialise.
195 /* SFP module presence detection is poor: the three MOD DEF signals are
209 /* SFP modules appear to always have their PHY configured for bus address
211 * RollBall SFPs access phy via SFP Enhanced Digital Diagnostic Interface
218 * at a time. Some SFP modules and also some Linux I2C drivers do not like
230 struct sfp { struct
242 unsigned int (*get_state)(struct sfp *); argument
243 void (*set_state)(struct sfp *, unsigned int); argument
244 int (*read)(struct sfp *, bool, u8, void *, size_t); argument
[all …]
H A Dsfp-bus.c11 #include "sfp.h"
14 * struct sfp_bus - internal representation of a sfp bus
24 struct sfp *sfp; member
81 dev_warn(bus->sfp_dev, "SFP: unknown connector id 0x%02x\n", in sfp_module_parse_port()
279 /* For fibre channel SFP, derive possible BaseX modes */ in sfp_module_parse_support()
334 * @bus: a pointer to the &struct sfp_bus structure for the sfp module
337 * Derive the phy_interface_t mode for the SFP module from the link
389 struct sfp_bus *sfp, *new, *found = NULL; in sfp_bus_get() local
395 list_for_each_entry(sfp, &sfp_buses, node) { in sfp_bus_get()
396 if (sfp->fwnode == fwnode) { in sfp_bus_get()
[all …]
/linux/drivers/media/usb/pvrusb2/
H A Dpvrusb2-sysfs.c282 static void pvr2_sysfs_add_control(struct pvr2_sysfs *sfp,int ctl_id) in pvr2_sysfs_add_control() argument
289 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,ctl_id); in pvr2_sysfs_add_control()
299 cip->chptr = sfp; in pvr2_sysfs_add_control()
301 if (sfp->item_last) { in pvr2_sysfs_add_control()
302 sfp->item_last->item_next = cip; in pvr2_sysfs_add_control()
304 sfp->item_first = cip; in pvr2_sysfs_add_control()
306 sfp->item_last = cip; in pvr2_sysfs_add_control()
391 ret = sysfs_create_group(&sfp->class_dev->kobj,&cip->grp); in pvr2_sysfs_add_control()
409 static void pvr2_sysfs_add_debugifc(struct pvr2_sysfs *sfp) in pvr2_sysfs_add_debugifc() argument
425 sfp->debugifc = dip; in pvr2_sysfs_add_debugifc()
[all …]
/linux/drivers/pinctrl/starfive/
H A Dpinctrl-starfive-jh7110.c99 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_pin_dbg_show() local
100 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pin_dbg_show()
104 if (pin < sfp->gc.ngpio) { in jh7110_pin_dbg_show()
107 u32 dout = readl_relaxed(sfp->base + info->dout_reg_base + offset); in jh7110_pin_dbg_show()
108 u32 doen = readl_relaxed(sfp->base + info->doen_reg_base + offset); in jh7110_pin_dbg_show()
109 u32 gpi = readl_relaxed(sfp->base + info->gpi_reg_base + offset); in jh7110_pin_dbg_show()
127 struct jh7110_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in jh7110_dt_node_to_map() local
128 struct device *dev = sfp->gc.parent; in jh7110_dt_node_to_map()
152 mutex_lock(&sfp->mutex); in jh7110_dt_node_to_map()
230 mutex_unlock(&sfp->mutex); in jh7110_dt_node_to_map()
[all …]
H A Dpinctrl-starfive-jh7100.c151 * sfp->gpio.pin_base = PAD_INVALID_GPIO then
152 * starfive_pin_to_gpio(sfp, validpin) is never a valid GPIO number.
216 static inline unsigned int starfive_pin_to_gpio(const struct starfive_pinctrl *sfp, in starfive_pin_to_gpio() argument
219 return pin - sfp->gpios.pin_base; in starfive_pin_to_gpio()
222 static inline unsigned int starfive_gpio_to_pin(const struct starfive_pinctrl *sfp, in starfive_gpio_to_pin() argument
225 return sfp->gpios.pin_base + gpio; in starfive_gpio_to_pin()
456 struct starfive_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in starfive_pin_dbg_show() local
457 unsigned int gpio = starfive_pin_to_gpio(sfp, pin); in starfive_pin_dbg_show()
464 reg = sfp->base + GPON_DOUT_CFG + 8 * gpio; in starfive_pin_dbg_show()
481 struct starfive_pinctrl *sfp = pinctrl_dev_get_drvdata(pctldev); in starfive_dt_node_to_map() local
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H A Dpinctrl-starfive-jh7110-aon.c75 static int jh7110_aon_set_one_pin_mux(struct jh7110_pinctrl *sfp, in jh7110_aon_set_one_pin_mux() argument
80 if (pin < sfp->gc.ngpio && func == 0) in jh7110_aon_set_one_pin_mux()
81 jh7110_set_gpiomux(sfp, pin, din, dout, doen); in jh7110_aon_set_one_pin_mux()
86 static int jh7110_aon_get_padcfg_base(struct jh7110_pinctrl *sfp, in jh7110_aon_get_padcfg_base() argument
97 struct jh7110_pinctrl *sfp = jh7110_from_irq_desc(desc); in jh7110_aon_irq_handler() local
104 mis = readl_relaxed(sfp->base + JH7110_AON_GPIOMIS); in jh7110_aon_irq_handler()
106 generic_handle_domain_irq(sfp->gc.irq.domain, pin); in jh7110_aon_irq_handler()
113 struct jh7110_pinctrl *sfp = container_of(gc, in jh7110_aon_init_hw() local
117 writel_relaxed(0, sfp->base + JH7110_AON_GPIOIE); in jh7110_aon_init_hw()
119 writel_relaxed(0, sfp->base + JH7110_AON_GPIOIC); in jh7110_aon_init_hw()
[all …]
/linux/drivers/scsi/
H A Dsg.c184 static int sg_build_indirect(Sg_scatter_hold * schp, Sg_fd * sfp, int buff_size);
185 static ssize_t sg_new_read(Sg_fd * sfp, char __user *buf, size_t count,
187 static ssize_t sg_new_write(Sg_fd *sfp, struct file *file,
190 static int sg_common_write(Sg_fd * sfp, Sg_request * srp,
193 static void sg_remove_scat(Sg_fd * sfp, Sg_scatter_hold * schp);
194 static void sg_build_reserve(Sg_fd * sfp, int req_size);
195 static void sg_link_reserve(Sg_fd * sfp, Sg_request * srp, int size);
196 static void sg_unlink_reserve(Sg_fd * sfp, Sg_request * srp);
199 static Sg_request *sg_get_rq_mark(Sg_fd * sfp, int pack_id, bool *busy);
200 static Sg_request *sg_add_request(Sg_fd * sfp);
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/linux/arch/arm64/boot/dts/microchip/
H A Dsparx5_pcb134_board.dtsi266 sfp_eth12: sfp-eth12 {
267 compatible = "sff,sfp";
275 sfp_eth13: sfp-eth13 {
276 compatible = "sff,sfp";
284 sfp_eth14: sfp-eth14 {
285 compatible = "sff,sfp";
293 sfp_eth15: sfp-eth15 {
294 compatible = "sff,sfp";
302 sfp_eth48: sfp-eth48 {
303 compatible = "sff,sfp";
[all …]
/linux/Documentation/devicetree/bindings/nvmem/
H A Dfsl,layerscape-sfp.yaml4 $id: http://devicetree.org/schemas/nvmem/fsl,layerscape-sfp.yaml#
13 SFP is the security fuse processor which among other things provides a
23 - description: Trust architecture 2.1 SFP
25 - const: fsl,ls1021a-sfp
26 - description: Trust architecture 3.0 SFP
28 - const: fsl,ls1028a-sfp
36 The SFP clock. Typically, this is the platform clock divided by 4.
39 const: sfp
41 ta-prog-sfp-supply:
58 compatible = "fsl,ls1028a-sfp";
[all …]
H A Dfsl,t1023-sfp.yaml4 $id: http://devicetree.org/schemas/nvmem/fsl,t1023-sfp.yaml#
13 Read support for the eFuses (SFP) on NXP QorIQ series SoC's.
20 const: fsl,t1023-sfp
34 compatible = "fsl,t1023-sfp";
/linux/drivers/net/ethernet/intel/ice/
H A Dice_devids.h13 /* Intel(R) Ethernet Controller E835-CC for SFP */
19 /* Intel(R) Ethernet Controller E835-C for SFP */
25 /* Intel(R) Ethernet Controller E835-L for SFP */
29 /* Intel(R) Ethernet Connection E823-L for SFP */
41 /* Intel(R) Ethernet Controller E830-CC for SFP */
43 /* Intel(R) Ethernet Controller E830-CC for SFP-DD */
49 /* Intel(R) Ethernet Controller E830-C for SFP */
55 /* Intel(R) Ethernet Controller E830-XXV for SFP */
61 /* Intel(R) Ethernet Controller E810-C for SFP */
74 /* Intel(R) Ethernet Controller E810-XXV for SFP */
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-ocelot.c307 [FUNC_SFP] = "sfp",
410 LUTON_P(10, SFP, PHY_LED);
411 LUTON_P(11, SFP, PHY_LED);
412 LUTON_P(12, SFP, PHY_LED);
413 LUTON_P(13, SFP, PHY_LED);
417 LUTON_P(17, SFP, PHY_LED);
418 LUTON_P(18, SFP, PHY_LED);
419 LUTON_P(19, SFP, PHY_LED);
420 LUTON_P(20, SFP, PHY_LED);
421 LUTON_P(21, SFP, PHY_LED);
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2162a-clearfog.dts41 led_sfp_at: led-sfp-at {
46 led_sfp_ab: led-sfp-ab {
51 led_sfp_bt: led-sfp-bt {
56 led_sfp_bb: led-sfp-bb {
62 sfp_at: sfp-at {
63 compatible = "sff,sfp";
69 sfp_ab: sfp-ab {
70 compatible = "sff,sfp";
76 sfp_bt: sfp-bt {
77 compatible = "sff,sfp";
[all …]
/linux/Documentation/networking/
H A Dphy-link-topology.rst29 for example, using SFP transceivers (although that's not the only specific case).
32 interface, that can directly be fed to an SFP cage, such as SGMII, 1000BaseX,
35 The link topology then looks like this (when an SFP module is inserted) ::
38 | MAC | ------- | SFP Module |
44 | MAC | -------- | PHY (on SFP) |
47 In this case, the SFP PHY is handled by phylib, and registered by phylink through
48 its SFP upstream ops.
51 we can't directly connect them to an SFP cage. However, some PHYs can be used
53 serialized MII interface fed to the SFP ::
56 | MAC | ------- | PHY (media converter) | ------- | PHY (on SFP) |
[all …]
/linux/drivers/scsi/snic/
H A Dsnic_debugfs.c165 snic_stats_show(struct seq_file *sfp, void *data) in snic_stats_show() argument
167 struct snic *snic = (struct snic *) sfp->private; in snic_stats_show()
174 seq_printf(sfp, in snic_stats_show()
180 seq_printf(sfp, in snic_stats_show()
211 seq_puts(sfp, "\nSGL Counters\n"); in snic_stats_show()
214 seq_printf(sfp, in snic_stats_show()
219 seq_puts(sfp, "\n"); in snic_stats_show()
223 seq_printf(sfp, in snic_stats_show()
228 seq_printf(sfp, in snic_stats_show()
243 seq_printf(sfp, in snic_stats_show()
[all …]
/linux/arch/arm64/boot/dts/marvell/
H A Dcn9130-cf.dtsi27 sfp: sfp { label
28 compatible = "sff,sfp";
38 /* SRDS #2 - SFP+ 10GE */
43 sfp = <&sfp>;
104 * Routed to SFP, M.2, mikrobus, and miniPCIe
105 * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
H A Darmada-8040-puzzle-m801.dts67 sfp_cp0_eth0: sfp-cp0-eth0 {
68 compatible = "sff,sfp";
77 sfp_cp1_eth0: sfp-cp1-eth0 {
78 compatible = "sff,sfp";
94 /* SFP+ port 2: Activity */
101 /* SFP+ port 1: Activity */
108 /* SFP+ port 2: 10 Gbps indicator */
115 /* SFP+ port 2: 1 Gbps indicator */
122 /* SFP+ port 1: 10 Gbps indicator */
129 /* SFP+ port 1: 1 Gbps indicator */
[all …]
H A Darmada-8040-mcbin.dtsi64 sfp_eth0: sfp-eth0 {
66 compatible = "sff,sfp";
77 sfp_eth1: sfp-eth1 {
79 compatible = "sff,sfp";
90 sfp_eth3: sfp-eth3 {
92 compatible = "sff,sfp";
214 cp0_sfp_1g_pins: sfp-1g-pins {
309 sfp = <&sfp_eth3>;
325 cp1_sfp_1g_pins: sfp-1g-pins {
H A Darmada-3720-turris-mox.dts100 sfp: sfp { label
101 compatible = "sff,sfp";
110 /* enabled by U-Boot if SFP module is present */
426 port-sfp@a {
428 label = "sfp";
429 sfp = <&sfp>;
620 port-sfp@a {
622 label = "sfp";
623 sfp = <&sfp>;
805 port-sfp@a {
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-clearfog-gtr.dtsi15 5. SFP connector, or optionally SGMII Ethernet 1512 PHY
33 24 - SFP TX fault (input active high)
34 25 - SFP present (input active low)
35 26,27 - I2C1 - connected to SFP
49 46 - SFP TX disable
56 54 - SFP LOS (input active high)
137 i2c@11100 { /* SFP (CON5/CON6) */
155 /* SFP */
199 /* sfp modabs, txdisable */
205 /* sfp modabs, txdisable */
[all …]
H A Darmada-388-clearfog.dtsi80 sfp: sfp { label
81 compatible = "sff,sfp";
109 sfp = <&sfp>;
191 * Routed to SFP, mikrobus, and PCIe.
192 * SFP limits this to 100kHz, and requires an AT24C01A/02/04 with
205 /* SFP, PCIe, mSATA, mikrobus */
/linux/fs/freevxfs/
H A Dvxfs_fshead.c87 struct vxfs_fsh *pfp, *sfp; in vxfs_read_fshead() local
108 sfp = vxfs_getfsh(infp->vsi_fship, 0); in vxfs_read_fshead()
109 if (!sfp) { in vxfs_read_fshead()
115 vxfs_dumpfsh(sfp); in vxfs_read_fshead()
129 fs32_to_cpu(infp, sfp->fsh_ilistino[0])); in vxfs_read_fshead()
152 kfree(sfp); in vxfs_read_fshead()
162 kfree(sfp); in vxfs_read_fshead()
/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Dixgbe.rst35 SFP+ Devices with Pluggable Optics
44 - When 82599-based SFP+ devices are connected back to back, they should be set
53 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | FTLX8571D3BCV-IT |
55 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | AFBR-703SDZ-IN2 |
57 | Intel | DUAL RATE 1G/10G SFP+ SR (bailed) | AFBR-703SDDZ-IN1 |
61 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | FTLX1471D3BCV-IT |
63 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDZ-IN2 |
65 | Intel | DUAL RATE 1G/10G SFP+ LR (bailed) | AFCT-701SDDZ-IN1 |
68 The following is a list of 3rd party SFP+ modules that have received some
74 | Finisar | SFP+ SR bailed, 10g single rate | FTLX8571D3BCL |
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a-bananapi-bpi-r3.dts66 /* i2c of the left SFP cage (wan) */
74 /* i2c of the right SFP cage (lan) */
120 /* left SFP cage (wan) */
121 sfp1: sfp-1 {
122 compatible = "sff,sfp";
131 /* right SFP cage (lan) */
132 sfp2: sfp-2 {
133 compatible = "sff,sfp";
188 sfp = <&sfp1>;
440 sfp = <&sfp2>;
/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-pcb8309.dts36 i2c102: i2c-sfp@1 {
40 i2c103: i2c-sfp@2 {
82 compatible = "sff,sfp";
91 compatible = "sff,sfp";
193 sfp = <&sfp2>;
201 sfp = <&sfp3>;

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