Home
last modified time | relevance | path

Searched +full:serial +full:- +full:shift +full:- +full:bits (Results 1 – 25 of 130) sorted by relevance

123456

/freebsd/sys/contrib/device-tree/Bindings/gpio/
H A Dgpio-stp-xway.txt1 Lantiq SoC Serial To Parallel (STP) GPIO controller
3 The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
4 peripheral controller used to drive external shift register cascades. At most
5 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
10 - compatible : Should be "lantiq,gpio-stp-xway"
11 - reg : Address and length of the register set for the device
12 - #gpio-cells : Should be two. The first cell is the pin number and
15 - gpio-controller : Marks the device node as a gpio controller.
18 - lantiq,shadow : The default value that we shall assume as already set on the
19 shift register cascade.
[all …]
H A Dgpio-stp-xway.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-stp-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Lantiq SoC Serial To Parallel (STP) GPIO controller
10 The Serial To Parallel (STP) is found on MIPS based Lantiq socs. It is a
11 peripheral controller used to drive external shift register cascades. At most
12 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
16 - John Crispin <john@phrozen.org>
20 pattern: "^gpio@[0-9a-f]+$"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-bcm63138.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-bcm63138.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
24 - items:
25 - enum:
26 - brcm,bcm4908-leds
27 - brcm,bcm6848-leds
28 - brcm,bcm6858-leds
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3562.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3562-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rockchip,rk3562-power.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/reset/rockchip,rk3562-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
14 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Drk3528.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/clock/rockchip,rk3528-cru.h>
12 #include <dt-bindings/reset/rockchip,rk3528-cru.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
[all …]
H A Drk3576.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rk3576-power.h>
12 #include <dt-bindings/reset/rockchip,rk3576-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
18 interrupt-parent = <&gic>;
[all …]
H A Drk356x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
/freebsd/share/man/man4/
H A Duart.41 .\"-
2 .\" SPDX-License-Identifier: BSD-2-Clause
33 .Nd Universal Asynchronous Receiver/Transmitter serial driver
53 .Bl -tag -compact -width 0x000000
72 EIA RS-232C (CCITT V.24) serial communications interface.
77 The primary support for devices that contain multiple serial interfaces or
78 that contain other functionality besides one or more serial interfaces is
84 However, the serial interfaces of those devices that are managed by the
112 It contains the bus attachments and the low-level interrupt handler.
118 UARTs to be used for serial communications.
[all …]
/freebsd/contrib/ntp/ntpd/
H A Drefclock_chu.c2 * refclock_chu - clock driver for Canadian CHU time/frequency station
44 * kHz and mu-law companding. This is the same standard as used by the
57 * maximum-likelihood technique which exploits the considerable degree
62 * consists of nine, ten-character bursts transmitted at 300 bps between
64 * data bits plus one start bit and two stop bits to encode two hex
87 * the DUT1 (d in deciseconds), Gregorian year (yyyy), difference TAI -
99 * coincides with 0.5 second. Since characters have 11 bits and are
101 * coincides with 0.5 - 9 * 11/300 = 0.170 second. Depending on the
109 * data helpful in diagnosing problems with the radio signal and serial
110 * connections. With debugging enabled (-d on the ntpd command line),
[all …]
/freebsd/sys/dev/usb/serial/
H A Dumcs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
48 #define MCS7840_DEV_REG_CONTROL1 0x01 /* Control bits for UART 1,
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
55 #define MCS7840_DEV_REG_GPIO 0x07 /* GPIO_0 and GPIO_1 bits,
59 #define MCS7840_DEV_REG_CONTROL2 0x09 /* Control bits for UART 2,
62 #define MCS7840_DEV_REG_CONTROL3 0x0b /* Control bits for UART 3,
65 #define MCS7840_DEV_REG_CONTROL4 0x0d /* Control bits for UART 4,
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
[all …]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun8i-a83t.dtsi6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
48 #include <dt-bindings/clock/sun8i-de2.h>
49 #include <dt-bindings/clock/sun8i-r-ccu.h>
50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
51 #include <dt-bindings/reset/sun8i-de2.h>
52 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 #include <dt-bindings/thermal/thermal.h>
56 interrupt-parent = <&gic>;
[all …]
H A Dsun4i-a10.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/thermal/thermal.h>
45 #include <dt-bindings/dma/sun4i-a10.h>
46 #include <dt-bindings/clock/sun4i-a10-ccu.h>
47 #include <dt-bindings/reset/sun4i-a10-ccu.h>
50 #address-cells = <1>;
51 #size-cells = <1>;
52 interrupt-parent = <&intc>;
59 #address-cells = <1>;
60 #size-cells = <1>;
[all …]
H A Dsun9i-a80.dtsi2 * Copyright 2014 Chen-Yu Tsai
4 * Chen-Yu Tsai <wens@csie.org>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/clock/sun9i-a80-ccu.h>
48 #include <dt-bindings/clock/sun9i-a80-de.h>
49 #include <dt-bindings/clock/sun9i-a80-usb.h>
50 #include <dt-bindings/reset/sun9i-a80-ccu.h>
51 #include <dt-bindings/reset/sun9i-a80-de.h>
52 #include <dt-bindings/reset/sun9i-a80-usb.h>
[all …]
/freebsd/sys/net/
H A Dsff8436.h1 /*-
29 * The following set of constants are from Document SFF-8436
34 * 1) 256-byte addressable block and 128-byte pages
35 * 2) Lower 128-bytes addresses always refer to the same page
41 * Serial address 0xA02:
43 * Lower bits
44 * 0-127 Monitoring data & page select byte
45 * 128-255:
48 * 128-191 Base ID Fields
49 * 191-223 Extended ID
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmicrowatt.dts1 /dts-v1/;
2 #include <dt-bindings/gpio/gpio.h>
5 #size-cells = <0x02>;
6 #address-cells = <0x02>;
8 compatible = "microwatt-soc";
15 reserved-memory {
16 #size-cells = <0x02>;
17 #address-cells = <0x02>;
28 #clock-cells = <0>;
29 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/keystone/
H A Dkeystone-k2l.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
21 compatible = "arm,cortex-a15";
27 compatible = "arm,cortex-a15";
42 /include/ "keystone-k2l-clocks.dtsi"
44 uart2: serial@2348400 {
[all …]
/freebsd/sys/dev/mvs/
H A Dmvs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
40 #define IC_ERR_IRQ (1 << 0) /* shift by (2 * port #) */
41 #define IC_DONE_IRQ (1 << 1) /* shift by (2 * port #) */
42 #define IC_HC0 0x000001ff /* bits 0-8 = HC0 */
43 #define IC_HC_SHIFT 9 /* HC1 shift */
44 #define IC_HC1 (IC_HC0 << IC_HC_SHIFT) /* 9-17 = HC1 */
58 #define IC_MAIN_RSVD (0xfe000000) /* bits 31-25 */
59 #define IC_MAIN_RSVD_5 (0xfff10000) /* bits 31-19 */
60 #define IC_MAIN_RSVD_SOC (0xfffffec0) /* bits 31-9, 7-6 */
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/davinci/
H A Dda850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "arm,arm926ej-s";
28 operating-points-v2 = <&opp_table>;
32 opp_table: opp-table {
33 compatible = "operating-points-v2";
[all …]
/freebsd/sys/contrib/device-tree/src/nios2/
H A D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
[all …]
/freebsd/contrib/ntp/html/drivers/
H A Ddriver7.html1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
13 <!-- #BeginDate format:En2m -->17-Jul-2014 02:17<!-- #EndDate -->
20 Modem Port: <tt>/dev/chu<i>u</i></tt>; 300 baud, 8-bits, no parity<br>
21 Autotune Port: <tt>/dev/icom</tt>; 1200/9600 baud, 8-bits, no parity<br>
25 …from Canadian time/frequency station <a href="http://inms-ienm.nrc-cnrc.gc.ca/time_services/shortw…
31 …-compatible, 300-b/s modem or modem chip, as described on the <a href="../pps.html">Pulse-per-seco…
32 …d ray geometry. In Newark DE, 625 km from the transmitter, the predicted one-hop propagation delay…
33 …r, the mean offset with a 2.4-GHz P4 running FreeBSD 6.1 is generally within 0.2 ms short-term wit…
37 <p>The driver processes 8-kHz &mu;-law companded codec samples using maximum-likelihood techniques …
[all …]
/freebsd/sys/contrib/device-tree/src/riscv/starfive/
H A Djh7110.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
8 #include <dt-bindings/clock/starfive,jh7110-crg.h>
9 #include <dt-bindings/power/starfive,jh7110-pmu.h>
10 #include <dt-bindings/reset/starfive,jh7110-crg.h>
11 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 #address-cells = <1>;
20 #size-cells = <0>;
[all …]
/freebsd/sys/dev/nmdm/
H A Dnmdm.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
35 * Pseudo-nulmodem driver
36 * Mighty handy for use with serial console in Vmware
51 #include <sys/serial.h>
91 #define QS 8 /* Quota shift */
110 onp = np->np_other; in nmdm_close()
111 otp = onp->np_tty; in nmdm_close()
122 onp = np->np_other; in nmdm_close()
125 otp = onp->np_tty; in nmdm_close()
[all …]
/freebsd/sys/dev/ic/
H A Dcd1400.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * cyclades cyclom-y serial driver
34 * Definitions for Cirrus Logic CD1400 serial/parallel chips.
37 #define CD1400_NO_OF_CHANNELS 4 /* 4 serial channels per chip */
81 #define CD1400_RDSR_SPECIAL_SHIFT 4 /* rx special char shift */
108 #define CD1400_CCR_SC (7<<0) /* special char 1-4 */
118 #define CD1400_SRER_TXMPTY (1<<1) /* tx shift reg empty */
127 #define CD1400_COR1_STOP15 (1<<2) /* 1.5 stop bits */
135 #define CD1400_COR2_IXOFF (1<<6) /* in-band tx flow control */
[all …]
/freebsd/sys/contrib/device-tree/src/riscv/canaan/
H A Dk210.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
6 #include <dt-bindings/clock/k210-clk.h>
7 #include <dt-bindings/pinctrl/k210-fpioa.h>
8 #include <dt-bindings/reset/k210-rst.h>
12 * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "canaan,kendryte-k210";
21 * Since this is a non-ratified draft specification, the kernel does not
[all …]

123456