Lines Matching +full:serial +full:- +full:shift +full:- +full:bits
1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
48 #define MCS7840_DEV_REG_CONTROL1 0x01 /* Control bits for UART 1,
50 #define MCS7840_DEV_REG_PINPONGHIGH 0x02 /* High bits of ping-pong
52 #define MCS7840_DEV_REG_PINPONGLOW 0x03 /* Low bits of ping-pong
55 #define MCS7840_DEV_REG_GPIO 0x07 /* GPIO_0 and GPIO_1 bits,
59 #define MCS7840_DEV_REG_CONTROL2 0x09 /* Control bits for UART 2,
62 #define MCS7840_DEV_REG_CONTROL3 0x0b /* Control bits for UART 3,
65 #define MCS7840_DEV_REG_CONTROL4 0x0d /* Control bits for UART 4,
67 #define MCS7840_DEV_REG_PLL_DIV_M 0x0e /* Pre-diviedr for PLL, R/W */
78 /* DCRx_2-DCRx_4 Registers goes here (see below, they are documented) */
109 #define MCS7840_DEV_REG_BI_FIFO_STAT1 0x32 /* Bulk-In FIFO Stat for Port
112 #define MCS7840_DEV_REG_BO_FIFO_STAT1 0x33 /* Bulk-out FIFO Stat for Port
115 #define MCS7840_DEV_REG_BI_FIFO_STAT2 0x34 /* Bulk-In FIFO Stat for Port
118 #define MCS7840_DEV_REG_BO_FIFO_STAT2 0x35 /* Bulk-out FIFO Stat for Port
121 #define MCS7840_DEV_REG_BI_FIFO_STAT3 0x36 /* Bulk-In FIFO Stat for Port
124 #define MCS7840_DEV_REG_BO_FIFO_STAT3 0x37 /* Bulk-out FIFO Stat for Port
127 #define MCS7840_DEV_REG_BI_FIFO_STAT4 0x38 /* Bulk-In FIFO Stat for Port
130 #define MCS7840_DEV_REG_BO_FIFO_STAT4 0x39 /* Bulk-out FIFO Stat for Port
143 #define MCS7840_DEV_REG_THR_VAL_LOW1 0x3f /* Low 8 bits of threshold
144 * value for Bulk-Out for Port
147 * value for Bulk-Out and
149 #define MCS7840_DEV_REG_THR_VAL_LOW2 0x41 /* Low 8 bits of threshold
150 * value for Bulk-Out for Port
153 * value for Bulk-Out and
155 #define MCS7840_DEV_REG_THR_VAL_LOW3 0x43 /* Low 8 bits of threshold
156 * value for Bulk-Out for Port
159 * value for Bulk-Out and
161 #define MCS7840_DEV_REG_THR_VAL_LOW4 0x45 /* Low 8 bits of threshold
162 * value for Bulk-Out for Port
165 * value for Bulk-Out and
168 /* Bits for SPx registers */
169 #define MCS7840_DEV_SPx_LOOP_PIPES 0x01 /* Loop Bulk-Out FIFO to the
170 * Bulk-In FIFO, default = 0 */
174 #define MCS7840_DEV_SPx_RESET_OUT_FIFO 0x04 /* Reset Bulk-Out FIFO */
175 #define MCS7840_DEV_SPx_RESET_IN_FIFO 0x08 /* Reset Bulk-In FIFO */
198 /* Bits for CONTROLx registers */
219 * RS-232/RS-485 mode,
228 * Bits for PINPONGx registers
230 * for Bulk-In FIFOs are swapped. One of buffers is used
234 #define MCS7840_DEV_PINPONGHIGH_MULT 128 /* Only 7 bits in PINPONGLOW
236 #define MCS7840_DEV_PINPONGLOW_BITS 7 /* Only 7 bits in PINPONGLOW
240 * THIS ONE IS UNDOCUMENTED IN FULL DATASHEET, but e-mail from tech support
243 * authors as "number of port" indicator, grounded (0) for two-port
244 * devices and pulled-up to 1 for 4-port devices.
255 * Default PLL input frequency Fin is 12Mhz (on-chip).
257 #define MCS7840_DEV_PLL_DIV_M_BITS 6 /* Number of useful bits for M
264 #define MCS7840_DEV_PLL_DIV_N_BITS 6 /* Number of useful bits for N
272 /* Bits for CLOCK_MUX register */
276 #define MCS7840_DEV_CLOCK_MUX_INEXTRN 0x01 /* External (device-depended)
281 * 20MHz-100MHz (default), 1 =
282 * 100MHz-300MHz range */
292 /* Bits for CLOCK_SELECTxx registers */
293 #define MCS7840_DEV_CLOCK_SELECT1_MASK 0x07 /* Bits for port 1 in
295 #define MCS7840_DEV_CLOCK_SELECT1_SHIFT 0 /* Shift for port 1in
297 #define MCS7840_DEV_CLOCK_SELECT2_MASK 0x38 /* Bits for port 2 in
299 #define MCS7840_DEV_CLOCK_SELECT2_SHIFT 3 /* Shift for port 2 in
301 #define MCS7840_DEV_CLOCK_SELECT3_MASK 0x07 /* Bits for port 3 in
303 #define MCS7840_DEV_CLOCK_SELECT3_SHIFT 0 /* Shift for port 3 in
305 #define MCS7840_DEV_CLOCK_SELECT4_MASK 0x38 /* Bits for port 4 in
307 #define MCS7840_DEV_CLOCK_SELECT4_SHIFT 3 /* Shift for port 4 in
318 * (device-dependend) */
322 /* Bits for MODE register */
331 #define MCS7840_DEV_MODE_PORBYPASS 0x10 /* 1: Power-On Reset is
333 #define MCS7840_DEV_MODE_SELECT24S 0x20 /* 0: 4 Serial Ports / IrDA
334 * active, 1: 2 Serial Ports /
342 /* Bits for SPx ICG */
343 #define MCS7840_DEV_SPx_ICG_DEF 0x24 /* All 8 bits is used as
348 * Bits for RX_SAMPLINGxx registers
353 #define MCS7840_DEV_RX_SAMPLING1_MASK 0x0f /* Bits for port 1 in
355 #define MCS7840_DEV_RX_SAMPLING1_SHIFT 0 /* Shift for port 1in
357 #define MCS7840_DEV_RX_SAMPLING2_MASK 0xf0 /* Bits for port 2 in
359 #define MCS7840_DEV_RX_SAMPLING2_SHIFT 4 /* Shift for port 2 in
361 #define MCS7840_DEV_RX_SAMPLING3_MASK 0x0f /* Bits for port 3 in
363 #define MCS7840_DEV_RX_SAMPLING3_SHIFT 0 /* Shift for port 3 in
365 #define MCS7840_DEV_RX_SAMPLING4_MASK 0xf0 /* Bits for port 4 in
367 #define MCS7840_DEV_RX_SAMPLING4_SHIFT 4 /* Shift for port 4 in
374 /* Bits for ZERO_PERIODx */
375 #define MCS7840_DEV_ZERO_PERIODx_DEF 20 /* Number of Bulk-in requests
376 * befor sending zero-sized
379 /* Bits for ZERO_ENABLE */
381 * zero-sized replies for port
384 * zero-sized replies for port
387 * zero-sized replies for port
390 * zero-sized replies for port
393 /* Bits for THR_VAL_HIGHx */
425 /* Bits of DCR0 registers, documented in datasheet */
430 #define MCS7840_DEV_DCR0_GPIO_MODE_MASK 0x0c /* GPIO Mode bits, WORKS
432 #define MCS7840_DEV_DCR0_GPIO_MODE_IN 0x00 /* GPIO Mode - Input
435 #define MCS7840_DEV_DCR0_GPIO_MODE_OUT 0x08 /* GPIO Mode - Input
447 /* Bits of DCR1 registers, documented in datasheet */
485 * Bits of DCR2 registers, documented in datasheet
486 * Wakeup will work only if DCR0_IRDA = 0 (RS-xxx mode) and
507 /* Interrupt endpoint bytes & bits */
510 * Thesse can be calculated as "1 << portnumber" for Bulk-out and
511 * "1 << (portnumber+1)" for Bulk-in
527 #define MCS7840_UART_REG_IER 0x01 /* Interrupt enable register -
529 #define MCS7840_UART_REG_FCR 0x02 /* FIFO Control register -
540 #define MCS7840_UART_REG_DLL 0x00 /* Low bits of BAUD divider */
541 #define MCS7840_UART_REG_DLM 0x01 /* High bits of BAUD divider */
543 /* IER bits */
551 /* FCR bits */
562 /* ISR bits */
572 /* LCR bits */
574 #define MCS7840_UART_LCR_DATALEN5 0x00 /* 5 data bits */
575 #define MCS7840_UART_LCR_DATALEN6 0x01 /* 6 data bits */
576 #define MCS7840_UART_LCR_DATALEN7 0x02 /* 7 data bits */
577 #define MCS7840_UART_LCR_DATALEN8 0x03 /* 8 data bits */
579 #define MCS7840_UART_LCR_STOPBMASK 0x04 /* Mask for stop bits */
581 #define MCS7840_UART_LCR_STOPB2 0x04 /* 1.5-2 stop bits depends on
585 #define MCS7840_UART_LCR_PARITYON 0x08 /* Parity ON/OFF - ON */
595 /* LSR bits */
605 /* MCR bits */
621 /* MSR bits */
635 /* SCRATCHPAD bits */
636 #define MCS7840_UART_SCRATCHPAD_RS232 0x00 /* RS-485 disabled */
637 #define MCS7840_UART_SCRATCHPAD_RS485_DTRRX 0x80 /* RS-485 mode, DTR High
639 #define MCS7840_UART_SCRATCHPAD_RS485_DTRTX 0xc0 /* RS-485 mode, DTR High